diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2024-07-16 11:43:51 -0700 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2024-07-16 11:43:51 -0700 |
commit | e3950967f6e6b74a3606739ec50ed19f3398c7d8 (patch) | |
tree | 7e71d022167eca97b96ca3d675a1cbee55b06889 /arch/arm64/boot/dts/qcom/sdm845.dtsi | |
parent | cc0f7c3f97bc6e888bf4be28a9da9dbd3735d2b4 (diff) | |
parent | 48d2245586452b8279a854970ce82f43477669d3 (diff) |
Merge tag 'soc-dt-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC dt updates from Arnd Bergmann:
"The devicetree updates are fairly well spread out across platforms,
with Qualcomm making up about a third of the total.
There are three new SoCs in existing product families this:
- NXP i.MX95 is a variant of i.MX93, now with six Cortex-A55 cores
instead of just two as well as a GPU and more high-speed I/O
devices.
- Qualcomm QCS8550 is a variant of SM8550 for IOT devices
- Airoha EN7581 is a 10G-PON network chip and related to the MT7981
Wireless router chip from its parent Mediatek.
In total there are 58 new machines, including four riscv boards and
eight for 32-bit arm.
The most exciting new addition is probably a pair of laptops based on
the Qualcomm x1e80100 (Snapdragon X1 Elite) chip, the Asus Vivobook
S15 and the Lenovo Yoga Slim7x.
Other noteworthy new additions are:
- A total of 20 Qualcomm based machines, mostly Android devices from
Samsung, Motorola and LG, as well as a wireless router and some
reference designs
- Six NXP i.MX based machines, mostly industrial boards along with
some reference designs
- Mediatek sees some interesting Filogic based routers including the
"OpenWRT One", a few new Chromebooks as well as single-board
computers.
- Four machines from Solidrun based on Marvell cn913x, replacing the
older Armada 8000 based counterparts
- The four Amlogic machines are all set top boxes or reference
designs for them
- The nine new Rockchips machines are mostly single-board computers
including some interesting ones based on the rk3588 chip like the
ROCK 5 ITX board and the CM3588 with its four NVMe slots
- The RISC-V boards are all single-board computers based on Starfive
JH7110, Microchip MPFS and Allwinner D1, which all had similar
boards already
There are also a lot of updates to already supported machines, notably
for the TI K3, Rockchips, Freescale and of course Qualcomm platforms"
* tag 'soc-dt-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (846 commits)
arm64: dts: allwinner: h616: add crypto engine node
riscv: dts: add clock generator for Sophgo SG2042 SoC
arm64: dts: rockchip: Add Xunlong Orange Pi 3B
dt-bindings: arm: rockchip: Add Xunlong Orange Pi 3B
arm64: dts: rockchip: Add Radxa ROCK 3B
dt-bindings: arm: rockchip: Add Radxa ROCK 3B
mailmap: Update Luca Weiss's email address
ARM: dts: ixp4xx: nslu2: beeper uses PWM
arm64: dts: rockchip: add ROCK 5 ITX board
dt-bindings: arm: rockchip: Add ROCK 5 ITX board
arm64: dts: rockchip: Add dma-names to uart1 on Pine64 rk3566 devices
arm64: dts: rockchip: Add avdd supplies to hdmi on rock64
arm64: dts: qcom: msm8916-lg-c50: add initial dts for LG Leon LTE
arm64: dts: qcom: msm8916-lg-m216: Add initial device tree
dt-bindings: arm: qcom: Add msm8916 based LG devices
ARM: dts: qcom: msm8960: correct memory base
arm64: dts: qcom: ipq9574: Add icc provider ability to gcc
dt-bindings: interconnect: Add Qualcomm IPQ9574 support
arm64: dts: qcom: sm8150: Add video clock controller node
arm64: dts: qcom: pm6150: Add vibrator
...
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sdm845.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/qcom/sdm845.dtsi | 179 |
1 files changed, 155 insertions, 24 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 10de2bd46ffc..54077549b9da 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -15,6 +15,7 @@ #include <dt-bindings/dma/qcom-gpi.h> #include <dt-bindings/firmware/qcom,scm.h> #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interconnect/qcom,icc.h> #include <dt-bindings/interconnect/qcom,osm-l3.h> #include <dt-bindings/interconnect/qcom,sdm845.h> #include <dt-bindings/interrupt-controller/arm-gic.h> @@ -2666,6 +2667,8 @@ "ref_aux", "qref"; + power-domains = <&gcc UFS_PHY_GDSC>; + resets = <&ufs_mem_hc 0>; reset-names = "ufsphy"; @@ -4028,6 +4031,35 @@ #clock-cells = <1>; #phy-cells = <1>; + orientation-switch; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usb_1_qmpphy_out: endpoint { + }; + }; + + port@1 { + reg = <1>; + + usb_1_qmpphy_usb_ss_in: endpoint { + remote-endpoint = <&usb_1_dwc3_ss>; + }; + }; + + port@2 { + reg = <2>; + + usb_1_qmpphy_dp_in: endpoint { + remote-endpoint = <&dp_out>; + }; + }; + }; }; usb_2_qmpphy: phy@88eb000 { @@ -4106,8 +4138,29 @@ iommus = <&apps_smmu 0x740 0>; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; + snps,parkmode-disable-ss-quirk; phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usb_1_dwc3_hs: endpoint { + }; + }; + + port@1 { + reg = <1>; + + usb_1_dwc3_ss: endpoint { + remote-endpoint = <&usb_1_qmpphy_usb_ss_in>; + }; + }; + }; }; }; @@ -4161,6 +4214,7 @@ iommus = <&apps_smmu 0x760 0>; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; + snps,parkmode-disable-ss-quirk; phys = <&usb_2_hsphy>, <&usb_2_qmpphy>; phy-names = "usb2-phy", "usb3-phy"; }; @@ -4598,7 +4652,9 @@ port@1 { reg = <1>; - dp_out: endpoint { }; + dp_out: endpoint { + remote-endpoint = <&usb_1_qmpphy_dp_in>; + }; }; }; @@ -5105,6 +5161,78 @@ <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>; }; + anoc_1_tbu: tbu@150c5000 { + compatible = "qcom,sdm845-tbu"; + reg = <0x0 0x150c5000 0x0 0x1000>; + interconnects = <&system_noc MASTER_GNOC_SNOC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_IMEM_CFG QCOM_ICC_TAG_ACTIVE_ONLY>; + power-domains = <&gcc HLOS1_VOTE_AGGRE_NOC_MMU_TBU1_GDSC>; + qcom,stream-id-range = <&apps_smmu 0x0 0x400>; + }; + + anoc_2_tbu: tbu@150c9000 { + compatible = "qcom,sdm845-tbu"; + reg = <0x0 0x150c9000 0x0 0x1000>; + interconnects = <&system_noc MASTER_GNOC_SNOC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_IMEM_CFG QCOM_ICC_TAG_ACTIVE_ONLY>; + power-domains = <&gcc HLOS1_VOTE_AGGRE_NOC_MMU_TBU2_GDSC>; + qcom,stream-id-range = <&apps_smmu 0x400 0x400>; + }; + + mnoc_hf_0_tbu: tbu@150cd000 { + compatible = "qcom,sdm845-tbu"; + reg = <0x0 0x150cd000 0x0 0x1000>; + interconnects = <&mmss_noc MASTER_MDP0 QCOM_ICC_TAG_ACTIVE_ONLY + &mmss_noc SLAVE_MNOC_HF_MEM_NOC QCOM_ICC_TAG_ACTIVE_ONLY>; + power-domains = <&gcc HLOS1_VOTE_MMNOC_MMU_TBU_HF0_GDSC>; + qcom,stream-id-range = <&apps_smmu 0x800 0x400>; + }; + + mnoc_hf_1_tbu: tbu@150d1000 { + compatible = "qcom,sdm845-tbu"; + reg = <0x0 0x150d1000 0x0 0x1000>; + interconnects = <&mmss_noc MASTER_MDP0 QCOM_ICC_TAG_ACTIVE_ONLY + &mmss_noc SLAVE_MNOC_HF_MEM_NOC QCOM_ICC_TAG_ACTIVE_ONLY>; + power-domains = <&gcc HLOS1_VOTE_MMNOC_MMU_TBU_HF1_GDSC>; + qcom,stream-id-range = <&apps_smmu 0xc00 0x400>; + }; + + mnoc_sf_0_tbu: tbu@150d5000 { + compatible = "qcom,sdm845-tbu"; + reg = <0x0 0x150d5000 0x0 0x1000>; + interconnects = <&mmss_noc MASTER_CAMNOC_SF QCOM_ICC_TAG_ACTIVE_ONLY + &mmss_noc SLAVE_MNOC_SF_MEM_NOC QCOM_ICC_TAG_ACTIVE_ONLY>; + power-domains = <&gcc HLOS1_VOTE_MMNOC_MMU_TBU_SF_GDSC>; + qcom,stream-id-range = <&apps_smmu 0x1000 0x400>; + }; + + compute_dsp_tbu: tbu@150d9000 { + compatible = "qcom,sdm845-tbu"; + reg = <0x0 0x150d9000 0x0 0x1000>; + interconnects = <&system_noc MASTER_GNOC_SNOC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_IMEM_CFG QCOM_ICC_TAG_ACTIVE_ONLY>; + qcom,stream-id-range = <&apps_smmu 0x1400 0x400>; + }; + + adsp_tbu: tbu@150dd000 { + compatible = "qcom,sdm845-tbu"; + reg = <0x0 0x150dd000 0x0 0x1000>; + interconnects = <&system_noc MASTER_GNOC_SNOC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_IMEM_CFG QCOM_ICC_TAG_ACTIVE_ONLY>; + power-domains = <&gcc HLOS1_VOTE_AGGRE_NOC_MMU_AUDIO_TBU_GDSC>; + qcom,stream-id-range = <&apps_smmu 0x1800 0x400>; + }; + + anoc_1_pcie_tbu: tbu@150e1000 { + compatible = "qcom,sdm845-tbu"; + reg = <0x0 0x150e1000 0x0 0x1000>; + clocks = <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>; + interconnects = <&system_noc MASTER_GNOC_SNOC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_IMEM_CFG QCOM_ICC_TAG_ACTIVE_ONLY>; + power-domains = <&gcc HLOS1_VOTE_AGGRE_NOC_MMU_PCIE_TBU_GDSC>; + qcom,stream-id-range = <&apps_smmu 0x1c00 0x400>; + }; + lpasscc: clock-controller@17014000 { compatible = "qcom,sdm845-lpasscc"; reg = <0 0x17014000 0 0x1f004>, <0 0x17300000 0 0x200>; @@ -5358,7 +5486,6 @@ thermal-zones { cpu0-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens0 1>; @@ -5385,7 +5512,6 @@ cpu1-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens0 2>; @@ -5412,7 +5538,6 @@ cpu2-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens0 3>; @@ -5439,7 +5564,6 @@ cpu3-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens0 4>; @@ -5466,7 +5590,6 @@ cpu4-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens0 7>; @@ -5493,7 +5616,6 @@ cpu5-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens0 8>; @@ -5520,7 +5642,6 @@ cpu6-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens0 9>; @@ -5547,7 +5668,6 @@ cpu7-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens0 10>; @@ -5574,7 +5694,6 @@ aoss0-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens0 0>; @@ -5589,7 +5708,6 @@ cluster0-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens0 5>; @@ -5609,7 +5727,6 @@ cluster1-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens0 6>; @@ -5629,7 +5746,6 @@ gpu-top-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens0 11>; @@ -5642,16 +5758,27 @@ trips { gpu_top_alert0: trip-point0 { + temperature = <85000>; + hysteresis = <1000>; + type = "passive"; + }; + + trip-point1 { temperature = <90000>; - hysteresis = <2000>; + hysteresis = <1000>; type = "hot"; }; + + trip-point2 { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; }; }; gpu-bottom-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens0 12>; @@ -5664,16 +5791,27 @@ trips { gpu_bottom_alert0: trip-point0 { + temperature = <85000>; + hysteresis = <1000>; + type = "passive"; + }; + + trip-point1 { temperature = <90000>; - hysteresis = <2000>; + hysteresis = <1000>; type = "hot"; }; + + trip-point2 { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; }; }; aoss1-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens1 0>; @@ -5688,7 +5826,6 @@ q6-modem-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens1 1>; @@ -5703,7 +5840,6 @@ mem-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens1 2>; @@ -5718,7 +5854,6 @@ wlan-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens1 3>; @@ -5733,7 +5868,6 @@ q6-hvx-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens1 4>; @@ -5748,7 +5882,6 @@ camera-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens1 5>; @@ -5763,7 +5896,6 @@ video-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens1 6>; @@ -5778,7 +5910,6 @@ modem-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens1 7>; |