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authorDavid Lechner <david@lechnology.com>2018-05-25 13:11:43 -0500
committerMichael Turquette <mturquette@baylibre.com>2018-05-30 12:47:55 -0700
commit6ce190bc424bd951c5ab94b875f650b365570707 (patch)
tree105c60b465fe35f76511be964db654d3f5ea8994 /drivers/clk/davinci
parentb4d73d224d9bc6881266fd95ab11ef738ef7333f (diff)
clk: davinci: pll-dm355: fix SYSCLKn parent names
This fixes the parent clock names of the SYSCLKn clocks for the DM355 SoC in the TI DaVinici PLL clock driver. It appears that this name just didn't get updated to the correct name like the other SoCs during the driver's development. Reported-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: David Lechner <david@lechnology.com> Acked-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20180525181150.17873-3-david@lechnology.com
Diffstat (limited to 'drivers/clk/davinci')
-rw-r--r--drivers/clk/davinci/pll-dm355.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/clk/davinci/pll-dm355.c b/drivers/clk/davinci/pll-dm355.c
index 718d9bbbf30d..93f4a53d6b44 100644
--- a/drivers/clk/davinci/pll-dm355.c
+++ b/drivers/clk/davinci/pll-dm355.c
@@ -22,10 +22,10 @@ static const struct davinci_pll_clk_info dm355_pll1_info = {
PLL_POSTDIV_ALWAYS_ENABLED | PLL_POSTDIV_FIXED_DIV,
};
-SYSCLK(1, pll1_sysclk1, pll1, 5, SYSCLK_FIXED_DIV | SYSCLK_ALWAYS_ENABLED);
-SYSCLK(2, pll1_sysclk2, pll1, 5, SYSCLK_FIXED_DIV | SYSCLK_ALWAYS_ENABLED);
-SYSCLK(3, pll1_sysclk3, pll1, 5, SYSCLK_ALWAYS_ENABLED);
-SYSCLK(4, pll1_sysclk4, pll1, 5, SYSCLK_ALWAYS_ENABLED);
+SYSCLK(1, pll1_sysclk1, pll1_pllen, 5, SYSCLK_FIXED_DIV | SYSCLK_ALWAYS_ENABLED);
+SYSCLK(2, pll1_sysclk2, pll1_pllen, 5, SYSCLK_FIXED_DIV | SYSCLK_ALWAYS_ENABLED);
+SYSCLK(3, pll1_sysclk3, pll1_pllen, 5, SYSCLK_ALWAYS_ENABLED);
+SYSCLK(4, pll1_sysclk4, pll1_pllen, 5, SYSCLK_ALWAYS_ENABLED);
int dm355_pll1_init(struct device *dev, void __iomem *base)
{
@@ -62,7 +62,7 @@ static const struct davinci_pll_clk_info dm355_pll2_info = {
PLL_POSTDIV_ALWAYS_ENABLED | PLL_POSTDIV_FIXED_DIV,
};
-SYSCLK(1, pll2_sysclk1, pll2, 5, SYSCLK_FIXED_DIV | SYSCLK_ALWAYS_ENABLED);
+SYSCLK(1, pll2_sysclk1, pll2_pllen, 5, SYSCLK_FIXED_DIV | SYSCLK_ALWAYS_ENABLED);
int dm355_pll2_init(struct device *dev, void __iomem *base)
{