summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk07.1-c1.dts
blob: 41c5874f6f976bd5f03d592d39eed8c7ac5a66a7 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2018, The Linux Foundation. All rights reserved.

#include <dt-bindings/gpio/gpio.h>
#include "qcom-ipq4019-ap.dk07.1.dtsi"

/ {
	model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1-C1";
	compatible = "qcom,ipq4019-ap-dk07.1-c1", "qcom,ipq4019";

	soc {
		pci@40000000 {
			status = "okay";
			perst-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
		};

		spi@78b6000 {
			status = "okay";
		};

		pinctrl@1000000 {
			serial_1_pins: serial1-state {
				pins = "gpio8", "gpio9",
					"gpio10", "gpio11";
				function = "blsp_uart1";
				bias-disable;
			};

			spi_0_pins: spi-0-state {
				spi0-pins {
					function = "blsp_spi0";
					pins = "gpio13", "gpio14", "gpio15";
					bias-disable;
				};
				spio-cs-pins {
					function = "gpio";
					pins = "gpio12";
					bias-disable;
					output-high;
				};
			};
		};

		serial@78b0000 {
			pinctrl-0 = <&serial_1_pins>;
			pinctrl-names = "default";
			status = "okay";
		};

		spi@78b5000 {
			pinctrl-0 = <&spi_0_pins>;
			pinctrl-names = "default";
			status = "okay";
			cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;

			flash@0 {
				#address-cells = <1>;
				#size-cells = <1>;
				reg = <0>;
				compatible = "micron,n25q128a11", "jedec,spi-nor";
				spi-max-frequency = <24000000>;
			};
		};
	};
};