Age | Commit message (Expand) | Author |
---|---|---|
2022-06-03 | LoongArch: Add writecombine support for drm | Huacai Chen |
2022-02-07 | dma-buf-map: Rename to iosys-map | Lucas De Marchi |
2021-06-07 | drm: Add a prefetching memcpy_from_wc | Thomas Hellström |
2019-10-31 | MIPS: Loongson64: Rename CPU TYPES | Jiaxun Yang |
2019-02-20 | drm: change func to better detect wether swiotlb is needed | Michael D Labriola |
2019-02-06 | drm: disable uncached DMA optimization for ARM and arm64 | Ard Biesheuvel |
2018-02-13 | drm: add func to get max iomem address v2 | Chunming Zhou |
2017-01-10 | drm: Move drm_clflush prototypes to drm_cache header file | Gabriel Krisman Bertazi |
2016-04-22 | drm: Loongson-3 doesn't fully support wc memory | Huacai Chen |
2016-02-02 | drm: add helper to check for wc memory support | Dave Airlie |
2009-08-27 | drm/ttm: consolidate cache flushing code in one place. | Dave Airlie |