Age | Commit message (Expand) | Author |
---|---|---|
2023-10-10 | x86/cpu: Move cpu_l[l2]c_id into topology info | Thomas Gleixner |
2022-11-10 | x86/cacheinfo: Switch cache_ap_init() to hotplug callback | Juergen Gross |
2022-11-10 | x86/mtrr: Add a stop_machine() handler calling only cache_cpu_init() | Juergen Gross |
2022-11-10 | x86/mtrr: Let cache_aps_delayed_init replace mtrr_aps_delayed_init | Juergen Gross |
2022-11-10 | x86/mtrr: Disentangle MTRR init from PAT init | Juergen Gross |
2022-11-10 | x86/mtrr: Rename prepare_set() and post_set() | Juergen Gross |
2022-11-10 | x86/mtrr: Replace use_intel() with a local flag | Juergen Gross |
2020-11-19 | x86/CPU/AMD: Save AMD NodeId as cpu_die_id | Yazen Ghannam |
2018-09-27 | x86/cpu: Get cache info and setup cache cpumap for Hygon Dhyana | Pu Wen |
2018-05-06 | x86/CPU/AMD: Calculate last level cache ID from number of sharing threads | Suravee Suthikulpanit |