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2023-06-12arm: docs: Move Arm documentation to Documentation/arch/Jonathan Corbet
Architecture-specific documentation is being moved into Documentation/arch/ as a way of cleaning up the top-level documentation directory and making the docs hierarchy more closely match the source hierarchy. Move Documentation/arm into arch/ (along with the Chinese equvalent translations). Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: Jernej Skrabec <jernej.skrabec@gmail.com> Cc: Samuel Holland <samuel@sholland.org> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Cc: Alim Akhtar <alim.akhtar@samsung.com> Cc: Alex Shi <alexs@kernel.org> Cc: linux-doc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-arch@vger.kernel.org Acked-by: Alexandre TORGUE <alexandre.torgue@foss.st.com> Reviewed-by: Yanteng Si <siyanteng@loongson.cn> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2023-04-25Merge tag 'soc-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull ARM SoC devicetree updates from Arnd Bergmann: "The devicetree changes overall are again dominated by the Qualcomm Snapdragon platform that weighs in at over 300 changesets, but there are many updates across other platforms as well, notably Mediatek, NXP, Rockchips, Renesas, TI, Samsung and ST Microelectronics. These all add new features for existing machines, as well as new machines and SoCs. The newly added SoCs are: - Allwinner T113-s, an Cortex-A7 based variant of the RISC-V based D1 chip. - StarFive JH7110, a RISC-V SoC based on the Sifive U74 core like its JH7100 predecessor, but with additional CPU cores and a GPU. - Apple M2 as used in current Macbook Air/Pro and Mac Mini gets added, with comparable support as its M1 predecessor. - Unisoc UMS512 (Tiger T610) is a midrange smartphone SoC - Qualcomm IPQ5332 and IPQ9574 are Wi-Fi 7 networking SoCs, based on the Cortex-A53 and Cortex-A73 cores, respectively. - Qualcomm sa8775p is an automotive SoC derived from the Snapdragon family. Including the initial board support for the added SoC platforms, there are 52 new machines. The largest group are 19 boards industrial embedded boards based on the NXP i.MX6 (32-bit) and i.MX8 (64-bit) families. Others include: - Two boards based on the Allwinner f1c200s ultra-low-cost chip - Three 'Banana Pi' variants based on the Amlogic g12b (A311D, S922X) SoC. - The Gl.Inet mv1000 router based on Marvell Armada 3720 - A Wifi/LTE Dongle based on Qualcomm msm8916 - Two robotics boards based on Qualcomm QRB chips - Three Snapdragon based phones made by Xiaomi - Five developments boards based on various Rockchip SoCs, including the rk3588s-khadas-edge2 and a few NanoPi models - The AM625 Beagleplay industrial SBC Another 14 machines get removed: both boards for the obsolete 'oxnas' platform, three boards for the Renesas r8a77950 SoC that were only for pre-production chips, and various chromebook models based on the Qualcomm Sc7180 'trogdor' design that were never part of products" * tag 'soc-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (836 commits) arm64: dts: rockchip: Add support for volume keys to rk3399-pinephone-pro arm64: dts: rockchip: Add vdd_cpu_big regulators to rk3588-rock-5b arm64: dts: rockchip: Use generic name for es8316 on Pinebook Pro and Rock 5B arm64: dts: rockchip: Drop RTC clock-frequency on rk3588-rock-5b arm64: dts: apple: t8112: Add PWM controller arm64: dts: apple: t600x: Add PWM controller arm64: dts: apple: t8103: Add PWM controller arm64: dts: rockchip: Add pinctrl gpio-ranges for rk356x ARM: dts: nomadik: Replace deprecated spi-gpio properties ARM: dts: aspeed-g6: Add UDMA node ARM: dts: aspeed: greatlakes: add mctp device ARM: dts: aspeed: greatlakes: Add gpio names ARM: dts: aspeed: p10bmc: Change power supply info arm64: dts: mediatek: mt6795-xperia-m5: Add Bosch BMM050 Magnetometer arm64: dts: mediatek: mt6795-xperia-m5: Add Bosch BMA255 Accelerometer arm64: dts: mediatek: mt6795: Add tertiary PWM node arm64: dts: rockchip: add panel to Anbernic RG353 series dt-bindings: arm: Add Data Modul i.MX8M Plus eDM SBC dt-bindings: arm: fsl: Add chargebyte Tarragon dt-bindings: vendor-prefixes: add chargebyte ...
2023-04-20Documentation: arm: remove stih415/stih416 related entriesAlain Volmat
ST's STiH415 and STiH416 platforms support have been removed since a long time already. This commit updates the sti related documentation overview to remove related entries and update the sti part to add STiH407/STiH410 and STiH418 platforms which are still actively supported. Signed-off-by: Alain Volmat <avolmat@me.com> Link: https://lore.kernel.org/r/20230416185349.18156-1-avolmat@me.com Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2023-04-07ARM: stm32: add initial documentation for STM32MP151Roan van Dijk
This patch adds initial documentation of STM32MP151 microprocessor (MPU) based on Arm Cortex-A7. Signed-off-by: Roan van Dijk <roan@protonic.nl> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-01-16ARM: s3c: remove all s3c24xx supportArnd Bergmann
The platform was deprecated in commit 6a5e69c7ddea ("ARM: s3c: mark as deprecated and schedule removal") and can be removed. This includes all files that are exclusively for s3c24xx and not shared with s3c64xx, as well as the glue logic in Kconfig and the maintainer file entries. Cc: Arnaud Patard <arnaud.patard@rtp-net.org> Cc: Ben Dooks <ben-linux@fluff.org> Cc: Christer Weinigel <christer@weinigel.se> Cc: Guillaume GOURAT <guillaume.gourat@nexvision.tv> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Simtec Linux Team <linux@simtec.co.uk> Cc: openmoko-kernel@lists.openmoko.org Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-01Documentation: arm: marvell: Add Orion codenames and archive homepagePali Rohár
Orion codenames are extracted from menuconfig ARCH_ORION5X and old Orion homepage with 88F5182/88F5281 was found in web archive. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20220719080807.16729-1-pali@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2022-10-09Merge tag 'efi-next-for-v6.1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/efi/efi Pull EFI updates from Ard Biesheuvel: "A bit more going on than usual in the EFI subsystem. The main driver for this has been the introduction of the LoonArch architecture last cycle, which inspired some cleanup and refactoring of the EFI code. Another driver for EFI changes this cycle and in the future is confidential compute. The LoongArch architecture does not use either struct bootparams or DT natively [yet], and so passing information between the EFI stub and the core kernel using either of those is undesirable. And in general, overloading DT has been a source of issues on arm64, so using DT for this on new architectures is a to avoid for the time being (even if we might converge on something DT based for non-x86 architectures in the future). For this reason, in addition to the patch that enables EFI boot for LoongArch, there are a number of refactoring patches applied on top of which separate the DT bits from the generic EFI stub bits. These changes are on a separate topich branch that has been shared with the LoongArch maintainers, who will include it in their pull request as well. This is not ideal, but the best way to manage the conflicts without stalling LoongArch for another cycle. Another development inspired by LoongArch is the newly added support for EFI based decompressors. Instead of adding yet another arch-specific incarnation of this pattern for LoongArch, we are introducing an EFI app based on the existing EFI libstub infrastructure that encapulates the decompression code we use on other architectures, but in a way that is fully generic. This has been developed and tested in collaboration with distro and systemd folks, who are eager to start using this for systemd-boot and also for arm64 secure boot on Fedora. Note that the EFI zimage files this introduces can also be decompressed by non-EFI bootloaders if needed, as the image header describes the location of the payload inside the image, and the type of compression that was used. (Note that Fedora's arm64 GRUB is buggy [0] so you'll need a recent version or switch to systemd-boot in order to use this.) Finally, we are adding TPM measurement of the kernel command line provided by EFI. There is an oversight in the TCG spec which results in a blind spot for command line arguments passed to loaded images, which means that either the loader or the stub needs to take the measurement. Given the combinatorial explosion I am anticipating when it comes to firmware/bootloader stacks and firmware based attestation protocols (SEV-SNP, TDX, DICE, DRTM), it is good to set a baseline now when it comes to EFI measured boot, which is that the kernel measures the initrd and command line. Intermediate loaders can measure additional assets if needed, but with the baseline in place, we can deploy measured boot in a meaningful way even if you boot into Linux straight from the EFI firmware. Summary: - implement EFI boot support for LoongArch - implement generic EFI compressed boot support for arm64, RISC-V and LoongArch, none of which implement a decompressor today - measure the kernel command line into the TPM if measured boot is in effect - refactor the EFI stub code in order to isolate DT dependencies for architectures other than x86 - avoid calling SetVirtualAddressMap() on arm64 if the configured size of the VA space guarantees that doing so is unnecessary - move some ARM specific code out of the generic EFI source files - unmap kernel code from the x86 mixed mode 1:1 page tables" * tag 'efi-next-for-v6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/efi/efi: (24 commits) efi/arm64: libstub: avoid SetVirtualAddressMap() when possible efi: zboot: create MemoryMapped() device path for the parent if needed efi: libstub: fix up the last remaining open coded boot service call efi/arm: libstub: move ARM specific code out of generic routines efi/libstub: measure EFI LoadOptions efi/libstub: refactor the initrd measuring functions efi/loongarch: libstub: remove dependency on flattened DT efi: libstub: install boot-time memory map as config table efi: libstub: remove DT dependency from generic stub efi: libstub: unify initrd loading between architectures efi: libstub: remove pointless goto kludge efi: libstub: simplify efi_get_memory_map() and struct efi_boot_memmap efi: libstub: avoid efi_get_memory_map() for allocating the virt map efi: libstub: drop pointless get_memory_map() call efi: libstub: fix type confusion for load_options_size arm64: efi: enable generic EFI compressed boot loongarch: efi: enable generic EFI compressed boot riscv: efi: enable generic EFI compressed boot efi/libstub: implement generic EFI zboot efi/libstub: move efi_system_table global var into separate object ...
2022-09-27efi: libstub: unify initrd loading between architecturesArd Biesheuvel
Use a EFI configuration table to pass the initrd to the core kernel, instead of per-arch methods. This cleans up the code considerably, and should make it easier for architectures to get rid of their reliance on DT for doing EFI boot in the future. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2022-09-04docs: arm: stm32: introduce STM32 DMA-MDMA chaining featureAmelie Delaunay
STM32 DMA-MDMA chaining feature is available on STM32 SoCs which embed STM32 DMAMUX, DMA and MDMA controllers. It is the case on STM32MP1 SoCs but also on STM32H7 SoCs. But focus is on STM32MP1 SoCs, using DDR. This documentation aims to explain how to use STM32 DMA-MDMA chaining feature in drivers of STM32 peripheral having request lines on STM32 DMA. Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Link: https://lore.kernel.org/r/20220829154646.29867-4-amelie.delaunay@foss.st.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-08-04Merge tag 'spdx-6.0-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/spdx Pull SPDX updates from Greg KH: "Here is the set of SPDX comment updates for 6.0-rc1. Nothing huge here, just a number of updated SPDX license tags and cleanups based on the review of a number of common patterns in GPLv2 boilerplate text. Also included in here are a few other minor updates, two USB files, and one Documentation file update to get the SPDX lines correct. All of these have been in the linux-next tree for a very long time" * tag 'spdx-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/spdx: (28 commits) Documentation: samsung-s3c24xx: Add blank line after SPDX directive x86/crypto: Remove stray comment terminator treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_406.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_398.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_391.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_390.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_385.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_320.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_319.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_318.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_298.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_292.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_179.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_168.RULE (part 2) treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_168.RULE (part 1) treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_160.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_152.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_149.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_147.RULE treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_133.RULE ...
2022-07-14Merge tag 'qcom-arm64-for-5.20' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm ARM64 DTS updates for v5.20 This introduces initial support for Lenovo ThinkPad X13s, Qualcomm 8cx Gen 3 Compute Reference Device, SA8295P Automotive Development Platform, Xiaomi Mi 5s Plus, five new SC7180 Chrome OS boards, Inforce IFC6560, LG G7 ThinQ and LG V35 ThinQ. With IPQ8074 gaining GDSC support, this was expressed in the gcc node and defined for the USB nodes. The SDHCI reset line was defined to get the storage devices into a known state. For MSM8996 interconnect providers, the second DSI interface, resets for SDHCI are introduced. Support for the Xiaomi Mi 5s Plus is introduced and the Dragonboard 820c gains definitions for its LEDs. The MSM8998 platform changes consists of a various cleanup patches, the FxTec Pro1 is split out from using the MTP dts and Sony Xperia devices on the "Yoshino" platform gains ToF sensor. On SC7180 five new Trogdor based boards are added and the description of keyboard and detachables is improved. On the SC7280-based Herobrine board DisplayPort is enabled, SPI flash clock rate is changed, WiFi is enabled and the modem firmware path is updated. The Villager boards gains touchscreen, and keyboard backlight. This introduces initial support for the SC8280XP (aka 8cx Gen 3) and related automotive platforms are introduced, with support for the Qualcomm reference board, the Lenovo Thinkpad X13s and the SA8295P Automotive Development Platform. In addition to a wide range of smaller fixes on the SDM630 and SDM660 platforms, support for the secondary high speed USB controller is introduced and the Sony Xperia "Nile" platform gains support for the RGB status LED. Support for the Inforce IFC6560 board is introduced. On SDM845 the bandwidth monitor for the CPU subsystem is introduced, to scale LLCC clock rate based on profiling. CPU and cluster idle states are switched to OSI hierarchical states. DB845c and SHIFT 6mq gains LED support and new support for the LG G7 ThinQ and LG V35 ThinQ boards are added. DLL/DDR configuration for SDHCI nodes are defined for SM6125. On SM8250 the GPU per-process page tables is enabled and for RB5 the Light Pulse Generator-based LEDs are added. The display clock controller is introduced for SM8350. On SM8450 this introduces the camera clock controller and the UART typically used for Bluetooth. The interconnect path for the crypto engine is added to the SCM node, to ensure this is adequately clocked. The assigned-clock-rate for the display processor is dropped from several platforms, now that the driver derrives the min and max from the clock. In addition to this a wide range of fixes for stylistic issues and issues discovered through Devicetree binding validation across many platforms and boards are introduced. * tag 'qcom-arm64-for-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (193 commits) arm64: dts: qcom: sc8280xp: fix DP PHY node unit addresses arm64: dts: qcom: sc8280xp: fix usb_0 HS PHY ref clock arm64: dts: qcom: sc7280: fix PCIe clock reference docs: arm: index.rst: add google/chromebook-boot-flow arm64: dts: qcom: msm8996: clean up PCIe PHY node arm64: dts: qcom: msm8996: use non-empty ranges for PCIe PHYs arm64: dts: qcom: sm8450: drop UFS PHY clock-cells arm64: dts: qcom: sm8250: drop UFS PHY clock-cells arm64: dts: qcom: sc8280xp: drop UFS PHY clock-cells arm64: dts: qcom: sm8450: drop USB PHY clock index arm64: dts: qcom: sm8350: drop USB PHY clock index arm64: dts: qcom: msm8998: drop USB PHY clock index arm64: dts: qcom: ipq8074: drop USB PHY clock index arm64: dts: qcom: ipq6018: drop USB PHY clock index arm64: dts: qcom: sm8250: add missing PCIe PHY clock-cells arm64: dts: qcom: sc7280: drop PCIe PHY clock index Revert "arm64: dts: qcom: Fix 'reg-names' for sdhci nodes" arm64: dts: qcom: sc7180-idp: add vdds supply to the DSI PHY arm64: dts: qcom: sc7280: use constants for gpucc clocks and power-domains arm64: dts: qcom: msm8996: add missing DSI clock assignments ... Link: https://lore.kernel.org/r/20220713203939.1431054-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-08docs: arm: index.rst: add google/chromebook-boot-flowMauro Carvalho Chehab
This document was added without placing it at arm book. Fixes: 59228d3b9060 ("dt-bindings: Document how Chromebooks with depthcharge boot") Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/0ae8251f97c642cfd618f2e32eb1e66339e5dfde.1656759989.git.mchehab@kernel.org
2022-06-27Documentation: samsung-s3c24xx: Add blank line after SPDX directiveBagas Sanjaya
After merging spdx tree for linux-next testing, Stephen Rothwell reported htmldocs warning: Documentation/arm/samsung-s3c24xx/cpufreq.rst:2: WARNING: Explicit markup ends without a blank line; unexpected unindent. It is due to missing blank line separator between SPDX directive and page title. Add the blank line to fix the warning. Link: https://lore.kernel.org/linux-next/20220614164506.6afd65a6@canb.auug.org.au/ Fixes: b7bc1c9e5b04da ("treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_147.RULE") Cc: Jonathan Corbet <corbet@lwn.net> Cc: Allison Randal <allison@lohutok.net> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-kernel@vger.kernel.org Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Bagas Sanjaya <bagasdotme@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-06-25dt-bindings: Document how Chromebooks with depthcharge bootDouglas Anderson
This documents how many Chromebooks pick the device tree that will be passed to the OS and can help understand the revisions / SKUs listed as the top-level "compatible" in many Chromebooks. Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220520143502.v4.1.I71e42c6174f1cec17da3024c9f73ba373263b9b6@changeid
2022-06-10treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_147.RULEThomas Gleixner
Based on the normalized pattern: licensed under gplv2 extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference. Reviewed-by: Allison Randal <allison@lohutok.net> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-06-09docs: arm: tcm: Fix typo in description of TCM and MMU usageSimon Horman
Correct a typo in the description of interaction between the TCM and MMU. Found by inspection. Signed-off-by: Simon Horman <simon.horman@corigine.com> Link: https://lore.kernel.org/r/20220609184230.627958-1-simon.horman@corigine.com Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2022-05-31ARM: pxa/mmp: remove traces of plat-pxaArnd Bergmann
The missing include directory caused a W=1 warning that can be trivially fixed. I also noticed references in the marvell.rst documentation that can be removed at the same time. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-01-27Documentation: arm: marvell: Extend Avanta listPali Rohár
Include another two SoCs from Avanta family. Signed-off-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/20220121115804.28824-1-pali@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-11-15Documentation: arm: marvell: Fix link to armada_1000_pb.pdf documentPali Rohár
File armada_1000_pb.pdf is not available on Marvell website anymore. So update link to webarchive where is backup copy. Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-11-15Documentation: arm: marvell: Put Armada XP section between Armada 370 and 375Pali Rohár
From evolution and feature point of view Armada XP belongs between Armada 370 and Armada 375 families. Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-11-15Documentation: arm: marvell: Add some links to homepage / product infosPali Rohár
Webarchive contains some useful resources like product info or links to other documents. Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-11-03Merge tag 'soc-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull ARM SoC updates from Arnd Bergmann: "The SoC updates this time are mainly removing obsolete code from the OMAP2 platform, another step in the eternal cleanup of that platform. There are two new SoCs getting added: STMicroelectronics stm32mp13 and Microchip lan966. Both fit into existing platforms and require minimal changes here. A couple of MAINTAINER file updates relate to those changes, and update some file paths" * tag 'soc-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (28 commits) MAINTAINERS: Update BCM7XXX entry with additional patterns MAINTAINERS: add pinctrl-apple-gpio to ARM/APPLE MACHINE MAINTAINERS: Add pasemi i2c to ARM/APPLE MACHINE ARM: SPEAr: Update MAINTAINERS entries ARM: OMAP2+: Drop unused CM defines for am3 ARM: OMAP2+: Drop unused CM and SCRM defines for omap4 ARM: OMAP2+: Drop unused CM and SCRM defines for omap5 ARM: OMAP2+: Drop unused CM defines for dra7 ARM: OMAP2+: Drop unused PRM defines for am3 ARM: OMAP2+: Drop unused PRM defines for am4 ARM: OMAP2+: Drop unused PRM defines for omap4 ARM: OMAP2+: Drop unused PRM defines for omap5 ARM: OMAP2+: Drop unused PRM defines for dra7 ARM: OMAP2+: Fix comment typo ARM: OMAP2+: Fix typo in some comments ARM: at91: add basic support for new SoC family lan966 dt-bindings: arm: at91: Document lan966 pcb8291 and pcb8290 boards ARM: at91: Documentation: add lan966 family ARM: at91: Documentation: add sama7g5 family MAINTAINERS: add an entry for NXP S32G boards ...
2021-10-20Merge tag 'stm32-soc-for-v5.16-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/soc STM32 SoC for v5.16, round 1 Highlights: ---------- Add support of new STM32MP13 SoC which enhances current STM32 MPU family. It is mainly a derivative of STM32MP15 SoCs (one Cortex-A7 plus standard peripherals). The STM32MP13 SoC diversity is composed by: -STM32MP131: -core: 1*CA7, 17*TIMERS, 5*LPTIMERS, DMA/MDMA/DMAMUX -storage: 3*SDMCC, 1*QSPI, FMC -com: USB (OHCI/EHCI, OTG), 5*I2C, 5*SPI/I2S, 8*U(S)ART -audio: 2*SAI -network: 1*ETH(GMAC) -STM32MP133: STM32MP131 + 2*CAN, ETH2(GMAC), ADC1 -STM32MP135: STM32MP133 + DCMIPP, LTDC * tag 'stm32-soc-for-v5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: ARM: stm32: add initial support for STM32MP13 family docs: arm: stm32: introduce STM32MP13 SoCs Link: https://lore.kernel.org/r/0b6c9657-dcca-3bad-601f-610dfc81d9ae@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-04ARM: at91: Documentation: add lan966 familyKavyasree Kotagiri
Add the new LAN966 ARMv7 based SoC family from Microchip. Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> [nicolas.ferre@microchip.com: move entry as part of new Cortex-A7 core type] Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20211004105926.5696-3-kavyasree.kotagiri@microchip.com
2021-10-04ARM: at91: Documentation: add sama7g5 familyNicolas Ferre
Add the new SAMA7G5 ARMv7 based SoC family from Microchip to the AT91 documentation. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2021-09-27Documentation: arm: marvell: Add link to Orion Functional Errata documentPali Rohár
Signed-off-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/20210704181110.9254-1-pali@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-09-21Documentation: arm: marvell: Add Octeon TX2 CN913x FlavorsPali Rohár
Marvell put CN913x into Octeon TX2 family but they are different from all other Octeon TX2 products. Instead CN913x is evolution from Armada 7k/8k products. Signed-off-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/20210919143348.24338-1-pali@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-09-21Documentation: arm: marvell: Add 88F6040 model into listPali Rohár
Signed-off-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/20210919143327.24289-1-pali@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-09-20docs: arm: stm32: introduce STM32MP13 SoCsAlexandre Torgue
STM32MP13 SoCs are derivative of STM32MP15 SoCs. They embed one Cortex-A7 plus standard connectivity. Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
2021-08-24Documentation: arm: marvell: Add 88F6825 model into listPali Rohár
88F6825 is just 88F6820 but without encryption acceleration hardware and is used e.g. in DTS file arch/arm/boot/dts/armada-385-clearfog-gtr.dtsi Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20210814124805.14568-1-pali@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-07-15Documentation: arm: marvell: Add few missing models and documentation filesPali Rohár
Signed-off-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/20210625215437.2156-1-pali@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-06-04docs: Fix typo in Documentation/arm/marvell.rstNobuhiro Iwamatsu
Fix typo in the documentation, changed from 'comatible' to 'compatible. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Link: https://lore.kernel.org/r/20210531134235.720351-1-iwamatsu@nigauri.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-04-26Merge tag 'docs-5.13' of git://git.lwn.net/linuxLinus Torvalds
Pull documentation updates from Jonathan Corbet: "It's been a relatively busy cycle in docsland, though more than usually well contained to Documentation/ itself. Highlights include: - The Chinese translators have been busy and show no signs of stopping anytime soon. Italian has also caught up. - Aditya Srivastava has been working on improvements to the kernel-doc script. - Thorsten continues his work on reporting-issues.rst and related documentation around regression reporting. - Lots of documentation updates, typo fixes, etc. as usual" * tag 'docs-5.13' of git://git.lwn.net/linux: (139 commits) docs/zh_CN: add openrisc translation to zh_CN index docs/zh_CN: add openrisc index.rst translation docs/zh_CN: add openrisc todo.rst translation docs/zh_CN: add openrisc openrisc_port.rst translation docs/zh_CN: add core api translation to zh_CN index docs/zh_CN: add core-api index.rst translation docs/zh_CN: add core-api irq index.rst translation docs/zh_CN: add core-api irq irqflags-tracing.rst translation docs/zh_CN: add core-api irq irq-domain.rst translation docs/zh_CN: add core-api irq irq-affinity.rst translation docs/zh_CN: add core-api irq concepts.rst translation docs: sphinx-pre-install: don't barf on beta Sphinx releases scripts: kernel-doc: improve parsing for kernel-doc comments syntax docs/zh_CN: two minor fixes in zh_CN/doc-guide/ Documentation: dev-tools: Add Testing Overview docs/zh_CN: add translations in zh_CN/dev-tools/gcov docs: reporting-issues: make people CC the regressions list MAINTAINERS: add regressions mailing list doc:it_IT: align Italian documentation docs/zh_CN: sync reporting-issues.rst ...
2021-04-01Documentation: arm: stm32: Add stm32h750 value line docdillon min
This patchset add support for soc stm32h750, stm32h750 has mirror different from stm32h743 item stm32h743 stm32h750 flash size: 2MiB 128KiB adc: none 3 crypto-hash: none aes/hamc/des/tdes/md5/sha detail information can be found at: https://www.st.com/en/microcontrollers-microprocessors/stm32h750-value-line.html Signed-off-by: dillon min <dillon.minfei@gmail.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-06docs: arm: /chosen node parametersHeinrich Schuchardt
Add missing items to table of parameters set in the /chosen node by the EFI stub. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Link: https://lore.kernel.org/r/20210206084120.43305-1-xypron.glpk@gmx.de Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-03-06docs: arm: marvell: clarify some unimportant Armada 6x0 detailsLubomir Rintel
MMP2 is used in XO-1.75 and MMP3 is now supported in mainline. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Link: https://lore.kernel.org/r/20210215220839.423709-4-lkundrak@v3.sk Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-03-06docs: arm: marvell: replace stale links with archive linksLubomir Rintel
Marvell has an annoying habit of moving stuff around their web site every full moon, and often just removing documents altogether. At this point basically none but four of the links still works and even those that work today weren't working for a long period of time previously. That is a shame because (short of the product briefs) the documents tend to be quite useful. Let's replace them with known working versions of IA's Wayback Machine links. That seems to be about the only way of getting a URL that's going to work the next week. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Link: https://lore.kernel.org/r/20210215220839.423709-2-lkundrak@v3.sk Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-01-28Documentation: ARM: fix reference to DT format documentationBaruch Siach
The booting-without-of.rst file is no longer there. Link to devicetree.org instead. Fixes: 441848282c590 ("dt: Remove booting-without-of.rst") Signed-off-by: Baruch Siach <baruch@tkos.co.il> Cc: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/7f07e544d9fc584242d496c2f54f9303d8de0724.1611558630.git.baruch@tkos.co.il Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-01-28Documentation: arm: marvell: Update link to unrestricted Armada 38x ↵Pali Rohár
Functional Spec On Marvell website is documentation accessible without need to register or fill any other forms. Signed-off-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/20210125141529.32357-1-pali@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-01-28Documentation: arm: marvell: Fix dead link to Armada 37xx Product BriefPali Rohár
Signed-off-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/20210125141341.32200-1-pali@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-01-28Documentation: arm: marvell: Add link to public Armada 37xx Hardware SpecPali Rohár
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20210121193418.22678-2-pali@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-01-28Documentation: arm: Fix marvell file namePali Rohár
Fixes: dc7a12bdfccd ("docs: arm: convert docs to ReST and rename to *.rst") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20210121193418.22678-1-pali@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2020-12-22Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linuxLinus Torvalds
Pull ARM updates from Russell King: - Rework phys/virt translation - Add KASan support - Move DT out of linear map region - Use more PC-relative addressing in assembly - Remove FP emulation handling while in kernel mode - Link with '-z norelro' - remove old check for GCC <= 4.2 in ARM unwinder code - disable big endian if using clang's linker * tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: (46 commits) ARM: 9027/1: head.S: explicitly map DT even if it lives in the first physical section ARM: 9038/1: Link with '-z norelro' ARM: 9037/1: uncompress: Add OF_DT_MAGIC macro ARM: 9036/1: uncompress: Fix dbgadtb size parameter name ARM: 9035/1: uncompress: Add be32tocpu macro ARM: 9033/1: arm/smp: Drop the macro S(x,s) ARM: 9032/1: arm/mm: Convert PUD level pgtable helper macros into functions ARM: 9031/1: hyp-stub: remove unused .L__boot_cpu_mode_offset symbol ARM: 9044/1: vfp: use undef hook for VFP support detection ARM: 9034/1: __div64_32(): straighten up inline asm constraints ARM: 9030/1: entry: omit FP emulation for UND exceptions taken in kernel mode ARM: 9029/1: Make iwmmxt.S support Clang's integrated assembler ARM: 9028/1: disable KASAN in call stack capturing routines ARM: 9026/1: unwind: remove old check for GCC <= 4.2 ARM: 9025/1: Kconfig: CPU_BIG_ENDIAN depends on !LD_IS_LLD ARM: 9024/1: Drop useless cast of "u64" to "long long" ARM: 9023/1: Spelling s/mmeory/memory/ ARM: 9022/1: Change arch/arm/lib/mem*.S to use WEAK instead of .weak ARM: kvm: replace open coded VA->PA calculations with adr_l call ARM: head.S: use PC relative insn sequence to calculate PHYS_OFFSET ...
2020-12-16Merge tag 'arm-soc-drivers-5.11' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "There are a couple of subsystems maintained by other people that merge their drivers through the SoC tree, those changes include: - The SCMI firmware framework gains support for sensor notifications and for controlling voltage domains. - A large update for the Tegra memory controller driver, integrating it better with the interconnect framework - The memory controller subsystem gains support for Mediatek MT8192 - The reset controller framework gains support for sharing pulsed resets For Soc specific drivers in drivers/soc, the main changes are - The Allwinner/sunxi MBUS gets a rework for the way it handles dma_map_ops and offsets between physical and dma address spaces. - An errata fix plus some cleanups for Freescale Layerscape SoCs - A cleanup for renesas drivers regarding MMIO accesses. - New SoC specific drivers for Mediatek MT8192 and MT8183 power domains - New SoC specific drivers for Aspeed AST2600 LPC bus control and SoC identification. - Core Power Domain support for Qualcomm MSM8916, MSM8939, SDM660 and SDX55. - A rework of the TI AM33xx 'genpd' power domain support to use information from DT instead of platform data - Support for TI AM64x SoCs - Allow building some Amlogic drivers as modules instead of built-in Finally, there are numerous cleanups and smaller bug fixes for Mediatek, Tegra, Samsung, Qualcomm, TI OMAP, Amlogic, Rockchips, Renesas, and Xilinx SoCs" * tag 'arm-soc-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (222 commits) soc: mediatek: mmsys: Specify HAS_IOMEM dependency for MTK_MMSYS firmware: xilinx: Properly align function parameter firmware: xilinx: Add a blank line after function declaration firmware: xilinx: Remove additional newline firmware: xilinx: Fix kernel-doc warnings firmware: xlnx-zynqmp: fix compilation warning soc: xilinx: vcu: add missing register NUM_CORE soc: xilinx: vcu: use vcu-settings syscon registers dt-bindings: soc: xlnx: extract xlnx, vcu-settings to separate binding soc: xilinx: vcu: drop useless success message clk: samsung: mark PM functions as __maybe_unused soc: samsung: exynos-chipid: initialize later - with arch_initcall soc: samsung: exynos-chipid: order list of SoCs by name memory: jz4780_nemc: Fix potential NULL dereference in jz4780_nemc_probe() memory: ti-emif-sram: only build for ARMv7 memory: tegra30: Support interconnect framework memory: tegra20: Support hardware versioning and clean up OPP table initialization dt-bindings: memory: tegra20-emc: Document opp-supported-hw property soc: rockchip: io-domain: Fix error return code in rockchip_iodomain_probe() reset-controller: ti: force the write operation when assert or deassert ...
2020-12-03docs: archis: add a per-architecture features listMauro Carvalho Chehab
Add a feature list matrix for each architecture to their respective Kernel books. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Link: https://lore.kernel.org/r/9c39d4dd93e05c0008205527d2c3450912f029ed.1606748711.git.mchehab+huawei@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2020-11-13documentation: arm: sunxi: add Allwinner H616 documentsWilken Gottwalt
Add the current and cleaned Allwinner H616 datasheet and user manual. Signed-off-by: Wilken Gottwalt <wilken.gottwalt@posteo.net> Link: https://lore.kernel.org/r/20201108150104.GA66507@monster.powergraphx.local Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2020-10-31Documentation: Update paths of Samsung S3C machine filesKrzysztof Kozlowski
Documentation references Samsung S3C24xx and S3C64xx machine files in multiple places but the files were traveling around the kernel multiple times. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200911143343.498-1-krzk@kernel.org
2020-10-28documentation: arm: sunxi: add Allwinner H6 documentsWilken Gottwalt
Add the current Allwinner H6 datasheet and user manual. Signed-off-by: Wilken Gottwalt <wilken.gottwalt@linux-addicted.net> Link: https://lore.kernel.org/r/20201027062408.GA6761@monster.powergraphx.local Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2020-10-27ARM: 9015/2: Define the virtual space of KASan's shadow regionLinus Walleij
Define KASAN_SHADOW_OFFSET,KASAN_SHADOW_START and KASAN_SHADOW_END for the Arm kernel address sanitizer. We are "stealing" lowmem (the 4GB addressable by a 32bit architecture) out of the virtual address space to use as shadow memory for KASan as follows: +----+ 0xffffffff | | | | |-> Static kernel image (vmlinux) BSS and page table | |/ +----+ PAGE_OFFSET | | | | |-> Loadable kernel modules virtual address space area | |/ +----+ MODULES_VADDR = KASAN_SHADOW_END | | | | |-> The shadow area of kernel virtual address. | |/ +----+-> TASK_SIZE (start of kernel space) = KASAN_SHADOW_START the | | shadow address of MODULES_VADDR | | | | | | | | |-> The user space area in lowmem. The kernel address | | | sanitizer do not use this space, nor does it map it. | | | | | | | | | | | | | |/ ------ 0 0 .. TASK_SIZE is the memory that can be used by shared userspace/kernelspace. It us used for userspace processes and for passing parameters and memory buffers in system calls etc. We do not need to shadow this area. KASAN_SHADOW_START: This value begins with the MODULE_VADDR's shadow address. It is the start of kernel virtual space. Since we have modules to load, we need to cover also that area with shadow memory so we can find memory bugs in modules. KASAN_SHADOW_END This value is the 0x100000000's shadow address: the mapping that would be after the end of the kernel memory at 0xffffffff. It is the end of kernel address sanitizer shadow area. It is also the start of the module area. KASAN_SHADOW_OFFSET: This value is used to map an address to the corresponding shadow address by the following formula: shadow_addr = (address >> 3) + KASAN_SHADOW_OFFSET; As you would expect, >> 3 is equal to dividing by 8, meaning each byte in the shadow memory covers 8 bytes of kernel memory, so one bit shadow memory per byte of kernel memory is used. The KASAN_SHADOW_OFFSET is provided in a Kconfig option depending on the VMSPLIT layout of the system: the kernel and userspace can split up lowmem in different ways according to needs, so we calculate the shadow offset depending on this. When kasan is enabled, the definition of TASK_SIZE is not an 8-bit rotated constant, so we need to modify the TASK_SIZE access code in the *.s file. The kernel and modules may use different amounts of memory, according to the VMSPLIT configuration, which in turn determines the PAGE_OFFSET. We use the following KASAN_SHADOW_OFFSETs depending on how the virtual memory is split up: - 0x1f000000 if we have 1G userspace / 3G kernelspace split: - The kernel address space is 3G (0xc0000000) - PAGE_OFFSET is then set to 0x40000000 so the kernel static image (vmlinux) uses addresses 0x40000000 .. 0xffffffff - On top of that we have the MODULES_VADDR which under the worst case (using ARM instructions) is PAGE_OFFSET - 16M (0x01000000) = 0x3f000000 so the modules use addresses 0x3f000000 .. 0x3fffffff - So the addresses 0x3f000000 .. 0xffffffff need to be covered with shadow memory. That is 0xc1000000 bytes of memory. - 1/8 of that is needed for its shadow memory, so 0x18200000 bytes of shadow memory is needed. We "steal" that from the remaining lowmem. - The KASAN_SHADOW_START becomes 0x26e00000, to KASAN_SHADOW_END at 0x3effffff. - Now we can calculate the KASAN_SHADOW_OFFSET for any kernel address as 0x3f000000 needs to map to the first byte of shadow memory and 0xffffffff needs to map to the last byte of shadow memory. Since: SHADOW_ADDR = (address >> 3) + KASAN_SHADOW_OFFSET 0x26e00000 = (0x3f000000 >> 3) + KASAN_SHADOW_OFFSET KASAN_SHADOW_OFFSET = 0x26e00000 - (0x3f000000 >> 3) KASAN_SHADOW_OFFSET = 0x26e00000 - 0x07e00000 KASAN_SHADOW_OFFSET = 0x1f000000 - 0x5f000000 if we have 2G userspace / 2G kernelspace split: - The kernel space is 2G (0x80000000) - PAGE_OFFSET is set to 0x80000000 so the kernel static image uses 0x80000000 .. 0xffffffff. - On top of that we have the MODULES_VADDR which under the worst case (using ARM instructions) is PAGE_OFFSET - 16M (0x01000000) = 0x7f000000 so the modules use addresses 0x7f000000 .. 0x7fffffff - So the addresses 0x7f000000 .. 0xffffffff need to be covered with shadow memory. That is 0x81000000 bytes of memory. - 1/8 of that is needed for its shadow memory, so 0x10200000 bytes of shadow memory is needed. We "steal" that from the remaining lowmem. - The KASAN_SHADOW_START becomes 0x6ee00000, to KASAN_SHADOW_END at 0x7effffff. - Now we can calculate the KASAN_SHADOW_OFFSET for any kernel address as 0x7f000000 needs to map to the first byte of shadow memory and 0xffffffff needs to map to the last byte of shadow memory. Since: SHADOW_ADDR = (address >> 3) + KASAN_SHADOW_OFFSET 0x6ee00000 = (0x7f000000 >> 3) + KASAN_SHADOW_OFFSET KASAN_SHADOW_OFFSET = 0x6ee00000 - (0x7f000000 >> 3) KASAN_SHADOW_OFFSET = 0x6ee00000 - 0x0fe00000 KASAN_SHADOW_OFFSET = 0x5f000000 - 0x9f000000 if we have 3G userspace / 1G kernelspace split, and this is the default split for ARM: - The kernel address space is 1GB (0x40000000) - PAGE_OFFSET is set to 0xc0000000 so the kernel static image uses 0xc0000000 .. 0xffffffff. - On top of that we have the MODULES_VADDR which under the worst case (using ARM instructions) is PAGE_OFFSET - 16M (0x01000000) = 0xbf000000 so the modules use addresses 0xbf000000 .. 0xbfffffff - So the addresses 0xbf000000 .. 0xffffffff need to be covered with shadow memory. That is 0x41000000 bytes of memory. - 1/8 of that is needed for its shadow memory, so 0x08200000 bytes of shadow memory is needed. We "steal" that from the remaining lowmem. - The KASAN_SHADOW_START becomes 0xb6e00000, to KASAN_SHADOW_END at 0xbfffffff. - Now we can calculate the KASAN_SHADOW_OFFSET for any kernel address as 0xbf000000 needs to map to the first byte of shadow memory and 0xffffffff needs to map to the last byte of shadow memory. Since: SHADOW_ADDR = (address >> 3) + KASAN_SHADOW_OFFSET 0xb6e00000 = (0xbf000000 >> 3) + KASAN_SHADOW_OFFSET KASAN_SHADOW_OFFSET = 0xb6e00000 - (0xbf000000 >> 3) KASAN_SHADOW_OFFSET = 0xb6e00000 - 0x17e00000 KASAN_SHADOW_OFFSET = 0x9f000000 - 0x8f000000 if we have 3G userspace / 1G kernelspace with full 1 GB low memory (VMSPLIT_3G_OPT): - The kernel address space is 1GB (0x40000000) - PAGE_OFFSET is set to 0xb0000000 so the kernel static image uses 0xb0000000 .. 0xffffffff. - On top of that we have the MODULES_VADDR which under the worst case (using ARM instructions) is PAGE_OFFSET - 16M (0x01000000) = 0xaf000000 so the modules use addresses 0xaf000000 .. 0xaffffff - So the addresses 0xaf000000 .. 0xffffffff need to be covered with shadow memory. That is 0x51000000 bytes of memory. - 1/8 of that is needed for its shadow memory, so 0x0a200000 bytes of shadow memory is needed. We "steal" that from the remaining lowmem. - The KASAN_SHADOW_START becomes 0xa4e00000, to KASAN_SHADOW_END at 0xaeffffff. - Now we can calculate the KASAN_SHADOW_OFFSET for any kernel address as 0xaf000000 needs to map to the first byte of shadow memory and 0xffffffff needs to map to the last byte of shadow memory. Since: SHADOW_ADDR = (address >> 3) + KASAN_SHADOW_OFFSET 0xa4e00000 = (0xaf000000 >> 3) + KASAN_SHADOW_OFFSET KASAN_SHADOW_OFFSET = 0xa4e00000 - (0xaf000000 >> 3) KASAN_SHADOW_OFFSET = 0xa4e00000 - 0x15e00000 KASAN_SHADOW_OFFSET = 0x8f000000 - The default value of 0xffffffff for KASAN_SHADOW_OFFSET is an error value. We should always match one of the above shadow offsets. When we do this, TASK_SIZE will sometimes get a bit odd values that will not fit into immediate mov assembly instructions. To account for this, we need to rewrite some assembly using TASK_SIZE like this: - mov r1, #TASK_SIZE + ldr r1, =TASK_SIZE or - cmp r4, #TASK_SIZE + ldr r0, =TASK_SIZE + cmp r4, r0 this is done to avoid the immediate #TASK_SIZE that need to fit into a limited number of bits. Cc: Andrey Ryabinin <aryabinin@virtuozzo.com> Cc: Alexander Potapenko <glider@google.com> Cc: Dmitry Vyukov <dvyukov@google.com> Cc: kasan-dev@googlegroups.com Cc: Mike Rapoport <rppt@linux.ibm.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Ard Biesheuvel <ardb@kernel.org> # QEMU/KVM/mach-virt/LPAE/8G Tested-by: Florian Fainelli <f.fainelli@gmail.com> # Brahma SoCs Tested-by: Ahmad Fatoum <a.fatoum@pengutronix.de> # i.MX6Q Reported-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Abbott Liu <liuwenliang@huawei.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-10-27ARM: 9012/1: move device tree mapping out of linear regionArd Biesheuvel
On ARM, setting up the linear region is tricky, given the constraints around placement and alignment of the memblocks, and how the kernel itself as well as the DT are placed in physical memory. Let's simplify matters a bit, by moving the device tree mapping to the top of the address space, right between the end of the vmalloc region and the start of the the fixmap region, and create a read-only mapping for it that is independent of the size of the linear region, and how it is organized. Since this region was formerly used as a guard region, which will now be populated fully on LPAE builds by this read-only mapping (which will still be able to function as a guard region for stray writes), bump the start of the [underutilized] fixmap region by 512 KB as well, to ensure that there is always a proper guard region here. Doing so still leaves ample room for the fixmap space, even with NR_CPUS set to its maximum value of 32. Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Nicolas Pitre <nico@fluxnic.net> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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