diff options
Diffstat (limited to 'drivers/gpu/drm/tiny')
| -rw-r--r-- | drivers/gpu/drm/tiny/Kconfig | 10 | ||||
| -rw-r--r-- | drivers/gpu/drm/tiny/Makefile | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/tiny/arcpgu.c | 434 | ||||
| -rw-r--r-- | drivers/gpu/drm/tiny/cirrus.c | 43 | ||||
| -rw-r--r-- | drivers/gpu/drm/tiny/gm12u320.c | 28 | ||||
| -rw-r--r-- | drivers/gpu/drm/tiny/hx8357d.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/tiny/ili9225.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/tiny/ili9341.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/tiny/ili9486.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/tiny/mi0283qt.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/tiny/repaper.c | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/tiny/st7586.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/tiny/st7735r.c | 4 |
13 files changed, 491 insertions, 56 deletions
diff --git a/drivers/gpu/drm/tiny/Kconfig b/drivers/gpu/drm/tiny/Kconfig index 2b6414f0fa75..9bbaa1a69050 100644 --- a/drivers/gpu/drm/tiny/Kconfig +++ b/drivers/gpu/drm/tiny/Kconfig @@ -1,5 +1,15 @@ # SPDX-License-Identifier: GPL-2.0-only +config DRM_ARCPGU + tristate "ARC PGU" + depends on DRM && OF + select DRM_KMS_CMA_HELPER + select DRM_KMS_HELPER + help + Choose this option if you have an ARC PGU controller. + + If M is selected the module will be called arcpgu. + config DRM_CIRRUS_QEMU tristate "Cirrus driver for QEMU emulated device" depends on DRM && PCI && MMU diff --git a/drivers/gpu/drm/tiny/Makefile b/drivers/gpu/drm/tiny/Makefile index 6ae4e9e5a35f..bef6780bdd6f 100644 --- a/drivers/gpu/drm/tiny/Makefile +++ b/drivers/gpu/drm/tiny/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only +obj-$(CONFIG_DRM_ARCPGU) += arcpgu.o obj-$(CONFIG_DRM_CIRRUS_QEMU) += cirrus.o obj-$(CONFIG_DRM_GM12U320) += gm12u320.o obj-$(CONFIG_TINYDRM_HX8357D) += hx8357d.o diff --git a/drivers/gpu/drm/tiny/arcpgu.c b/drivers/gpu/drm/tiny/arcpgu.c new file mode 100644 index 000000000000..f8531c50a072 --- /dev/null +++ b/drivers/gpu/drm/tiny/arcpgu.c @@ -0,0 +1,434 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * ARC PGU DRM driver. + * + * Copyright (C) 2016 Synopsys, Inc. (www.synopsys.com) + */ + +#include <linux/clk.h> +#include <drm/drm_atomic_helper.h> +#include <drm/drm_debugfs.h> +#include <drm/drm_device.h> +#include <drm/drm_drv.h> +#include <drm/drm_fb_cma_helper.h> +#include <drm/drm_fb_helper.h> +#include <drm/drm_fourcc.h> +#include <drm/drm_gem_cma_helper.h> +#include <drm/drm_gem_framebuffer_helper.h> +#include <drm/drm_of.h> +#include <drm/drm_probe_helper.h> +#include <drm/drm_simple_kms_helper.h> +#include <linux/dma-mapping.h> +#include <linux/module.h> +#include <linux/of_reserved_mem.h> +#include <linux/platform_device.h> + +#define ARCPGU_REG_CTRL 0x00 +#define ARCPGU_REG_STAT 0x04 +#define ARCPGU_REG_FMT 0x10 +#define ARCPGU_REG_HSYNC 0x14 +#define ARCPGU_REG_VSYNC 0x18 +#define ARCPGU_REG_ACTIVE 0x1c +#define ARCPGU_REG_BUF0_ADDR 0x40 +#define ARCPGU_REG_STRIDE 0x50 +#define ARCPGU_REG_START_SET 0x84 + +#define ARCPGU_REG_ID 0x3FC + +#define ARCPGU_CTRL_ENABLE_MASK 0x02 +#define ARCPGU_CTRL_VS_POL_MASK 0x1 +#define ARCPGU_CTRL_VS_POL_OFST 0x3 +#define ARCPGU_CTRL_HS_POL_MASK 0x1 +#define ARCPGU_CTRL_HS_POL_OFST 0x4 +#define ARCPGU_MODE_XRGB8888 BIT(2) +#define ARCPGU_STAT_BUSY_MASK 0x02 + +struct arcpgu_drm_private { + struct drm_device drm; + void __iomem *regs; + struct clk *clk; + struct drm_simple_display_pipe pipe; + struct drm_connector sim_conn; +}; + +#define dev_to_arcpgu(x) container_of(x, struct arcpgu_drm_private, drm) + +#define pipe_to_arcpgu_priv(x) container_of(x, struct arcpgu_drm_private, pipe) + +static inline void arc_pgu_write(struct arcpgu_drm_private *arcpgu, + unsigned int reg, u32 value) +{ + iowrite32(value, arcpgu->regs + reg); +} + +static inline u32 arc_pgu_read(struct arcpgu_drm_private *arcpgu, + unsigned int reg) +{ + return ioread32(arcpgu->regs + reg); +} + +#define XRES_DEF 640 +#define YRES_DEF 480 + +#define XRES_MAX 8192 +#define YRES_MAX 8192 + +static int arcpgu_drm_connector_get_modes(struct drm_connector *connector) +{ + int count; + + count = drm_add_modes_noedid(connector, XRES_MAX, YRES_MAX); + drm_set_preferred_mode(connector, XRES_DEF, YRES_DEF); + return count; +} + +static const struct drm_connector_helper_funcs +arcpgu_drm_connector_helper_funcs = { + .get_modes = arcpgu_drm_connector_get_modes, +}; + +static const struct drm_connector_funcs arcpgu_drm_connector_funcs = { + .reset = drm_atomic_helper_connector_reset, + .fill_modes = drm_helper_probe_single_connector_modes, + .destroy = drm_connector_cleanup, + .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, +}; + +static int arcpgu_drm_sim_init(struct drm_device *drm, struct drm_connector *connector) +{ + drm_connector_helper_add(connector, &arcpgu_drm_connector_helper_funcs); + return drm_connector_init(drm, connector, &arcpgu_drm_connector_funcs, + DRM_MODE_CONNECTOR_VIRTUAL); +} + +#define ENCODE_PGU_XY(x, y) ((((x) - 1) << 16) | ((y) - 1)) + +static const u32 arc_pgu_supported_formats[] = { + DRM_FORMAT_RGB565, + DRM_FORMAT_XRGB8888, + DRM_FORMAT_ARGB8888, +}; + +static void arc_pgu_set_pxl_fmt(struct arcpgu_drm_private *arcpgu) +{ + const struct drm_framebuffer *fb = arcpgu->pipe.plane.state->fb; + uint32_t pixel_format = fb->format->format; + u32 format = DRM_FORMAT_INVALID; + int i; + u32 reg_ctrl; + + for (i = 0; i < ARRAY_SIZE(arc_pgu_supported_formats); i++) { + if (arc_pgu_supported_formats[i] == pixel_format) + format = arc_pgu_supported_formats[i]; + } + + if (WARN_ON(format == DRM_FORMAT_INVALID)) + return; + + reg_ctrl = arc_pgu_read(arcpgu, ARCPGU_REG_CTRL); + if (format == DRM_FORMAT_RGB565) + reg_ctrl &= ~ARCPGU_MODE_XRGB8888; + else + reg_ctrl |= ARCPGU_MODE_XRGB8888; + arc_pgu_write(arcpgu, ARCPGU_REG_CTRL, reg_ctrl); +} + +static enum drm_mode_status arc_pgu_mode_valid(struct drm_simple_display_pipe *pipe, + const struct drm_display_mode *mode) +{ + struct arcpgu_drm_private *arcpgu = pipe_to_arcpgu_priv(pipe); + long rate, clk_rate = mode->clock * 1000; + long diff = clk_rate / 200; /* +-0.5% allowed by HDMI spec */ + + rate = clk_round_rate(arcpgu->clk, clk_rate); + if ((max(rate, clk_rate) - min(rate, clk_rate) < diff) && (rate > 0)) + return MODE_OK; + + return MODE_NOCLOCK; +} + +static void arc_pgu_mode_set(struct arcpgu_drm_private *arcpgu) +{ + struct drm_display_mode *m = &arcpgu->pipe.crtc.state->adjusted_mode; + u32 val; + + arc_pgu_write(arcpgu, ARCPGU_REG_FMT, + ENCODE_PGU_XY(m->crtc_htotal, m->crtc_vtotal)); + + arc_pgu_write(arcpgu, ARCPGU_REG_HSYNC, + ENCODE_PGU_XY(m->crtc_hsync_start - m->crtc_hdisplay, + m->crtc_hsync_end - m->crtc_hdisplay)); + + arc_pgu_write(arcpgu, ARCPGU_REG_VSYNC, + ENCODE_PGU_XY(m->crtc_vsync_start - m->crtc_vdisplay, + m->crtc_vsync_end - m->crtc_vdisplay)); + + arc_pgu_write(arcpgu, ARCPGU_REG_ACTIVE, + ENCODE_PGU_XY(m->crtc_hblank_end - m->crtc_hblank_start, + m->crtc_vblank_end - m->crtc_vblank_start)); + + val = arc_pgu_read(arcpgu, ARCPGU_REG_CTRL); + + if (m->flags & DRM_MODE_FLAG_PVSYNC) + val |= ARCPGU_CTRL_VS_POL_MASK << ARCPGU_CTRL_VS_POL_OFST; + else + val &= ~(ARCPGU_CTRL_VS_POL_MASK << ARCPGU_CTRL_VS_POL_OFST); + + if (m->flags & DRM_MODE_FLAG_PHSYNC) + val |= ARCPGU_CTRL_HS_POL_MASK << ARCPGU_CTRL_HS_POL_OFST; + else + val &= ~(ARCPGU_CTRL_HS_POL_MASK << ARCPGU_CTRL_HS_POL_OFST); + + arc_pgu_write(arcpgu, ARCPGU_REG_CTRL, val); + arc_pgu_write(arcpgu, ARCPGU_REG_STRIDE, 0); + arc_pgu_write(arcpgu, ARCPGU_REG_START_SET, 1); + + arc_pgu_set_pxl_fmt(arcpgu); + + clk_set_rate(arcpgu->clk, m->crtc_clock * 1000); +} + +static void arc_pgu_enable(struct drm_simple_display_pipe *pipe, + struct drm_crtc_state *crtc_state, + struct drm_plane_state *plane_state) +{ + struct arcpgu_drm_private *arcpgu = pipe_to_arcpgu_priv(pipe); + + arc_pgu_mode_set(arcpgu); + + clk_prepare_enable(arcpgu->clk); + arc_pgu_write(arcpgu, ARCPGU_REG_CTRL, + arc_pgu_read(arcpgu, ARCPGU_REG_CTRL) | + ARCPGU_CTRL_ENABLE_MASK); +} + +static void arc_pgu_disable(struct drm_simple_display_pipe *pipe) +{ + struct arcpgu_drm_private *arcpgu = pipe_to_arcpgu_priv(pipe); + + clk_disable_unprepare(arcpgu->clk); + arc_pgu_write(arcpgu, ARCPGU_REG_CTRL, + arc_pgu_read(arcpgu, ARCPGU_REG_CTRL) & + ~ARCPGU_CTRL_ENABLE_MASK); +} + +static void arc_pgu_update(struct drm_simple_display_pipe *pipe, + struct drm_plane_state *state) +{ + struct arcpgu_drm_private *arcpgu; + struct drm_gem_cma_object *gem; + + if (!pipe->plane.state->fb) + return; + + arcpgu = pipe_to_arcpgu_priv(pipe); + gem = drm_fb_cma_get_gem_obj(pipe->plane.state->fb, 0); + arc_pgu_write(arcpgu, ARCPGU_REG_BUF0_ADDR, gem->paddr); +} + +static const struct drm_simple_display_pipe_funcs arc_pgu_pipe_funcs = { + .update = arc_pgu_update, + .mode_valid = arc_pgu_mode_valid, + .enable = arc_pgu_enable, + .disable = arc_pgu_disable, +}; + +static const struct drm_mode_config_funcs arcpgu_drm_modecfg_funcs = { + .fb_create = drm_gem_fb_create, + .atomic_check = drm_atomic_helper_check, + .atomic_commit = drm_atomic_helper_commit, +}; + +DEFINE_DRM_GEM_CMA_FOPS(arcpgu_drm_ops); + +static int arcpgu_load(struct arcpgu_drm_private *arcpgu) +{ + struct platform_device *pdev = to_platform_device(arcpgu->drm.dev); + struct device_node *encoder_node = NULL, *endpoint_node = NULL; + struct drm_connector *connector = NULL; + struct drm_device *drm = &arcpgu->drm; + struct resource *res; + int ret; + + arcpgu->clk = devm_clk_get(drm->dev, "pxlclk"); + if (IS_ERR(arcpgu->clk)) + return PTR_ERR(arcpgu->clk); + + ret = drmm_mode_config_init(drm); + if (ret) + return ret; + + drm->mode_config.min_width = 0; + drm->mode_config.min_height = 0; + drm->mode_config.max_width = 1920; + drm->mode_config.max_height = 1080; + drm->mode_config.funcs = &arcpgu_drm_modecfg_funcs; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + arcpgu->regs = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(arcpgu->regs)) + return PTR_ERR(arcpgu->regs); + + dev_info(drm->dev, "arc_pgu ID: 0x%x\n", + arc_pgu_read(arcpgu, ARCPGU_REG_ID)); + + /* Get the optional framebuffer memory resource */ + ret = of_reserved_mem_device_init(drm->dev); + if (ret && ret != -ENODEV) + return ret; + + if (dma_set_mask_and_coherent(drm->dev, DMA_BIT_MASK(32))) + return -ENODEV; + + /* + * There is only one output port inside each device. It is linked with + * encoder endpoint. + */ + endpoint_node = of_graph_get_next_endpoint(pdev->dev.of_node, NULL); + if (endpoint_node) { + encoder_node = of_graph_get_remote_port_parent(endpoint_node); + of_node_put(endpoint_node); + } else { + connector = &arcpgu->sim_conn; + dev_info(drm->dev, "no encoder found. Assumed virtual LCD on simulation platform\n"); + ret = arcpgu_drm_sim_init(drm, connector); + if (ret < 0) + return ret; + } + + ret = drm_simple_display_pipe_init(drm, &arcpgu->pipe, &arc_pgu_pipe_funcs, + arc_pgu_supported_formats, + ARRAY_SIZE(arc_pgu_supported_formats), + NULL, connector); + if (ret) + return ret; + + if (encoder_node) { + struct drm_bridge *bridge; + + /* Locate drm bridge from the hdmi encoder DT node */ + bridge = of_drm_find_bridge(encoder_node); + if (!bridge) + return -EPROBE_DEFER; + + ret = drm_simple_display_pipe_attach_bridge(&arcpgu->pipe, bridge); + if (ret) + return ret; + } + + drm_mode_config_reset(drm); + drm_kms_helper_poll_init(drm); + + platform_set_drvdata(pdev, drm); + return 0; +} + +static int arcpgu_unload(struct drm_device *drm) +{ + drm_kms_helper_poll_fini(drm); + drm_atomic_helper_shutdown(drm); + + return 0; +} + +#ifdef CONFIG_DEBUG_FS +static int arcpgu_show_pxlclock(struct seq_file *m, void *arg) +{ + struct drm_info_node *node = (struct drm_info_node *)m->private; + struct drm_device *drm = node->minor->dev; + struct arcpgu_drm_private *arcpgu = dev_to_arcpgu(drm); + unsigned long clkrate = clk_get_rate(arcpgu->clk); + unsigned long mode_clock = arcpgu->pipe.crtc.mode.crtc_clock * 1000; + + seq_printf(m, "hw : %lu\n", clkrate); + seq_printf(m, "mode: %lu\n", mode_clock); + return 0; +} + +static struct drm_info_list arcpgu_debugfs_list[] = { + { "clocks", arcpgu_show_pxlclock, 0 }, +}; + +static void arcpgu_debugfs_init(struct drm_minor *minor) +{ + drm_debugfs_create_files(arcpgu_debugfs_list, + ARRAY_SIZE(arcpgu_debugfs_list), + minor->debugfs_root, minor); +} +#endif + +static const struct drm_driver arcpgu_drm_driver = { + .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC, + .name = "arcpgu", + .desc = "ARC PGU Controller", + .date = "20160219", + .major = 1, + .minor = 0, + .patchlevel = 0, + .fops = &arcpgu_drm_ops, + DRM_GEM_CMA_DRIVER_OPS, +#ifdef CONFIG_DEBUG_FS + .debugfs_init = arcpgu_debugfs_init, +#endif +}; + +static int arcpgu_probe(struct platform_device *pdev) +{ + struct arcpgu_drm_private *arcpgu; + int ret; + + arcpgu = devm_drm_dev_alloc(&pdev->dev, &arcpgu_drm_driver, + struct arcpgu_drm_private, drm); + if (IS_ERR(arcpgu)) + return PTR_ERR(arcpgu); + + ret = arcpgu_load(arcpgu); + if (ret) + return ret; + + ret = drm_dev_register(&arcpgu->drm, 0); + if (ret) + goto err_unload; + + drm_fbdev_generic_setup(&arcpgu->drm, 16); + + return 0; + +err_unload: + arcpgu_unload(&arcpgu->drm); + + return ret; +} + +static int arcpgu_remove(struct platform_device *pdev) +{ + struct drm_device *drm = platform_get_drvdata(pdev); + + drm_dev_unregister(drm); + arcpgu_unload(drm); + + return 0; +} + +static const struct of_device_id arcpgu_of_table[] = { + {.compatible = "snps,arcpgu"}, + {} +}; + +MODULE_DEVICE_TABLE(of, arcpgu_of_table); + +static struct platform_driver arcpgu_platform_driver = { + .probe = arcpgu_probe, + .remove = arcpgu_remove, + .driver = { + .name = "arcpgu", + .of_match_table = arcpgu_of_table, + }, +}; + +module_platform_driver(arcpgu_platform_driver); + +MODULE_AUTHOR("Carlos Palminha <palminha@synopsys.com>"); +MODULE_DESCRIPTION("ARC PGU DRM driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/gpu/drm/tiny/cirrus.c b/drivers/gpu/drm/tiny/cirrus.c index a043e602199e..ad922c3ec681 100644 --- a/drivers/gpu/drm/tiny/cirrus.c +++ b/drivers/gpu/drm/tiny/cirrus.c @@ -33,8 +33,9 @@ #include <drm/drm_file.h> #include <drm/drm_format_helper.h> #include <drm/drm_fourcc.h> -#include <drm/drm_gem_shmem_helper.h> +#include <drm/drm_gem_atomic_helper.h> #include <drm/drm_gem_framebuffer_helper.h> +#include <drm/drm_gem_shmem_helper.h> #include <drm/drm_ioctl.h> #include <drm/drm_managed.h> #include <drm/drm_modeset_helper_vtables.h> @@ -311,22 +312,15 @@ static int cirrus_mode_set(struct cirrus_device *cirrus, return 0; } -static int cirrus_fb_blit_rect(struct drm_framebuffer *fb, +static int cirrus_fb_blit_rect(struct drm_framebuffer *fb, const struct dma_buf_map *map, struct drm_rect *rect) { struct cirrus_device *cirrus = to_cirrus(fb->dev); - struct dma_buf_map map; - void *vmap; - int idx, ret; + void *vmap = map->vaddr; /* TODO: Use mapping abstraction properly */ + int idx; - ret = -ENODEV; if (!drm_dev_enter(&cirrus->dev, &idx)) - goto out; - - ret = drm_gem_shmem_vmap(fb->obj[0], &map); - if (ret) - goto out_dev_exit; - vmap = map.vaddr; /* TODO: Use mapping abstraction properly */ + return -ENODEV; if (cirrus->cpp == fb->format->cpp[0]) drm_fb_memcpy_dstclip(cirrus->vram, @@ -345,16 +339,12 @@ static int cirrus_fb_blit_rect(struct drm_framebuffer *fb, else WARN_ON_ONCE("cpp mismatch"); - drm_gem_shmem_vunmap(fb->obj[0], &map); - ret = 0; - -out_dev_exit: drm_dev_exit(idx); -out: - return ret; + + return 0; } -static int cirrus_fb_blit_fullscreen(struct drm_framebuffer *fb) +static int cirrus_fb_blit_fullscreen(struct drm_framebuffer *fb, const struct dma_buf_map *map) { struct drm_rect fullscreen = { .x1 = 0, @@ -362,7 +352,7 @@ static int cirrus_fb_blit_fullscreen(struct drm_framebuffer *fb) .y1 = 0, .y2 = fb->height, }; - return cirrus_fb_blit_rect(fb, &fullscreen); + return cirrus_fb_blit_rect(fb, map, &fullscreen); } static int cirrus_check_size(int width, int height, @@ -441,9 +431,10 @@ static void cirrus_pipe_enable(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state) { struct cirrus_device *cirrus = to_cirrus(pipe->crtc.dev); + struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); cirrus_mode_set(cirrus, &crtc_state->mode, plane_state->fb); - cirrus_fb_blit_fullscreen(plane_state->fb); + cirrus_fb_blit_fullscreen(plane_state->fb, &shadow_plane_state->map[0]); } static void cirrus_pipe_update(struct drm_simple_display_pipe *pipe, @@ -451,16 +442,15 @@ static void cirrus_pipe_update(struct drm_simple_display_pipe *pipe, { struct cirrus_device *cirrus = to_cirrus(pipe->crtc.dev); struct drm_plane_state *state = pipe->plane.state; + struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(state); struct drm_crtc *crtc = &pipe->crtc; struct drm_rect rect; - if (pipe->plane.state->fb && - cirrus->cpp != cirrus_cpp(pipe->plane.state->fb)) - cirrus_mode_set(cirrus, &crtc->mode, - pipe->plane.state->fb); + if (state->fb && cirrus->cpp != cirrus_cpp(state->fb)) + cirrus_mode_set(cirrus, &crtc->mode, state->fb); if (drm_atomic_helper_damage_merged(old_state, state, &rect)) - cirrus_fb_blit_rect(pipe->plane.state->fb, &rect); + cirrus_fb_blit_rect(state->fb, &shadow_plane_state->map[0], &rect); } static const struct drm_simple_display_pipe_funcs cirrus_pipe_funcs = { @@ -468,6 +458,7 @@ static const struct drm_simple_display_pipe_funcs cirrus_pipe_funcs = { .check = cirrus_pipe_check, .enable = cirrus_pipe_enable, .update = cirrus_pipe_update, + DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCS, }; static const uint32_t cirrus_formats[] = { diff --git a/drivers/gpu/drm/tiny/gm12u320.c b/drivers/gpu/drm/tiny/gm12u320.c index 23866a54e3f9..a233c86d428b 100644 --- a/drivers/gpu/drm/tiny/gm12u320.c +++ b/drivers/gpu/drm/tiny/gm12u320.c @@ -16,8 +16,9 @@ #include <drm/drm_file.h> #include <drm/drm_format_helper.h> #include <drm/drm_fourcc.h> -#include <drm/drm_gem_shmem_helper.h> +#include <drm/drm_gem_atomic_helper.h> #include <drm/drm_gem_framebuffer_helper.h> +#include <drm/drm_gem_shmem_helper.h> #include <drm/drm_ioctl.h> #include <drm/drm_managed.h> #include <drm/drm_modeset_helper_vtables.h> @@ -95,6 +96,7 @@ struct gm12u320_device { struct drm_rect rect; int frame; int draw_status_timeout; + struct dma_buf_map src_map; } fb_update; }; @@ -251,7 +253,6 @@ static void gm12u320_copy_fb_to_blocks(struct gm12u320_device *gm12u320) { int block, dst_offset, len, remain, ret, x1, x2, y1, y2; struct drm_framebuffer *fb; - struct dma_buf_map map; void *vaddr; u8 *src; @@ -265,20 +266,14 @@ static void gm12u320_copy_fb_to_blocks(struct gm12u320_device *gm12u320) x2 = gm12u320->fb_update.rect.x2; y1 = gm12u320->fb_update.rect.y1; y2 = gm12u320->fb_update.rect.y2; - - ret = drm_gem_shmem_vmap(fb->obj[0], &map); - if (ret) { - GM12U320_ERR("failed to vmap fb: %d\n", ret); - goto put_fb; - } - vaddr = map.vaddr; /* TODO: Use mapping abstraction properly */ + vaddr = gm12u320->fb_update.src_map.vaddr; /* TODO: Use mapping abstraction properly */ if (fb->obj[0]->import_attach) { ret = dma_buf_begin_cpu_access( fb->obj[0]->import_attach->dmabuf, DMA_FROM_DEVICE); if (ret) { GM12U320_ERR("dma_buf_begin_cpu_access err: %d\n", ret); - goto vunmap; + goto put_fb; } } @@ -322,8 +317,6 @@ static void gm12u320_copy_fb_to_blocks(struct gm12u320_device *gm12u320) if (ret) GM12U320_ERR("dma_buf_end_cpu_access err: %d\n", ret); } -vunmap: - drm_gem_shmem_vunmap(fb->obj[0], &map); put_fb: drm_framebuffer_put(fb); gm12u320->fb_update.fb = NULL; @@ -411,7 +404,7 @@ err: GM12U320_ERR("Frame update error: %d\n", ret); } -static void gm12u320_fb_mark_dirty(struct drm_framebuffer *fb, +static void gm12u320_fb_mark_dirty(struct drm_framebuffer *fb, const struct dma_buf_map *map, struct drm_rect *dirty) { struct gm12u320_device *gm12u320 = to_gm12u320(fb->dev); @@ -425,6 +418,7 @@ static void gm12u320_fb_mark_dirty(struct drm_framebuffer *fb, drm_framebuffer_get(fb); gm12u320->fb_update.fb = fb; gm12u320->fb_update.rect = *dirty; + gm12u320->fb_update.src_map = *map; wakeup = true; } else { struct drm_rect *rect = &gm12u320->fb_update.rect; @@ -453,6 +447,7 @@ static void gm12u320_stop_fb_update(struct gm12u320_device *gm12u320) mutex_lock(&gm12u320->fb_update.lock); old_fb = gm12u320->fb_update.fb; gm12u320->fb_update.fb = NULL; + dma_buf_map_clear(&gm12u320->fb_update.src_map); mutex_unlock(&gm12u320->fb_update.lock); drm_framebuffer_put(old_fb); @@ -565,9 +560,10 @@ static void gm12u320_pipe_enable(struct drm_simple_display_pipe *pipe, { struct drm_rect rect = { 0, 0, GM12U320_USER_WIDTH, GM12U320_HEIGHT }; struct gm12u320_device *gm12u320 = to_gm12u320(pipe->crtc.dev); + struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); gm12u320->fb_update.draw_status_timeout = FIRST_FRAME_TIMEOUT; - gm12u320_fb_mark_dirty(plane_state->fb, &rect); + gm12u320_fb_mark_dirty(plane_state->fb, &shadow_plane_state->map[0], &rect); } static void gm12u320_pipe_disable(struct drm_simple_display_pipe *pipe) @@ -581,16 +577,18 @@ static void gm12u320_pipe_update(struct drm_simple_display_pipe *pipe, struct drm_plane_state *old_state) { struct drm_plane_state *state = pipe->plane.state; + struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(state); struct drm_rect rect; if (drm_atomic_helper_damage_merged(old_state, state, &rect)) - gm12u320_fb_mark_dirty(pipe->plane.state->fb, &rect); + gm12u320_fb_mark_dirty(state->fb, &shadow_plane_state->map[0], &rect); } static const struct drm_simple_display_pipe_funcs gm12u320_pipe_funcs = { .enable = gm12u320_pipe_enable, .disable = gm12u320_pipe_disable, .update = gm12u320_pipe_update, + DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCS, }; static const uint32_t gm12u320_pipe_formats[] = { diff --git a/drivers/gpu/drm/tiny/hx8357d.c b/drivers/gpu/drm/tiny/hx8357d.c index c6525cd02bc2..3e2c2868a363 100644 --- a/drivers/gpu/drm/tiny/hx8357d.c +++ b/drivers/gpu/drm/tiny/hx8357d.c @@ -19,8 +19,8 @@ #include <drm/drm_atomic_helper.h> #include <drm/drm_drv.h> #include <drm/drm_fb_helper.h> +#include <drm/drm_gem_atomic_helper.h> #include <drm/drm_gem_cma_helper.h> -#include <drm/drm_gem_framebuffer_helper.h> #include <drm/drm_managed.h> #include <drm/drm_mipi_dbi.h> #include <drm/drm_modeset_helper.h> @@ -184,7 +184,7 @@ static const struct drm_simple_display_pipe_funcs hx8357d_pipe_funcs = { .enable = yx240qv29_enable, .disable = mipi_dbi_pipe_disable, .update = mipi_dbi_pipe_update, - .prepare_fb = drm_gem_fb_simple_display_pipe_prepare_fb, + .prepare_fb = drm_gem_simple_display_pipe_prepare_fb, }; static const struct drm_display_mode yx350hv15_mode = { diff --git a/drivers/gpu/drm/tiny/ili9225.c b/drivers/gpu/drm/tiny/ili9225.c index 8e98962db5a2..6b87df19eec1 100644 --- a/drivers/gpu/drm/tiny/ili9225.c +++ b/drivers/gpu/drm/tiny/ili9225.c @@ -22,8 +22,8 @@ #include <drm/drm_fb_cma_helper.h> #include <drm/drm_fb_helper.h> #include <drm/drm_fourcc.h> +#include <drm/drm_gem_atomic_helper.h> #include <drm/drm_gem_cma_helper.h> -#include <drm/drm_gem_framebuffer_helper.h> #include <drm/drm_managed.h> #include <drm/drm_mipi_dbi.h> #include <drm/drm_rect.h> @@ -328,7 +328,7 @@ static const struct drm_simple_display_pipe_funcs ili9225_pipe_funcs = { .enable = ili9225_pipe_enable, .disable = ili9225_pipe_disable, .update = ili9225_pipe_update, - .prepare_fb = drm_gem_fb_simple_display_pipe_prepare_fb, + .prepare_fb = drm_gem_simple_display_pipe_prepare_fb, }; static const struct drm_display_mode ili9225_mode = { diff --git a/drivers/gpu/drm/tiny/ili9341.c b/drivers/gpu/drm/tiny/ili9341.c index 6ce97f0698eb..a97f3f70e4a6 100644 --- a/drivers/gpu/drm/tiny/ili9341.c +++ b/drivers/gpu/drm/tiny/ili9341.c @@ -18,8 +18,8 @@ #include <drm/drm_atomic_helper.h> #include <drm/drm_drv.h> #include <drm/drm_fb_helper.h> +#include <drm/drm_gem_atomic_helper.h> #include <drm/drm_gem_cma_helper.h> -#include <drm/drm_gem_framebuffer_helper.h> #include <drm/drm_managed.h> #include <drm/drm_mipi_dbi.h> #include <drm/drm_modeset_helper.h> @@ -140,7 +140,7 @@ static const struct drm_simple_display_pipe_funcs ili9341_pipe_funcs = { .enable = yx240qv29_enable, .disable = mipi_dbi_pipe_disable, .update = mipi_dbi_pipe_update, - .prepare_fb = drm_gem_fb_simple_display_pipe_prepare_fb, + .prepare_fb = drm_gem_simple_display_pipe_prepare_fb, }; static const struct drm_display_mode yx240qv29_mode = { diff --git a/drivers/gpu/drm/tiny/ili9486.c b/drivers/gpu/drm/tiny/ili9486.c index d7ce40eb166a..6422a7f67079 100644 --- a/drivers/gpu/drm/tiny/ili9486.c +++ b/drivers/gpu/drm/tiny/ili9486.c @@ -17,8 +17,8 @@ #include <drm/drm_atomic_helper.h> #include <drm/drm_drv.h> #include <drm/drm_fb_helper.h> +#include <drm/drm_gem_atomic_helper.h> #include <drm/drm_gem_cma_helper.h> -#include <drm/drm_gem_framebuffer_helper.h> #include <drm/drm_managed.h> #include <drm/drm_mipi_dbi.h> #include <drm/drm_modeset_helper.h> @@ -153,7 +153,7 @@ static const struct drm_simple_display_pipe_funcs waveshare_pipe_funcs = { .enable = waveshare_enable, .disable = mipi_dbi_pipe_disable, .update = mipi_dbi_pipe_update, - .prepare_fb = drm_gem_fb_simple_display_pipe_prepare_fb, + .prepare_fb = drm_gem_simple_display_pipe_prepare_fb, }; static const struct drm_display_mode waveshare_mode = { diff --git a/drivers/gpu/drm/tiny/mi0283qt.c b/drivers/gpu/drm/tiny/mi0283qt.c index ff77f983f803..dc76fe53aa72 100644 --- a/drivers/gpu/drm/tiny/mi0283qt.c +++ b/drivers/gpu/drm/tiny/mi0283qt.c @@ -16,8 +16,8 @@ #include <drm/drm_atomic_helper.h> #include <drm/drm_drv.h> #include <drm/drm_fb_helper.h> +#include <drm/drm_gem_atomic_helper.h> #include <drm/drm_gem_cma_helper.h> -#include <drm/drm_gem_framebuffer_helper.h> #include <drm/drm_managed.h> #include <drm/drm_mipi_dbi.h> #include <drm/drm_modeset_helper.h> @@ -144,7 +144,7 @@ static const struct drm_simple_display_pipe_funcs mi0283qt_pipe_funcs = { .enable = mi0283qt_enable, .disable = mipi_dbi_pipe_disable, .update = mipi_dbi_pipe_update, - .prepare_fb = drm_gem_fb_simple_display_pipe_prepare_fb, + .prepare_fb = drm_gem_simple_display_pipe_prepare_fb, }; static const struct drm_display_mode mi0283qt_mode = { diff --git a/drivers/gpu/drm/tiny/repaper.c b/drivers/gpu/drm/tiny/repaper.c index 11c602fc9897..2cee07a2e00b 100644 --- a/drivers/gpu/drm/tiny/repaper.c +++ b/drivers/gpu/drm/tiny/repaper.c @@ -29,6 +29,7 @@ #include <drm/drm_fb_cma_helper.h> #include <drm/drm_fb_helper.h> #include <drm/drm_format_helper.h> +#include <drm/drm_gem_atomic_helper.h> #include <drm/drm_gem_cma_helper.h> #include <drm/drm_gem_framebuffer_helper.h> #include <drm/drm_managed.h> @@ -860,7 +861,7 @@ static const struct drm_simple_display_pipe_funcs repaper_pipe_funcs = { .enable = repaper_pipe_enable, .disable = repaper_pipe_disable, .update = repaper_pipe_update, - .prepare_fb = drm_gem_fb_simple_display_pipe_prepare_fb, + .prepare_fb = drm_gem_simple_display_pipe_prepare_fb, }; static int repaper_connector_get_modes(struct drm_connector *connector) diff --git a/drivers/gpu/drm/tiny/st7586.c b/drivers/gpu/drm/tiny/st7586.c index ff5cf60f4bd7..7d216fe9267f 100644 --- a/drivers/gpu/drm/tiny/st7586.c +++ b/drivers/gpu/drm/tiny/st7586.c @@ -19,8 +19,8 @@ #include <drm/drm_fb_cma_helper.h> #include <drm/drm_fb_helper.h> #include <drm/drm_format_helper.h> +#include <drm/drm_gem_atomic_helper.h> #include <drm/drm_gem_cma_helper.h> -#include <drm/drm_gem_framebuffer_helper.h> #include <drm/drm_managed.h> #include <drm/drm_mipi_dbi.h> #include <drm/drm_rect.h> @@ -268,7 +268,7 @@ static const struct drm_simple_display_pipe_funcs st7586_pipe_funcs = { .enable = st7586_pipe_enable, .disable = st7586_pipe_disable, .update = st7586_pipe_update, - .prepare_fb = drm_gem_fb_simple_display_pipe_prepare_fb, + .prepare_fb = drm_gem_simple_display_pipe_prepare_fb, }; static const struct drm_display_mode st7586_mode = { diff --git a/drivers/gpu/drm/tiny/st7735r.c b/drivers/gpu/drm/tiny/st7735r.c index faaba0a033ea..df8872d62cdd 100644 --- a/drivers/gpu/drm/tiny/st7735r.c +++ b/drivers/gpu/drm/tiny/st7735r.c @@ -19,8 +19,8 @@ #include <drm/drm_atomic_helper.h> #include <drm/drm_drv.h> #include <drm/drm_fb_helper.h> +#include <drm/drm_gem_atomic_helper.h> #include <drm/drm_gem_cma_helper.h> -#include <drm/drm_gem_framebuffer_helper.h> #include <drm/drm_managed.h> #include <drm/drm_mipi_dbi.h> @@ -136,7 +136,7 @@ static const struct drm_simple_display_pipe_funcs st7735r_pipe_funcs = { .enable = st7735r_pipe_enable, .disable = mipi_dbi_pipe_disable, .update = mipi_dbi_pipe_update, - .prepare_fb = drm_gem_fb_simple_display_pipe_prepare_fb, + .prepare_fb = drm_gem_simple_display_pipe_prepare_fb, }; static const struct st7735r_cfg jd_t18003_t01_cfg = { |