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-rw-r--r--Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml7
1 files changed, 3 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml b/Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
index 48a98dae00de..64b2c64ca806 100644
--- a/Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
@@ -71,10 +71,9 @@ properties:
max-link-speed:
description: Specify PCI Gen for link capability.
- allOf:
- - $ref: /schemas/types.yaml#/definitions/uint32
- - enum: [ 1, 2, 3, 4 ]
- - default: 1
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [1, 2, 3, 4]
+ default: 1
bus-range:
description: Range of bus numbers associated with this controller.