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| author | Dan Williams <dan.j.williams@intel.com> | 2023-06-25 17:53:18 -0700 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2023-06-25 17:53:18 -0700 |
| commit | d2f9fe695313b1e50028c1ec4cd09bea67152a60 (patch) | |
| tree | 4677c0f61ea1192a782ea3c31e4df88b4d12d04d /tools/testing/cxl | |
| parent | e2c18eb50c7bb191d1ebfed973c2ec3e0066ad37 (diff) | |
| parent | c2b34d442226b69e519eb0ba61939a74d91712d4 (diff) | |
Merge branch 'for-6.5/cxl-perf' into for-6.5/cxl
Pick up initial support for the CXL 3.0 performance monitoring
definition. Small conflicts with the firmware update work as they both
placed their init code in the same location.
Diffstat (limited to 'tools/testing/cxl')
| -rw-r--r-- | tools/testing/cxl/Kbuild | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/tools/testing/cxl/Kbuild b/tools/testing/cxl/Kbuild index fba7bec96acd..93cc6825d982 100644 --- a/tools/testing/cxl/Kbuild +++ b/tools/testing/cxl/Kbuild @@ -56,6 +56,7 @@ cxl_core-y += $(CXL_CORE_SRC)/memdev.o cxl_core-y += $(CXL_CORE_SRC)/mbox.o cxl_core-y += $(CXL_CORE_SRC)/pci.o cxl_core-y += $(CXL_CORE_SRC)/hdm.o +cxl_core-y += $(CXL_CORE_SRC)/pmu.o cxl_core-$(CONFIG_TRACING) += $(CXL_CORE_SRC)/trace.o cxl_core-$(CONFIG_CXL_REGION) += $(CXL_CORE_SRC)/region.o cxl_core-y += config_check.o |