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authorPeter Ujfalusi <peter.ujfalusi@ti.com>2020-09-10 15:41:10 +0300
committerMark Brown <broonie@kernel.org>2020-09-11 15:05:33 +0100
commit18c140f4a2de8fa674d52fe522a47133bc124f81 (patch)
tree5d3661aabe9c527d72a77b7de7973a6069d9e950 /sound
parent18790b1b514a202bae2863a4206b731d95302c85 (diff)
ASoC: ti: j721e-evm: Add support for j7200-cpb audio
When j7200 SOM is attached to the CPB we only have parent clock for 48KHz family and the rate of the parent clock is 2359296000Hz. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20200910124110.19361-3-peter.ujfalusi@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound')
-rw-r--r--sound/soc/ti/j721e-evm.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/sound/soc/ti/j721e-evm.c b/sound/soc/ti/j721e-evm.c
index cb074af47a7d..29b73303f3fc 100644
--- a/sound/soc/ti/j721e-evm.c
+++ b/sound/soc/ti/j721e-evm.c
@@ -525,6 +525,14 @@ static const struct j721e_audio_match_data j721e_cpb_ivi_data = {
},
};
+static const struct j721e_audio_match_data j7200_cpb_data = {
+ .board_type = J721E_BOARD_CPB,
+ .num_links = 2, /* CPB pcm3168a */
+ .pll_rates = {
+ [J721E_CLK_PARENT_48000] = 2359296000u, /* PLL4 */
+ },
+};
+
static const struct of_device_id j721e_audio_of_match[] = {
{
.compatible = "ti,j721e-cpb-audio",
@@ -532,6 +540,9 @@ static const struct of_device_id j721e_audio_of_match[] = {
}, {
.compatible = "ti,j721e-cpb-ivi-audio",
.data = &j721e_cpb_ivi_data,
+ }, {
+ .compatible = "ti,j7200-cpb-audio",
+ .data = &j7200_cpb_data,
},
{ },
};