diff options
| author | Mark Brown <broonie@kernel.org> | 2020-06-01 13:01:15 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2020-06-01 13:01:15 +0100 |
| commit | 358c7c61fd04d324f83d7968daf8dd9a6ff86a9a (patch) | |
| tree | 23c64d19f8d321a501f9e3567befc527c0fe1d55 /sound/soc/codecs | |
| parent | a72ff08faf3d6b2a1c21c9b815bf02af44cc70ab (diff) | |
| parent | a6b675a89e51a1cdad0481b809b7840d3f86e4b5 (diff) | |
Merge remote-tracking branch 'asoc/for-5.8' into asoc-linus
Diffstat (limited to 'sound/soc/codecs')
71 files changed, 4664 insertions, 1190 deletions
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index e60e0b6a689c..986a6308818b 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -116,6 +116,7 @@ config SND_SOC_ALL_CODECS imply SND_SOC_MAX98926 imply SND_SOC_MAX98927 imply SND_SOC_MAX98373 + imply SND_SOC_MAX98390 imply SND_SOC_MAX9850 imply SND_SOC_MAX9860 imply SND_SOC_MAX9759 @@ -167,7 +168,7 @@ config SND_SOC_ALL_CODECS imply SND_SOC_RT5668 imply SND_SOC_RT5670 imply SND_SOC_RT5677 - imply SND_SOC_RT5682 + imply SND_SOC_RT5682_I2C imply SND_SOC_RT5682_SDW imply SND_SOC_RT700_SDW imply SND_SOC_RT711_SDW @@ -272,6 +273,7 @@ config SND_SOC_ALL_CODECS imply SND_SOC_WM9712 imply SND_SOC_WM9713 imply SND_SOC_WSA881X + imply SND_SOC_ZL38060 help Normally ASoC codec drivers are only built if a machine driver which uses them is also built since they are only usable with a machine @@ -537,8 +539,7 @@ config SND_SOC_CQ0093VC config SND_SOC_CROS_EC_CODEC tristate "codec driver for ChromeOS EC" depends on CROS_EC - select CRYPTO - select CRYPTO_SHA256 + select CRYPTO_LIB_SHA256 help If you say yes here you will get support for the ChromeOS Embedded Controller's Audio Codec. @@ -681,6 +682,7 @@ config SND_SOC_CX2072X config SND_SOC_JZ4740_CODEC depends on MIPS || COMPILE_TEST + depends on OF select REGMAP_MMIO tristate "Ingenic JZ4740 internal CODEC" help @@ -692,6 +694,7 @@ config SND_SOC_JZ4740_CODEC config SND_SOC_JZ4725B_CODEC depends on MIPS || COMPILE_TEST + depends on OF select REGMAP tristate "Ingenic JZ4725B internal CODEC" help @@ -703,6 +706,7 @@ config SND_SOC_JZ4725B_CODEC config SND_SOC_JZ4770_CODEC depends on MIPS || COMPILE_TEST + depends on OF select REGMAP tristate "Ingenic JZ4770 internal CODEC" help @@ -717,7 +721,7 @@ config SND_SOC_L3 config SND_SOC_DA7210 tristate - depends on I2C + depends on SND_SOC_I2C_AND_SPI config SND_SOC_DA7213 tristate "Dialog DA7213 CODEC" @@ -867,6 +871,10 @@ config SND_SOC_MAX98373 tristate "Maxim Integrated MAX98373 Speaker Amplifier" depends on I2C +config SND_SOC_MAX98390 + tristate "Maxim Integrated MAX98390 Speaker Amplifier" + depends on I2C + config SND_SOC_MAX9850 tristate depends on I2C @@ -1135,7 +1143,11 @@ config SND_SOC_RT5677_SPI config SND_SOC_RT5682 tristate - depends on I2C || SOUNDWIRE + +config SND_SOC_RT5682_I2C + tristate + depends on I2C + select SND_SOC_RT5682 config SND_SOC_RT5682_SDW tristate "Realtek RT5682 Codec - SDW" @@ -1569,7 +1581,7 @@ config SND_SOC_WM8978 config SND_SOC_WM8983 tristate - depends on I2C + depends on SND_SOC_I2C_AND_SPI config SND_SOC_WM8985 tristate "Wolfson Microelectronics WM8985 and WM8758 codec driver" @@ -1620,19 +1632,19 @@ config SND_SOC_WM9090 config SND_SOC_WM9705 tristate - depends on SND_SOC_AC97_BUS + depends on SND_SOC_AC97_BUS || AC97_BUS_NEW select REGMAP_AC97 select AC97_BUS_COMPAT if AC97_BUS_NEW config SND_SOC_WM9712 tristate - depends on SND_SOC_AC97_BUS + depends on SND_SOC_AC97_BUS || AC97_BUS_NEW select REGMAP_AC97 select AC97_BUS_COMPAT if AC97_BUS_NEW config SND_SOC_WM9713 tristate - depends on SND_SOC_AC97_BUS + depends on SND_SOC_AC97_BUS || AC97_BUS_NEW select REGMAP_AC97 select AC97_BUS_COMPAT if AC97_BUS_NEW @@ -1645,6 +1657,16 @@ config SND_SOC_WSA881X This enables support for Qualcomm WSA8810/WSA8815 Class-D Smart Speaker Amplifier. +config SND_SOC_ZL38060 + tristate "Microsemi ZL38060 Connected Home Audio Processor" + depends on SPI_MASTER + select GPIOLIB + select REGMAP + help + Support for ZL38060 Connected Home Audio Processor from Microsemi, + which consists of a Digital Signal Processor (DSP), several Digital + Audio Interfaces (DAIs), analog outputs, and a block of 14 GPIOs. + config SND_SOC_ZX_AUD96P22 tristate "ZTE ZX AUD96P22 CODEC" depends on I2C diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 03533157cda6..47ae3cebb61e 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -115,6 +115,7 @@ snd-soc-max98925-objs := max98925.o snd-soc-max98926-objs := max98926.o snd-soc-max98927-objs := max98927.o snd-soc-max98373-objs := max98373.o +snd-soc-max98390-objs := max98390.o snd-soc-max9850-objs := max9850.o snd-soc-max9860-objs := max9860.o snd-soc-mc13783-objs := mc13783.o @@ -178,6 +179,7 @@ snd-soc-rt5677-objs := rt5677.o snd-soc-rt5677-spi-objs := rt5677-spi.o snd-soc-rt5682-objs := rt5682.o snd-soc-rt5682-sdw-objs := rt5682-sdw.o +snd-soc-rt5682-i2c-objs := rt5682-i2c.o snd-soc-rt700-objs := rt700.o rt700-sdw.o snd-soc-rt711-objs := rt711.o rt711-sdw.o snd-soc-rt715-objs := rt715.o rt715-sdw.o @@ -288,6 +290,7 @@ snd-soc-wm9712-objs := wm9712.o snd-soc-wm9713-objs := wm9713.o snd-soc-wm-hubs-objs := wm_hubs.o snd-soc-wsa881x-objs := wsa881x.o +snd-soc-zl38060-objs := zl38060.o snd-soc-zx-aud96p22-objs := zx_aud96p22.o # Amp snd-soc-max9877-objs := max9877.o @@ -415,6 +418,7 @@ obj-$(CONFIG_SND_SOC_MAX98925) += snd-soc-max98925.o obj-$(CONFIG_SND_SOC_MAX98926) += snd-soc-max98926.o obj-$(CONFIG_SND_SOC_MAX98927) += snd-soc-max98927.o obj-$(CONFIG_SND_SOC_MAX98373) += snd-soc-max98373.o +obj-$(CONFIG_SND_SOC_MAX98390) += snd-soc-max98390.o obj-$(CONFIG_SND_SOC_MAX9850) += snd-soc-max9850.o obj-$(CONFIG_SND_SOC_MAX9860) += snd-soc-max9860.o obj-$(CONFIG_SND_SOC_MC13783) += snd-soc-mc13783.o @@ -478,6 +482,7 @@ obj-$(CONFIG_SND_SOC_RT5670) += snd-soc-rt5670.o obj-$(CONFIG_SND_SOC_RT5677) += snd-soc-rt5677.o obj-$(CONFIG_SND_SOC_RT5677_SPI) += snd-soc-rt5677-spi.o obj-$(CONFIG_SND_SOC_RT5682) += snd-soc-rt5682.o +obj-$(CONFIG_SND_SOC_RT5682_I2C) += snd-soc-rt5682-i2c.o obj-$(CONFIG_SND_SOC_RT5682_SDW) += snd-soc-rt5682-sdw.o obj-$(CONFIG_SND_SOC_RT700) += snd-soc-rt700.o obj-$(CONFIG_SND_SOC_RT711) += snd-soc-rt711.o @@ -588,6 +593,7 @@ obj-$(CONFIG_SND_SOC_WM9713) += snd-soc-wm9713.o obj-$(CONFIG_SND_SOC_WM_ADSP) += snd-soc-wm-adsp.o obj-$(CONFIG_SND_SOC_WM_HUBS) += snd-soc-wm-hubs.o obj-$(CONFIG_SND_SOC_WSA881X) += snd-soc-wsa881x.o +obj-$(CONFIG_SND_SOC_ZL38060) += snd-soc-zl38060.o obj-$(CONFIG_SND_SOC_ZX_AUD96P22) += snd-soc-zx-aud96p22.o # Amp diff --git a/sound/soc/codecs/ad1980.c b/sound/soc/codecs/ad1980.c index c4414c725c1f..43b1337bac37 100644 --- a/sound/soc/codecs/ad1980.c +++ b/sound/soc/codecs/ad1980.c @@ -2,7 +2,7 @@ /* * ad1980.c -- ALSA Soc AD1980 codec support * - * Copyright: Analog Device Inc. + * Copyright: Analog Devices Inc. * Author: Roy Huang <roy.huang@analog.com> * Cliff Cai <cliff.cai@analog.com> */ diff --git a/sound/soc/codecs/ad73311.c b/sound/soc/codecs/ad73311.c index 10daf61f0294..b98bf19f594e 100644 --- a/sound/soc/codecs/ad73311.c +++ b/sound/soc/codecs/ad73311.c @@ -2,7 +2,7 @@ /* * ad73311.c -- ALSA Soc AD73311 codec support * - * Copyright: Analog Device Inc. + * Copyright: Analog Devices Inc. * Author: Cliff Cai <cliff.cai@analog.com> */ diff --git a/sound/soc/codecs/adav80x.c b/sound/soc/codecs/adav80x.c index 7cea398ec392..c4b9722c3d8f 100644 --- a/sound/soc/codecs/adav80x.c +++ b/sound/soc/codecs/adav80x.c @@ -725,7 +725,7 @@ static int adav80x_dai_startup(struct snd_pcm_substream *substream, struct snd_soc_component *component = dai->component; struct adav80x *adav80x = snd_soc_component_get_drvdata(component); - if (!snd_soc_component_is_active(component) || !adav80x->rate) + if (!snd_soc_component_active(component) || !adav80x->rate) return 0; return snd_pcm_hw_constraint_single(substream->runtime, @@ -738,7 +738,7 @@ static void adav80x_dai_shutdown(struct snd_pcm_substream *substream, struct snd_soc_component *component = dai->component; struct adav80x *adav80x = snd_soc_component_get_drvdata(component); - if (!snd_soc_component_is_active(component)) + if (!snd_soc_component_active(component)) adav80x->rate = 0; } diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 70341b30f567..9716c9624a89 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c @@ -1926,7 +1926,7 @@ static int arizona_dai_set_sysclk(struct snd_soc_dai *dai, if (clk_id == dai_priv->clk) return 0; - if (dai->active) { + if (snd_soc_dai_active(dai)) { dev_err(component->dev, "Can't change clock on active DAI %d\n", dai->id); return -EBUSY; diff --git a/sound/soc/codecs/cros_ec_codec.c b/sound/soc/codecs/cros_ec_codec.c index d3dc42aa6825..8d45c628e988 100644 --- a/sound/soc/codecs/cros_ec_codec.c +++ b/sound/soc/codecs/cros_ec_codec.c @@ -8,7 +8,6 @@ * EC for audio function. */ -#include <crypto/hash.h> #include <crypto/sha.h> #include <linux/acpi.h> #include <linux/delay.h> @@ -107,24 +106,11 @@ error: static int calculate_sha256(struct cros_ec_codec_priv *priv, uint8_t *buf, uint32_t size, uint8_t *digest) { - struct crypto_shash *tfm; + struct sha256_state sctx; - tfm = crypto_alloc_shash("sha256", CRYPTO_ALG_TYPE_SHASH, 0); - if (IS_ERR(tfm)) { - dev_err(priv->dev, "can't alloc shash\n"); - return PTR_ERR(tfm); - } - - { - SHASH_DESC_ON_STACK(desc, tfm); - - desc->tfm = tfm; - - crypto_shash_digest(desc, buf, size, digest); - shash_desc_zero(desc); - } - - crypto_free_shash(tfm); + sha256_init(&sctx); + sha256_update(&sctx, buf, size); + sha256_final(&sctx, digest); #ifdef DEBUG { diff --git a/sound/soc/codecs/cs4271.c b/sound/soc/codecs/cs4271.c index 62f412d6f9f2..d43762ae8f3d 100644 --- a/sound/soc/codecs/cs4271.c +++ b/sound/soc/codecs/cs4271.c @@ -356,9 +356,9 @@ static int cs4271_hw_params(struct snd_pcm_substream *substream, */ if ((substream->stream == SNDRV_PCM_STREAM_PLAYBACK && - !dai->stream_active[SNDRV_PCM_STREAM_CAPTURE]) || + !snd_soc_dai_stream_active(dai, SNDRV_PCM_STREAM_CAPTURE)) || (substream->stream == SNDRV_PCM_STREAM_CAPTURE && - !dai->stream_active[SNDRV_PCM_STREAM_PLAYBACK])) { + !snd_soc_dai_stream_active(dai, SNDRV_PCM_STREAM_PLAYBACK))) { ret = regmap_update_bits(cs4271->regmap, CS4271_MODE2, CS4271_MODE2_PDN, CS4271_MODE2_PDN); diff --git a/sound/soc/codecs/cs47l15.c b/sound/soc/codecs/cs47l15.c index 8d1869bf7f9c..402c6b7c7014 100644 --- a/sound/soc/codecs/cs47l15.c +++ b/sound/soc/codecs/cs47l15.c @@ -1229,11 +1229,10 @@ static struct snd_soc_dai_driver cs47l15_dai[] = { }, }; -static int cs47l15_open(struct snd_compr_stream *stream) +static int cs47l15_open(struct snd_soc_component *component, + struct snd_compr_stream *stream) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct snd_soc_component *component = - snd_soc_rtdcom_lookup(rtd, DRV_NAME); struct cs47l15 *cs47l15 = snd_soc_component_get_drvdata(component); struct madera_priv *priv = &cs47l15->core; struct madera *madera = priv->madera; @@ -1329,7 +1328,7 @@ static unsigned int cs47l15_digital_vu[] = { MADERA_DAC_DIGITAL_VOLUME_5R, }; -static const struct snd_compr_ops cs47l15_compr_ops = { +static const struct snd_compress_ops cs47l15_compress_ops = { .open = &cs47l15_open, .free = &wm_adsp_compr_free, .set_params = &wm_adsp_compr_set_params, @@ -1345,7 +1344,7 @@ static const struct snd_soc_component_driver soc_component_dev_cs47l15 = { .set_sysclk = &madera_set_sysclk, .set_pll = &cs47l15_set_fll, .name = DRV_NAME, - .compr_ops = &cs47l15_compr_ops, + .compress_ops = &cs47l15_compress_ops, .controls = cs47l15_snd_controls, .num_controls = ARRAY_SIZE(cs47l15_snd_controls), .dapm_widgets = cs47l15_dapm_widgets, diff --git a/sound/soc/codecs/cs47l24.c b/sound/soc/codecs/cs47l24.c index 6b0570f59630..f6d173d0120e 100644 --- a/sound/soc/codecs/cs47l24.c +++ b/sound/soc/codecs/cs47l24.c @@ -1068,10 +1068,10 @@ static struct snd_soc_dai_driver cs47l24_dai[] = { }, }; -static int cs47l24_open(struct snd_compr_stream *stream) +static int cs47l24_open(struct snd_soc_component *component, + struct snd_compr_stream *stream) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, DRV_NAME); struct cs47l24_priv *priv = snd_soc_component_get_drvdata(component); struct arizona *arizona = priv->core.arizona; int n_adsp; @@ -1178,7 +1178,7 @@ static unsigned int cs47l24_digital_vu[] = { ARIZONA_DAC_DIGITAL_VOLUME_4L, }; -static struct snd_compr_ops cs47l24_compr_ops = { +static struct snd_compress_ops cs47l24_compress_ops = { .open = cs47l24_open, .free = wm_adsp_compr_free, .set_params = wm_adsp_compr_set_params, @@ -1194,7 +1194,7 @@ static const struct snd_soc_component_driver soc_component_dev_cs47l24 = { .set_sysclk = arizona_set_sysclk, .set_pll = cs47l24_set_fll, .name = DRV_NAME, - .compr_ops = &cs47l24_compr_ops, + .compress_ops = &cs47l24_compress_ops, .controls = cs47l24_snd_controls, .num_controls = ARRAY_SIZE(cs47l24_snd_controls), .dapm_widgets = cs47l24_dapm_widgets, diff --git a/sound/soc/codecs/cs47l35.c b/sound/soc/codecs/cs47l35.c index 18839807c9d1..d7538d50bbd3 100644 --- a/sound/soc/codecs/cs47l35.c +++ b/sound/soc/codecs/cs47l35.c @@ -1504,11 +1504,10 @@ static struct snd_soc_dai_driver cs47l35_dai[] = { }, }; -static int cs47l35_open(struct snd_compr_stream *stream) +static int cs47l35_open(struct snd_soc_component *component, + struct snd_compr_stream *stream) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct snd_soc_component *component = - snd_soc_rtdcom_lookup(rtd, DRV_NAME); struct cs47l35 *cs47l35 = snd_soc_component_get_drvdata(component); struct madera_priv *priv = &cs47l35->core; struct madera *madera = priv->madera; @@ -1622,7 +1621,7 @@ static unsigned int cs47l35_digital_vu[] = { MADERA_DAC_DIGITAL_VOLUME_5R, }; -static const struct snd_compr_ops cs47l35_compr_ops = { +static const struct snd_compress_ops cs47l35_compress_ops = { .open = &cs47l35_open, .free = &wm_adsp_compr_free, .set_params = &wm_adsp_compr_set_params, @@ -1638,7 +1637,7 @@ static const struct snd_soc_component_driver soc_component_dev_cs47l35 = { .set_sysclk = &madera_set_sysclk, .set_pll = &cs47l35_set_fll, .name = DRV_NAME, - .compr_ops = &cs47l35_compr_ops, + .compress_ops = &cs47l35_compress_ops, .controls = cs47l35_snd_controls, .num_controls = ARRAY_SIZE(cs47l35_snd_controls), .dapm_widgets = cs47l35_dapm_widgets, diff --git a/sound/soc/codecs/cs47l85.c b/sound/soc/codecs/cs47l85.c index a575113207f0..9de991adad74 100644 --- a/sound/soc/codecs/cs47l85.c +++ b/sound/soc/codecs/cs47l85.c @@ -2447,11 +2447,10 @@ static struct snd_soc_dai_driver cs47l85_dai[] = { }, }; -static int cs47l85_open(struct snd_compr_stream *stream) +static int cs47l85_open(struct snd_soc_component *component, + struct snd_compr_stream *stream) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct snd_soc_component *component = - snd_soc_rtdcom_lookup(rtd, DRV_NAME); struct cs47l85 *cs47l85 = snd_soc_component_get_drvdata(component); struct madera_priv *priv = &cs47l85->core; struct madera *madera = priv->madera; @@ -2566,7 +2565,7 @@ static const unsigned int cs47l85_digital_vu[] = { MADERA_DAC_DIGITAL_VOLUME_6R, }; -static const struct snd_compr_ops cs47l85_compr_ops = { +static const struct snd_compress_ops cs47l85_compress_ops = { .open = &cs47l85_open, .free = &wm_adsp_compr_free, .set_params = &wm_adsp_compr_set_params, @@ -2582,7 +2581,7 @@ static const struct snd_soc_component_driver soc_component_dev_cs47l85 = { .set_sysclk = &madera_set_sysclk, .set_pll = &cs47l85_set_fll, .name = DRV_NAME, - .compr_ops = &cs47l85_compr_ops, + .compress_ops = &cs47l85_compress_ops, .controls = cs47l85_snd_controls, .num_controls = ARRAY_SIZE(cs47l85_snd_controls), .dapm_widgets = cs47l85_dapm_widgets, diff --git a/sound/soc/codecs/cs47l90.c b/sound/soc/codecs/cs47l90.c index 81a1311b14e6..2715b5da0415 100644 --- a/sound/soc/codecs/cs47l90.c +++ b/sound/soc/codecs/cs47l90.c @@ -2358,11 +2358,10 @@ static struct snd_soc_dai_driver cs47l90_dai[] = { }, }; -static int cs47l90_open(struct snd_compr_stream *stream) +static int cs47l90_open(struct snd_soc_component *component, + struct snd_compr_stream *stream) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct snd_soc_component *component = - snd_soc_rtdcom_lookup(rtd, DRV_NAME); struct cs47l90 *cs47l90 = snd_soc_component_get_drvdata(component); struct madera_priv *priv = &cs47l90->core; struct madera *madera = priv->madera; @@ -2473,7 +2472,7 @@ static unsigned int cs47l90_digital_vu[] = { MADERA_DAC_DIGITAL_VOLUME_5R, }; -static const struct snd_compr_ops cs47l90_compr_ops = { +static const struct snd_compress_ops cs47l90_compress_ops = { .open = &cs47l90_open, .free = &wm_adsp_compr_free, .set_params = &wm_adsp_compr_set_params, @@ -2489,7 +2488,7 @@ static const struct snd_soc_component_driver soc_component_dev_cs47l90 = { .set_sysclk = &madera_set_sysclk, .set_pll = &cs47l90_set_fll, .name = DRV_NAME, - .compr_ops = &cs47l90_compr_ops, + .compress_ops = &cs47l90_compress_ops, .controls = cs47l90_snd_controls, .num_controls = ARRAY_SIZE(cs47l90_snd_controls), .dapm_widgets = cs47l90_dapm_widgets, diff --git a/sound/soc/codecs/cs47l92.c b/sound/soc/codecs/cs47l92.c index 15fc213d178d..108d28007185 100644 --- a/sound/soc/codecs/cs47l92.c +++ b/sound/soc/codecs/cs47l92.c @@ -1830,11 +1830,10 @@ static struct snd_soc_dai_driver cs47l92_dai[] = { }, }; -static int cs47l92_open(struct snd_compr_stream *stream) +static int cs47l92_open(struct snd_soc_component *component, + struct snd_compr_stream *stream) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct snd_soc_component *component = - snd_soc_rtdcom_lookup(rtd, DRV_NAME); struct cs47l92 *cs47l92 = snd_soc_component_get_drvdata(component); struct madera_priv *priv = &cs47l92->core; struct madera *madera = priv->madera; @@ -1933,7 +1932,7 @@ static unsigned int cs47l92_digital_vu[] = { MADERA_DAC_DIGITAL_VOLUME_5R, }; -static const struct snd_compr_ops cs47l92_compr_ops = { +static const struct snd_compress_ops cs47l92_compress_ops = { .open = &cs47l92_open, .free = &wm_adsp_compr_free, .set_params = &wm_adsp_compr_set_params, @@ -1949,7 +1948,7 @@ static const struct snd_soc_component_driver soc_component_dev_cs47l92 = { .set_sysclk = &madera_set_sysclk, .set_pll = &cs47l92_set_fll, .name = DRV_NAME, - .compr_ops = &cs47l92_compr_ops, + .compress_ops = &cs47l92_compress_ops, .controls = cs47l92_snd_controls, .num_controls = ARRAY_SIZE(cs47l92_snd_controls), .dapm_widgets = cs47l92_dapm_widgets, diff --git a/sound/soc/codecs/da7213.c b/sound/soc/codecs/da7213.c index 925a03996db4..3e6ad996741b 100644 --- a/sound/soc/codecs/da7213.c +++ b/sound/soc/codecs/da7213.c @@ -19,6 +19,7 @@ #include <linux/module.h> #include <sound/pcm.h> #include <sound/pcm_params.h> +#include <linux/pm_runtime.h> #include <sound/soc.h> #include <sound/initval.h> #include <sound/tlv.h> @@ -807,6 +808,11 @@ static int da7213_dai_event(struct snd_soc_dapm_widget *w, static const struct snd_soc_dapm_widget da7213_dapm_widgets[] = { /* + * Power Supply + */ + SND_SOC_DAPM_REGULATOR_SUPPLY("VDDMIC", 0, 0), + + /* * Input & Output */ @@ -932,6 +938,9 @@ static const struct snd_soc_dapm_route da7213_audio_map[] = { /* Dest Connecting Widget source */ /* Input path */ + {"Mic Bias 1", NULL, "VDDMIC"}, + {"Mic Bias 2", NULL, "VDDMIC"}, + {"MIC1", NULL, "Mic Bias 1"}, {"MIC2", NULL, "Mic Bias 2"}, @@ -1334,10 +1343,10 @@ static int da7213_mute(struct snd_soc_dai *dai, int mute) #define DA7213_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) -static int da7213_set_dai_sysclk(struct snd_soc_dai *codec_dai, - int clk_id, unsigned int freq, int dir) +static int da7213_set_component_sysclk(struct snd_soc_component *component, + int clk_id, int source, + unsigned int freq, int dir) { - struct snd_soc_component *component = codec_dai->component; struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); int ret = 0; @@ -1345,7 +1354,7 @@ static int da7213_set_dai_sysclk(struct snd_soc_dai *codec_dai, return 0; if (((freq < 5000000) && (freq != 32768)) || (freq > 54000000)) { - dev_err(codec_dai->dev, "Unsupported MCLK value %d\n", + dev_err(component->dev, "Unsupported MCLK value %d\n", freq); return -EINVAL; } @@ -1361,7 +1370,7 @@ static int da7213_set_dai_sysclk(struct snd_soc_dai *codec_dai, DA7213_PLL_MCLK_SQR_EN); break; default: - dev_err(codec_dai->dev, "Unknown clock source %d\n", clk_id); + dev_err(component->dev, "Unknown clock source %d\n", clk_id); return -EINVAL; } @@ -1371,7 +1380,7 @@ static int da7213_set_dai_sysclk(struct snd_soc_dai *codec_dai, freq = clk_round_rate(da7213->mclk, freq); ret = clk_set_rate(da7213->mclk, freq); if (ret) { - dev_err(codec_dai->dev, "Failed to set clock rate %d\n", + dev_err(component->dev, "Failed to set clock rate %d\n", freq); return ret; } @@ -1383,10 +1392,10 @@ static int da7213_set_dai_sysclk(struct snd_soc_dai *codec_dai, } /* Supported PLL input frequencies are 32KHz, 5MHz - 54MHz. */ -static int da7213_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, - int source, unsigned int fref, unsigned int fout) +static int da7213_set_component_pll(struct snd_soc_component *component, + int pll_id, int source, + unsigned int fref, unsigned int fout) { - struct snd_soc_component *component = codec_dai->component; struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); u8 pll_ctrl, indiv_bits, indiv; @@ -1498,8 +1507,6 @@ static int da7213_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, static const struct snd_soc_dai_ops da7213_dai_ops = { .hw_params = da7213_hw_params, .set_fmt = da7213_set_dai_fmt, - .set_sysclk = da7213_set_dai_sysclk, - .set_pll = da7213_set_dai_pll, .digital_mute = da7213_mute, }; @@ -1571,6 +1578,7 @@ static int da7213_set_bias_level(struct snd_soc_component *component, #if defined(CONFIG_OF) /* DT */ static const struct of_device_id da7213_of_match[] = { + { .compatible = "dlg,da7212", }, { .compatible = "dlg,da7213", }, { } }; @@ -1690,6 +1698,8 @@ static int da7213_probe(struct snd_soc_component *component) { struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); + pm_runtime_get_sync(component->dev); + /* Default to using ALC auto offset calibration mode. */ snd_soc_component_update_bits(component, DA7213_ALC_CTRL1, DA7213_ALC_CALIB_MODE_MAN, 0); @@ -1810,6 +1820,8 @@ static int da7213_probe(struct snd_soc_component *component) DA7213_DMIC_CLK_RATE_MASK, dmic_cfg); } + pm_runtime_put_sync(component->dev); + /* Check if MCLK provided */ da7213->mclk = devm_clk_get(component->dev, "mclk"); if (IS_ERR(da7213->mclk)) { @@ -1831,6 +1843,8 @@ static const struct snd_soc_component_driver soc_component_dev_da7213 = { .num_dapm_widgets = ARRAY_SIZE(da7213_dapm_widgets), .dapm_routes = da7213_audio_map, .num_dapm_routes = ARRAY_SIZE(da7213_audio_map), + .set_sysclk = da7213_set_component_sysclk, + .set_pll = da7213_set_component_pll, .idle_bias_on = 1, .use_pmdown_time = 1, .endianness = 1, @@ -1847,11 +1861,22 @@ static const struct regmap_config da7213_regmap_config = { .cache_type = REGCACHE_RBTREE, }; +static void da7213_power_off(void *data) +{ + struct da7213_priv *da7213 = data; + regulator_bulk_disable(DA7213_NUM_SUPPLIES, da7213->supplies); +} + +static const char *da7213_supply_names[DA7213_NUM_SUPPLIES] = { + [DA7213_SUPPLY_VDDA] = "VDDA", + [DA7213_SUPPLY_VDDIO] = "VDDIO", +}; + static int da7213_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) { struct da7213_priv *da7213; - int ret; + int i, ret; da7213 = devm_kzalloc(&i2c->dev, sizeof(*da7213), GFP_KERNEL); if (!da7213) @@ -1859,6 +1884,25 @@ static int da7213_i2c_probe(struct i2c_client *i2c, i2c_set_clientdata(i2c, da7213); + /* Get required supplies */ + for (i = 0; i < DA7213_NUM_SUPPLIES; ++i) + da7213->supplies[i].supply = da7213_supply_names[i]; + + ret = devm_regulator_bulk_get(&i2c->dev, DA7213_NUM_SUPPLIES, + da7213->supplies); + if (ret) { + dev_err(&i2c->dev, "Failed to get supplies: %d\n", ret); + return ret; + } + + ret = regulator_bulk_enable(DA7213_NUM_SUPPLIES, da7213->supplies); + if (ret < 0) + return ret; + + ret = devm_add_action_or_reset(&i2c->dev, da7213_power_off, da7213); + if (ret < 0) + return ret; + da7213->regmap = devm_regmap_init_i2c(i2c, &da7213_regmap_config); if (IS_ERR(da7213->regmap)) { ret = PTR_ERR(da7213->regmap); @@ -1866,6 +1910,11 @@ static int da7213_i2c_probe(struct i2c_client *i2c, return ret; } + pm_runtime_set_autosuspend_delay(&i2c->dev, 100); + pm_runtime_use_autosuspend(&i2c->dev); + pm_runtime_set_active(&i2c->dev); + pm_runtime_enable(&i2c->dev); + ret = devm_snd_soc_register_component(&i2c->dev, &soc_component_dev_da7213, &da7213_dai, 1); if (ret < 0) { @@ -1875,6 +1924,34 @@ static int da7213_i2c_probe(struct i2c_client *i2c, return ret; } +static int __maybe_unused da7213_runtime_suspend(struct device *dev) +{ + struct da7213_priv *da7213 = dev_get_drvdata(dev); + + regcache_cache_only(da7213->regmap, true); + regcache_mark_dirty(da7213->regmap); + regulator_bulk_disable(DA7213_NUM_SUPPLIES, da7213->supplies); + + return 0; +} + +static int __maybe_unused da7213_runtime_resume(struct device *dev) +{ + struct da7213_priv *da7213 = dev_get_drvdata(dev); + int ret; + + ret = regulator_bulk_enable(DA7213_NUM_SUPPLIES, da7213->supplies); + if (ret < 0) + return ret; + regcache_cache_only(da7213->regmap, false); + regcache_sync(da7213->regmap); + return 0; +} + +static const struct dev_pm_ops da7213_pm = { + SET_RUNTIME_PM_OPS(da7213_runtime_suspend, da7213_runtime_resume, NULL) +}; + static const struct i2c_device_id da7213_i2c_id[] = { { "da7213", 0 }, { } @@ -1887,6 +1964,7 @@ static struct i2c_driver da7213_i2c_driver = { .name = "da7213", .of_match_table = of_match_ptr(da7213_of_match), .acpi_match_table = ACPI_PTR(da7213_acpi_match), + .pm = &da7213_pm, }, .probe = da7213_i2c_probe, .id_table = da7213_i2c_id, diff --git a/sound/soc/codecs/da7213.h b/sound/soc/codecs/da7213.h index 3250a3821fcc..3890829dfb6e 100644 --- a/sound/soc/codecs/da7213.h +++ b/sound/soc/codecs/da7213.h @@ -12,6 +12,7 @@ #include <linux/clk.h> #include <linux/regmap.h> +#include <linux/regulator/consumer.h> #include <sound/da7213.h> /* @@ -521,9 +522,17 @@ enum da7213_sys_clk { DA7213_SYSCLK_PLL_32KHZ }; +/* Regulators */ +enum da7213_supplies { + DA7213_SUPPLY_VDDA = 0, + DA7213_SUPPLY_VDDIO, + DA7213_NUM_SUPPLIES, +}; + /* Codec private data */ struct da7213_priv { struct regmap *regmap; + struct regulator_bulk_data supplies[DA7213_NUM_SUPPLIES]; struct clk *mclk; unsigned int mclk_rate; int clk_src; diff --git a/sound/soc/codecs/dmic.c b/sound/soc/codecs/dmic.c index f5560a49b9e5..5d079d90fd3b 100644 --- a/sound/soc/codecs/dmic.c +++ b/sound/soc/codecs/dmic.c @@ -59,14 +59,14 @@ static int dmic_aif_event(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_POST_PMU: if (dmic->gpio_en) - gpiod_set_value(dmic->gpio_en, 1); + gpiod_set_value_cansleep(dmic->gpio_en, 1); if (dmic->wakeup_delay) msleep(dmic->wakeup_delay); break; case SND_SOC_DAPM_POST_PMD: if (dmic->gpio_en) - gpiod_set_value(dmic->gpio_en, 0); + gpiod_set_value_cansleep(dmic->gpio_en, 0); break; } diff --git a/sound/soc/codecs/jz4725b.c b/sound/soc/codecs/jz4725b.c index 2567a5d15b55..e49374c72e70 100644 --- a/sound/soc/codecs/jz4725b.c +++ b/sound/soc/codecs/jz4725b.c @@ -574,19 +574,17 @@ static int jz4725b_codec_probe(struct platform_device *pdev) return ret; } -#ifdef CONFIG_OF static const struct of_device_id jz4725b_codec_of_matches[] = { { .compatible = "ingenic,jz4725b-codec", }, { } }; MODULE_DEVICE_TABLE(of, jz4725b_codec_of_matches); -#endif static struct platform_driver jz4725b_codec_driver = { .probe = jz4725b_codec_probe, .driver = { .name = "jz4725b-codec", - .of_match_table = of_match_ptr(jz4725b_codec_of_matches), + .of_match_table = jz4725b_codec_of_matches, }, }; module_platform_driver(jz4725b_codec_driver); diff --git a/sound/soc/codecs/jz4740.c b/sound/soc/codecs/jz4740.c index 460aa1fd1efe..c9900d1cd5c2 100644 --- a/sound/soc/codecs/jz4740.c +++ b/sound/soc/codecs/jz4740.c @@ -344,19 +344,17 @@ static int jz4740_codec_probe(struct platform_device *pdev) return ret; } -#ifdef CONFIG_OF static const struct of_device_id jz4740_codec_of_matches[] = { { .compatible = "ingenic,jz4740-codec", }, { } }; MODULE_DEVICE_TABLE(of, jz4740_codec_of_matches); -#endif static struct platform_driver jz4740_codec_driver = { .probe = jz4740_codec_probe, .driver = { .name = "jz4740-codec", - .of_match_table = of_match_ptr(jz4740_codec_of_matches), + .of_match_table = jz4740_codec_of_matches, }, }; diff --git a/sound/soc/codecs/jz4770.c b/sound/soc/codecs/jz4770.c index e7cf2c107607..34775aa62402 100644 --- a/sound/soc/codecs/jz4770.c +++ b/sound/soc/codecs/jz4770.c @@ -937,7 +937,7 @@ static struct platform_driver jz4770_codec_driver = { .probe = jz4770_codec_probe, .driver = { .name = "jz4770-codec", - .of_match_table = of_match_ptr(jz4770_codec_of_matches), + .of_match_table = jz4770_codec_of_matches, }, }; module_platform_driver(jz4770_codec_driver); diff --git a/sound/soc/codecs/madera.c b/sound/soc/codecs/madera.c index a448d2a2918a..ec380b0b2d4e 100644 --- a/sound/soc/codecs/madera.c +++ b/sound/soc/codecs/madera.c @@ -3279,7 +3279,7 @@ static int madera_dai_set_sysclk(struct snd_soc_dai *dai, if (is_sync == madera_is_syncclk(dai_priv->clk)) return 0; - if (dai->active) { + if (snd_soc_dai_active(dai)) { dev_err(component->dev, "Can't change clock on active DAI %d\n", dai->id); return -EBUSY; diff --git a/sound/soc/codecs/max98090.c b/sound/soc/codecs/max98090.c index 032adc14562d..e2cc1ad8cb0a 100644 --- a/sound/soc/codecs/max98090.c +++ b/sound/soc/codecs/max98090.c @@ -2039,7 +2039,7 @@ static int max98090_dai_trigger(struct snd_pcm_substream *substream, int cmd, case SNDRV_PCM_TRIGGER_START: case SNDRV_PCM_TRIGGER_RESUME: case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: - if (!max98090->master && dai->active == 1) + if (!max98090->master && snd_soc_dai_active(dai) == 1) queue_delayed_work(system_power_efficient_wq, &max98090->pll_det_enable_work, msecs_to_jiffies(10)); @@ -2047,7 +2047,7 @@ static int max98090_dai_trigger(struct snd_pcm_substream *substream, int cmd, case SNDRV_PCM_TRIGGER_STOP: case SNDRV_PCM_TRIGGER_SUSPEND: case SNDRV_PCM_TRIGGER_PAUSE_PUSH: - if (!max98090->master && dai->active == 1) + if (!max98090->master && snd_soc_dai_active(dai) == 1) schedule_work(&max98090->pll_det_disable_work); break; default: @@ -2109,7 +2109,7 @@ static void max98090_pll_work(struct max98090_priv *max98090) unsigned int pll; int i; - if (!snd_soc_component_is_active(component)) + if (!snd_soc_component_active(component)) return; dev_info_ratelimited(component->dev, "PLL unlocked\n"); diff --git a/sound/soc/codecs/max98390.c b/sound/soc/codecs/max98390.c new file mode 100644 index 000000000000..b9ce44dda886 --- /dev/null +++ b/sound/soc/codecs/max98390.c @@ -0,0 +1,1040 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * max98390.c -- MAX98390 ALSA Soc Audio driver + * + * Copyright (C) 2020 Maxim Integrated Products + * + */ + +#include <linux/acpi.h> +#include <linux/cdev.h> +#include <linux/dmi.h> +#include <linux/firmware.h> +#include <linux/gpio.h> +#include <linux/i2c.h> +#include <linux/module.h> +#include <linux/of_gpio.h> +#include <linux/regmap.h> +#include <linux/slab.h> +#include <linux/time.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/tlv.h> + +#include "max98390.h" + +static struct reg_default max98390_reg_defaults[] = { + {MAX98390_INT_EN1, 0xf0}, + {MAX98390_INT_EN2, 0x00}, + {MAX98390_INT_EN3, 0x00}, + {MAX98390_INT_FLAG_CLR1, 0x00}, + {MAX98390_INT_FLAG_CLR2, 0x00}, + {MAX98390_INT_FLAG_CLR3, 0x00}, + {MAX98390_IRQ_CTRL, 0x01}, + {MAX98390_CLK_MON, 0x6d}, + {MAX98390_DAT_MON, 0x03}, + {MAX98390_WDOG_CTRL, 0x00}, + {MAX98390_WDOG_RST, 0x00}, + {MAX98390_MEAS_ADC_THERM_WARN_THRESH, 0x75}, + {MAX98390_MEAS_ADC_THERM_SHDN_THRESH, 0x8c}, + {MAX98390_MEAS_ADC_THERM_HYSTERESIS, 0x08}, + {MAX98390_PIN_CFG, 0x55}, + {MAX98390_PCM_RX_EN_A, 0x00}, + {MAX98390_PCM_RX_EN_B, 0x00}, + {MAX98390_PCM_TX_EN_A, 0x00}, + {MAX98390_PCM_TX_EN_B, 0x00}, + {MAX98390_PCM_TX_HIZ_CTRL_A, 0xff}, + {MAX98390_PCM_TX_HIZ_CTRL_B, 0xff}, + {MAX98390_PCM_CH_SRC_1, 0x00}, + {MAX98390_PCM_CH_SRC_2, 0x00}, + {MAX98390_PCM_CH_SRC_3, 0x00}, + {MAX98390_PCM_MODE_CFG, 0xc0}, + {MAX98390_PCM_MASTER_MODE, 0x1c}, + {MAX98390_PCM_CLK_SETUP, 0x44}, + {MAX98390_PCM_SR_SETUP, 0x08}, + {MAX98390_ICC_RX_EN_A, 0x00}, + {MAX98390_ICC_RX_EN_B, 0x00}, + {MAX98390_ICC_TX_EN_A, 0x00}, + {MAX98390_ICC_TX_EN_B, 0x00}, + {MAX98390_ICC_HIZ_MANUAL_MODE, 0x00}, + {MAX98390_ICC_TX_HIZ_EN_A, 0x00}, + {MAX98390_ICC_TX_HIZ_EN_B, 0x00}, + {MAX98390_ICC_LNK_EN, 0x00}, + {MAX98390_R2039_AMP_DSP_CFG, 0x0f}, + {MAX98390_R203A_AMP_EN, 0x81}, + {MAX98390_TONE_GEN_DC_CFG, 0x00}, + {MAX98390_SPK_SRC_SEL, 0x00}, + {MAX98390_SSM_CFG, 0x85}, + {MAX98390_MEAS_EN, 0x03}, + {MAX98390_MEAS_DSP_CFG, 0x0f}, + {MAX98390_BOOST_CTRL0, 0x1c}, + {MAX98390_BOOST_CTRL3, 0x01}, + {MAX98390_BOOST_CTRL1, 0x40}, + {MAX98390_MEAS_ADC_CFG, 0x07}, + {MAX98390_MEAS_ADC_BASE_MSB, 0x00}, + {MAX98390_MEAS_ADC_BASE_LSB, 0x23}, + {MAX98390_ADC_CH0_DIVIDE, 0x00}, + {MAX98390_ADC_CH1_DIVIDE, 0x00}, + {MAX98390_ADC_CH2_DIVIDE, 0x00}, + {MAX98390_ADC_CH0_FILT_CFG, 0x00}, + {MAX98390_ADC_CH1_FILT_CFG, 0x00}, + {MAX98390_ADC_CH2_FILT_CFG, 0x00}, + {MAX98390_PWR_GATE_CTL, 0x2c}, + {MAX98390_BROWNOUT_EN, 0x00}, + {MAX98390_BROWNOUT_INFINITE_HOLD, 0x00}, + {MAX98390_BROWNOUT_INFINITE_HOLD_CLR, 0x00}, + {MAX98390_BROWNOUT_LVL_HOLD, 0x00}, + {MAX98390_BROWNOUT_LVL1_THRESH, 0x00}, + {MAX98390_BROWNOUT_LVL2_THRESH, 0x00}, + {MAX98390_BROWNOUT_LVL3_THRESH, 0x00}, + {MAX98390_BROWNOUT_LVL4_THRESH, 0x00}, + {MAX98390_BROWNOUT_THRESH_HYSTERYSIS, 0x00}, + {MAX98390_BROWNOUT_AMP_LIMITER_ATK_REL, 0x1f}, + {MAX98390_BROWNOUT_AMP_GAIN_ATK_REL, 0x00}, + {MAX98390_BROWNOUT_AMP1_CLIP_MODE, 0x00}, + {MAX98390_BROWNOUT_LVL1_CUR_LIMIT, 0x00}, + {MAX98390_BROWNOUT_LVL1_AMP1_CTRL1, 0x00}, + {MAX98390_BROWNOUT_LVL1_AMP1_CTRL2, 0x00}, + {MAX98390_BROWNOUT_LVL1_AMP1_CTRL3, 0x00}, + {MAX98390_BROWNOUT_LVL2_CUR_LIMIT, 0x00}, + {MAX98390_BROWNOUT_LVL2_AMP1_CTRL1, 0x00}, + {MAX98390_BROWNOUT_LVL2_AMP1_CTRL2, 0x00}, + {MAX98390_BROWNOUT_LVL2_AMP1_CTRL3, 0x00}, + {MAX98390_BROWNOUT_LVL3_CUR_LIMIT, 0x00}, + {MAX98390_BROWNOUT_LVL3_AMP1_CTRL1, 0x00}, + {MAX98390_BROWNOUT_LVL3_AMP1_CTRL2, 0x00}, + {MAX98390_BROWNOUT_LVL3_AMP1_CTRL3, 0x00}, + {MAX98390_BROWNOUT_LVL4_CUR_LIMIT, 0x00}, + {MAX98390_BROWNOUT_LVL4_AMP1_CTRL1, 0x00}, + {MAX98390_BROWNOUT_LVL4_AMP1_CTRL2, 0x00}, + {MAX98390_BROWNOUT_LVL4_AMP1_CTRL3, 0x00}, + {MAX98390_BROWNOUT_ILIM_HLD, 0x00}, + {MAX98390_BROWNOUT_LIM_HLD, 0x00}, + {MAX98390_BROWNOUT_CLIP_HLD, 0x00}, + {MAX98390_BROWNOUT_GAIN_HLD, 0x00}, + {MAX98390_ENV_TRACK_VOUT_HEADROOM, 0x0f}, + {MAX98390_ENV_TRACK_BOOST_VOUT_DELAY, 0x80}, + {MAX98390_ENV_TRACK_REL_RATE, 0x07}, + {MAX98390_ENV_TRACK_HOLD_RATE, 0x07}, + {MAX98390_ENV_TRACK_CTRL, 0x01}, + {MAX98390_BOOST_BYPASS1, 0x49}, + {MAX98390_BOOST_BYPASS2, 0x2b}, + {MAX98390_BOOST_BYPASS3, 0x08}, + {MAX98390_FET_SCALING1, 0x00}, + {MAX98390_FET_SCALING2, 0x03}, + {MAX98390_FET_SCALING3, 0x00}, + {MAX98390_FET_SCALING4, 0x07}, + {MAX98390_SPK_SPEEDUP, 0x00}, + {DSMIG_WB_DRC_RELEASE_TIME_1, 0x00}, + {DSMIG_WB_DRC_RELEASE_TIME_2, 0x00}, + {DSMIG_WB_DRC_ATTACK_TIME_1, 0x00}, + {DSMIG_WB_DRC_ATTACK_TIME_2, 0x00}, + {DSMIG_WB_DRC_COMPRESSION_RATIO, 0x00}, + {DSMIG_WB_DRC_COMPRESSION_THRESHOLD, 0x00}, + {DSMIG_WB_DRC_MAKEUPGAIN, 0x00}, + {DSMIG_WB_DRC_NOISE_GATE_THRESHOLD, 0x00}, + {DSMIG_WBDRC_HPF_ENABLE, 0x00}, + {DSMIG_WB_DRC_TEST_SMOOTHER_OUT_EN, 0x00}, + {DSMIG_PPR_THRESHOLD, 0x00}, + {DSM_STEREO_BASS_CHANNEL_SELECT, 0x00}, + {DSM_TPROT_THRESHOLD_BYTE0, 0x00}, + {DSM_TPROT_THRESHOLD_BYTE1, 0x00}, + {DSM_TPROT_ROOM_TEMPERATURE_BYTE0, 0x00}, + {DSM_TPROT_ROOM_TEMPERATURE_BYTE1, 0x00}, + {DSM_TPROT_RECIP_RDC_ROOM_BYTE0, 0x00}, + {DSM_TPROT_RECIP_RDC_ROOM_BYTE1, 0x00}, + {DSM_TPROT_RECIP_RDC_ROOM_BYTE2, 0x00}, + {DSM_TPROT_RECIP_TCONST_BYTE0, 0x00}, + {DSM_TPROT_RECIP_TCONST_BYTE1, 0x00}, + {DSM_TPROT_RECIP_TCONST_BYTE2, 0x00}, + {DSM_THERMAL_ATTENUATION_SETTINGS, 0x00}, + {DSM_THERMAL_PILOT_TONE_ATTENUATION, 0x00}, + {DSM_TPROT_PG_TEMP_THRESH_BYTE0, 0x00}, + {DSM_TPROT_PG_TEMP_THRESH_BYTE1, 0x00}, + {DSMIG_DEBUZZER_THRESHOLD, 0x00}, + {DSMIG_DEBUZZER_ALPHA_COEF_TEST_ONLY, 0x08}, + {DSM_VOL_ENA, 0x20}, + {DSM_VOL_CTRL, 0xa0}, + {DSMIG_EN, 0x00}, + {MAX98390_R23E1_DSP_GLOBAL_EN, 0x00}, + {MAX98390_R23FF_GLOBAL_EN, 0x00}, +}; + +static int max98390_dsm_calibrate(struct snd_soc_component *component); + +static int max98390_dai_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) +{ + struct snd_soc_component *component = codec_dai->component; + struct max98390_priv *max98390 = + snd_soc_component_get_drvdata(component); + unsigned int mode; + unsigned int format; + unsigned int invert = 0; + + dev_dbg(component->dev, "%s: fmt 0x%08X\n", __func__, fmt); + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBS_CFS: + mode = MAX98390_PCM_MASTER_MODE_SLAVE; + break; + case SND_SOC_DAIFMT_CBM_CFM: + max98390->master = true; + mode = MAX98390_PCM_MASTER_MODE_MASTER; + break; + default: + dev_err(component->dev, "DAI clock mode unsupported\n"); + return -EINVAL; + } + + regmap_update_bits(max98390->regmap, + MAX98390_PCM_MASTER_MODE, + MAX98390_PCM_MASTER_MODE_MASK, + mode); + + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_IB_NF: + invert = MAX98390_PCM_MODE_CFG_PCM_BCLKEDGE; + break; + default: + dev_err(component->dev, "DAI invert mode unsupported\n"); + return -EINVAL; + } + + regmap_update_bits(max98390->regmap, + MAX98390_PCM_MODE_CFG, + MAX98390_PCM_MODE_CFG_PCM_BCLKEDGE, + invert); + + /* interface format */ + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + format = MAX98390_PCM_FORMAT_I2S; + break; + case SND_SOC_DAIFMT_LEFT_J: + format = MAX98390_PCM_FORMAT_LJ; + break; + case SND_SOC_DAIFMT_DSP_A: + format = MAX98390_PCM_FORMAT_TDM_MODE1; + break; + case SND_SOC_DAIFMT_DSP_B: + format = MAX98390_PCM_FORMAT_TDM_MODE0; + break; + default: + return -EINVAL; + } + + regmap_update_bits(max98390->regmap, + MAX98390_PCM_MODE_CFG, + MAX98390_PCM_MODE_CFG_FORMAT_MASK, + format << MAX98390_PCM_MODE_CFG_FORMAT_SHIFT); + + return 0; +} + +static int max98390_get_bclk_sel(int bclk) +{ + int i; + /* BCLKs per LRCLK */ + static int bclk_sel_table[] = { + 32, 48, 64, 96, 128, 192, 256, 320, 384, 512, + }; + /* match BCLKs per LRCLK */ + for (i = 0; i < ARRAY_SIZE(bclk_sel_table); i++) { + if (bclk_sel_table[i] == bclk) + return i + 2; + } + return 0; +} + +static int max98390_set_clock(struct snd_soc_component *component, + struct snd_pcm_hw_params *params) +{ + struct max98390_priv *max98390 = + snd_soc_component_get_drvdata(component); + /* codec MCLK rate in master mode */ + static int rate_table[] = { + 5644800, 6000000, 6144000, 6500000, + 9600000, 11289600, 12000000, 12288000, + 13000000, 19200000, + }; + /* BCLK/LRCLK ratio calculation */ + int blr_clk_ratio = params_channels(params) + * snd_pcm_format_width(params_format(params)); + int value; + + if (max98390->master) { + int i; + /* match rate to closest value */ + for (i = 0; i < ARRAY_SIZE(rate_table); i++) { + if (rate_table[i] >= max98390->sysclk) + break; + } + if (i == ARRAY_SIZE(rate_table)) { + dev_err(component->dev, "failed to find proper clock rate.\n"); + return -EINVAL; + } + + regmap_update_bits(max98390->regmap, + MAX98390_PCM_MASTER_MODE, + MAX98390_PCM_MASTER_MODE_MCLK_MASK, + i << MAX98390_PCM_MASTER_MODE_MCLK_RATE_SHIFT); + } + + if (!max98390->tdm_mode) { + /* BCLK configuration */ + value = max98390_get_bclk_sel(blr_clk_ratio); + if (!value) { + dev_err(component->dev, "format unsupported %d\n", + params_format(params)); + return -EINVAL; + } + + regmap_update_bits(max98390->regmap, + MAX98390_PCM_CLK_SETUP, + MAX98390_PCM_CLK_SETUP_BSEL_MASK, + value); + } + return 0; +} + +static int max98390_dai_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_component *component = + dai->component; + struct max98390_priv *max98390 = + snd_soc_component_get_drvdata(component); + + unsigned int sampling_rate; + unsigned int chan_sz; + + /* pcm mode configuration */ + switch (snd_pcm_format_width(params_format(params))) { + case 16: + chan_sz = MAX98390_PCM_MODE_CFG_CHANSZ_16; + break; + case 24: + chan_sz = MAX98390_PCM_MODE_CFG_CHANSZ_24; + break; + case 32: + chan_sz = MAX98390_PCM_MODE_CFG_CHANSZ_32; + break; + default: + dev_err(component->dev, "format unsupported %d\n", + params_format(params)); + goto err; + } + + regmap_update_bits(max98390->regmap, + MAX98390_PCM_MODE_CFG, + MAX98390_PCM_MODE_CFG_CHANSZ_MASK, chan_sz); + + dev_dbg(component->dev, "format supported %d", + params_format(params)); + + /* sampling rate configuration */ + switch (params_rate(params)) { + case 8000: + sampling_rate = MAX98390_PCM_SR_SET1_SR_8000; + break; + case 11025: + sampling_rate = MAX98390_PCM_SR_SET1_SR_11025; + break; + case 12000: + sampling_rate = MAX98390_PCM_SR_SET1_SR_12000; + break; + case 16000: + sampling_rate = MAX98390_PCM_SR_SET1_SR_16000; + break; + case 22050: + sampling_rate = MAX98390_PCM_SR_SET1_SR_22050; + break; + case 24000: + sampling_rate = MAX98390_PCM_SR_SET1_SR_24000; + break; + case 32000: + sampling_rate = MAX98390_PCM_SR_SET1_SR_32000; + break; + case 44100: + sampling_rate = MAX98390_PCM_SR_SET1_SR_44100; + break; + case 48000: + sampling_rate = MAX98390_PCM_SR_SET1_SR_48000; + break; + default: + dev_err(component->dev, "rate %d not supported\n", + params_rate(params)); + goto err; + } + + /* set DAI_SR to correct LRCLK frequency */ + regmap_update_bits(max98390->regmap, + MAX98390_PCM_SR_SETUP, + MAX98390_PCM_SR_SET1_SR_MASK, + sampling_rate); + + return max98390_set_clock(component, params); +err: + return -EINVAL; +} + +static int max98390_dai_tdm_slot(struct snd_soc_dai *dai, + unsigned int tx_mask, unsigned int rx_mask, + int slots, int slot_width) +{ + struct snd_soc_component *component = dai->component; + struct max98390_priv *max98390 = + snd_soc_component_get_drvdata(component); + + int bsel; + unsigned int chan_sz; + + if (!tx_mask && !rx_mask && !slots && !slot_width) + max98390->tdm_mode = false; + else + max98390->tdm_mode = true; + + dev_dbg(component->dev, + "Tdm mode : %d\n", max98390->tdm_mode); + + /* BCLK configuration */ + bsel = max98390_get_bclk_sel(slots * slot_width); + if (!bsel) { + dev_err(component->dev, "BCLK %d not supported\n", + slots * slot_width); + return -EINVAL; + } + + regmap_update_bits(max98390->regmap, + MAX98390_PCM_CLK_SETUP, + MAX98390_PCM_CLK_SETUP_BSEL_MASK, + bsel); + + /* Channel size configuration */ + switch (slot_width) { + case 16: + chan_sz = MAX98390_PCM_MODE_CFG_CHANSZ_16; + break; + case 24: + chan_sz = MAX98390_PCM_MODE_CFG_CHANSZ_24; + break; + case 32: + chan_sz = MAX98390_PCM_MODE_CFG_CHANSZ_32; + break; + default: + dev_err(component->dev, "format unsupported %d\n", + slot_width); + return -EINVAL; + } + + regmap_update_bits(max98390->regmap, + MAX98390_PCM_MODE_CFG, + MAX98390_PCM_MODE_CFG_CHANSZ_MASK, chan_sz); + + /* Rx slot configuration */ + regmap_write(max98390->regmap, + MAX98390_PCM_RX_EN_A, + rx_mask & 0xFF); + regmap_write(max98390->regmap, + MAX98390_PCM_RX_EN_B, + (rx_mask & 0xFF00) >> 8); + + /* Tx slot Hi-Z configuration */ + regmap_write(max98390->regmap, + MAX98390_PCM_TX_HIZ_CTRL_A, + ~tx_mask & 0xFF); + regmap_write(max98390->regmap, + MAX98390_PCM_TX_HIZ_CTRL_B, + (~tx_mask & 0xFF00) >> 8); + + return 0; +} + +static int max98390_dai_set_sysclk(struct snd_soc_dai *dai, + int clk_id, unsigned int freq, int dir) +{ + struct snd_soc_component *component = dai->component; + struct max98390_priv *max98390 = + snd_soc_component_get_drvdata(component); + + max98390->sysclk = freq; + return 0; +} + +static const struct snd_soc_dai_ops max98390_dai_ops = { + .set_sysclk = max98390_dai_set_sysclk, + .set_fmt = max98390_dai_set_fmt, + .hw_params = max98390_dai_hw_params, + .set_tdm_slot = max98390_dai_tdm_slot, +}; + +static int max98390_dac_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *component = + snd_soc_dapm_to_component(w->dapm); + struct max98390_priv *max98390 = + snd_soc_component_get_drvdata(component); + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + regmap_update_bits(max98390->regmap, + MAX98390_R203A_AMP_EN, + MAX98390_AMP_EN_MASK, 1); + regmap_update_bits(max98390->regmap, + MAX98390_R23FF_GLOBAL_EN, + MAX98390_GLOBAL_EN_MASK, 1); + break; + case SND_SOC_DAPM_POST_PMD: + regmap_update_bits(max98390->regmap, + MAX98390_R23FF_GLOBAL_EN, + MAX98390_GLOBAL_EN_MASK, 0); + regmap_update_bits(max98390->regmap, + MAX98390_R203A_AMP_EN, + MAX98390_AMP_EN_MASK, 0); + break; + } + return 0; +} + +static const char * const max98390_switch_text[] = { + "Left", "Right", "LeftRight"}; + +static const char * const max98390_boost_voltage_text[] = { + "6.5V", "6.625V", "6.75V", "6.875V", "7V", "7.125V", "7.25V", "7.375V", + "7.5V", "7.625V", "7.75V", "7.875V", "8V", "8.125V", "8.25V", "8.375V", + "8.5V", "8.625V", "8.75V", "8.875V", "9V", "9.125V", "9.25V", "9.375V", + "9.5V", "9.625V", "9.75V", "9.875V", "10V" +}; + +static SOC_ENUM_SINGLE_DECL(max98390_boost_voltage, + MAX98390_BOOST_CTRL0, 0, + max98390_boost_voltage_text); + +static DECLARE_TLV_DB_SCALE(max98390_spk_tlv, 300, 300, 0); +static DECLARE_TLV_DB_SCALE(max98390_digital_tlv, -8000, 50, 0); + +static const char * const max98390_current_limit_text[] = { + "0.00A", "0.50A", "1.00A", "1.05A", "1.10A", "1.15A", "1.20A", "1.25A", + "1.30A", "1.35A", "1.40A", "1.45A", "1.50A", "1.55A", "1.60A", "1.65A", + "1.70A", "1.75A", "1.80A", "1.85A", "1.90A", "1.95A", "2.00A", "2.05A", + "2.10A", "2.15A", "2.20A", "2.25A", "2.30A", "2.35A", "2.40A", "2.45A", + "2.50A", "2.55A", "2.60A", "2.65A", "2.70A", "2.75A", "2.80A", "2.85A", + "2.90A", "2.95A", "3.00A", "3.05A", "3.10A", "3.15A", "3.20A", "3.25A", + "3.30A", "3.35A", "3.40A", "3.45A", "3.50A", "3.55A", "3.60A", "3.65A", + "3.70A", "3.75A", "3.80A", "3.85A", "3.90A", "3.95A", "4.00A", "4.05A", + "4.10A" +}; + +static SOC_ENUM_SINGLE_DECL(max98390_current_limit, + MAX98390_BOOST_CTRL1, 0, + max98390_current_limit_text); + +static int max98390_ref_rdc_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct max98390_priv *max98390 = + snd_soc_component_get_drvdata(component); + + max98390->ref_rdc_value = ucontrol->value.integer.value[0]; + + regmap_write(max98390->regmap, DSM_TPROT_RECIP_RDC_ROOM_BYTE0, + max98390->ref_rdc_value & 0x000000ff); + regmap_write(max98390->regmap, DSM_TPROT_RECIP_RDC_ROOM_BYTE1, + (max98390->ref_rdc_value >> 8) & 0x000000ff); + regmap_write(max98390->regmap, DSM_TPROT_RECIP_RDC_ROOM_BYTE2, + (max98390->ref_rdc_value >> 16) & 0x000000ff); + + return 0; +} + +static int max98390_ref_rdc_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct max98390_priv *max98390 = + snd_soc_component_get_drvdata(component); + + ucontrol->value.integer.value[0] = max98390->ref_rdc_value; + + return 0; +} + +static int max98390_ambient_temp_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct max98390_priv *max98390 = + snd_soc_component_get_drvdata(component); + + max98390->ambient_temp_value = ucontrol->value.integer.value[0]; + + regmap_write(max98390->regmap, DSM_TPROT_ROOM_TEMPERATURE_BYTE1, + (max98390->ambient_temp_value >> 8) & 0x000000ff); + regmap_write(max98390->regmap, DSM_TPROT_ROOM_TEMPERATURE_BYTE0, + (max98390->ambient_temp_value) & 0x000000ff); + + return 0; +} + +static int max98390_ambient_temp_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct max98390_priv *max98390 = + snd_soc_component_get_drvdata(component); + + ucontrol->value.integer.value[0] = max98390->ambient_temp_value; + + return 0; +} + +static int max98390_adaptive_rdc_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + + dev_warn(component->dev, "Put adaptive rdc not supported\n"); + + return 0; +} + +static int max98390_adaptive_rdc_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int rdc, rdc0; + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct max98390_priv *max98390 = + snd_soc_component_get_drvdata(component); + + regmap_read(max98390->regmap, THERMAL_RDC_RD_BACK_BYTE1, &rdc); + regmap_read(max98390->regmap, THERMAL_RDC_RD_BACK_BYTE0, &rdc0); + ucontrol->value.integer.value[0] = rdc0 | rdc << 8; + + return 0; +} + +static int max98390_dsm_calib_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + /* Do nothing */ + return 0; +} + +static int max98390_dsm_calib_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + + max98390_dsm_calibrate(component); + + return 0; +} + +static const struct snd_kcontrol_new max98390_snd_controls[] = { + SOC_SINGLE_TLV("Digital Volume", DSM_VOL_CTRL, + 0, 184, 0, + max98390_digital_tlv), + SOC_SINGLE_TLV("Speaker Volume", MAX98390_R203D_SPK_GAIN, + 0, 6, 0, + max98390_spk_tlv), + SOC_SINGLE("Ramp Up Bypass Switch", MAX98390_R2039_AMP_DSP_CFG, + MAX98390_AMP_DSP_CFG_RMP_UP_SHIFT, 1, 0), + SOC_SINGLE("Ramp Down Bypass Switch", MAX98390_R2039_AMP_DSP_CFG, + MAX98390_AMP_DSP_CFG_RMP_DN_SHIFT, 1, 0), + SOC_SINGLE("Boost Clock Phase", MAX98390_BOOST_CTRL3, + MAX98390_BOOST_CLK_PHASE_CFG_SHIFT, 3, 0), + SOC_ENUM("Boost Output Voltage", max98390_boost_voltage), + SOC_ENUM("Current Limit", max98390_current_limit), + SOC_SINGLE_EXT("DSM Rdc", SND_SOC_NOPM, 0, 0xffffff, 0, + max98390_ref_rdc_get, max98390_ref_rdc_put), + SOC_SINGLE_EXT("DSM Ambient Temp", SND_SOC_NOPM, 0, 0xffff, 0, + max98390_ambient_temp_get, max98390_ambient_temp_put), + SOC_SINGLE_EXT("DSM Adaptive Rdc", SND_SOC_NOPM, 0, 0xffff, 0, + max98390_adaptive_rdc_get, max98390_adaptive_rdc_put), + SOC_SINGLE_EXT("DSM Calibration", SND_SOC_NOPM, 0, 1, 0, + max98390_dsm_calib_get, max98390_dsm_calib_put), +}; + +static const struct soc_enum dai_sel_enum = + SOC_ENUM_SINGLE(MAX98390_PCM_CH_SRC_1, + MAX98390_PCM_RX_CH_SRC_SHIFT, + 3, max98390_switch_text); + +static const struct snd_kcontrol_new max98390_dai_controls = + SOC_DAPM_ENUM("DAI Sel", dai_sel_enum); + +static const struct snd_soc_dapm_widget max98390_dapm_widgets[] = { + SND_SOC_DAPM_DAC_E("Amp Enable", "HiFi Playback", + MAX98390_R203A_AMP_EN, 0, 0, max98390_dac_event, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), + SND_SOC_DAPM_MUX("DAI Sel Mux", SND_SOC_NOPM, 0, 0, + &max98390_dai_controls), + SND_SOC_DAPM_OUTPUT("BE_OUT"), +}; + +static const struct snd_soc_dapm_route max98390_audio_map[] = { + /* Plabyack */ + {"DAI Sel Mux", "Left", "Amp Enable"}, + {"DAI Sel Mux", "Right", "Amp Enable"}, + {"DAI Sel Mux", "LeftRight", "Amp Enable"}, + {"BE_OUT", NULL, "DAI Sel Mux"}, +}; + +static bool max98390_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case MAX98390_SOFTWARE_RESET ... MAX98390_INT_EN3: + case MAX98390_IRQ_CTRL ... MAX98390_WDOG_CTRL: + case MAX98390_MEAS_ADC_THERM_WARN_THRESH + ... MAX98390_BROWNOUT_INFINITE_HOLD: + case MAX98390_BROWNOUT_LVL_HOLD ... THERMAL_COILTEMP_RD_BACK_BYTE0: + case DSMIG_DEBUZZER_THRESHOLD ... MAX98390_R24FF_REV_ID: + return true; + default: + return false; + } +}; + +static bool max98390_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case MAX98390_SOFTWARE_RESET ... MAX98390_INT_EN3: + case MAX98390_MEAS_ADC_CH0_READ ... MAX98390_MEAS_ADC_CH2_READ: + case MAX98390_PWR_GATE_STATUS ... MAX98390_BROWNOUT_STATUS: + case MAX98390_BROWNOUT_LOWEST_STATUS: + case MAX98390_ENV_TRACK_BOOST_VOUT_READ: + case DSM_STBASS_HPF_B0_BYTE0 ... DSM_DEBUZZER_ATTACK_TIME_BYTE2: + case THERMAL_RDC_RD_BACK_BYTE1 ... THERMAL_COILTEMP_RD_BACK_BYTE0: + case DSM_THERMAL_GAIN ... DSM_WBDRC_GAIN: + return true; + default: + return false; + } +} + +#define MAX98390_RATES SNDRV_PCM_RATE_8000_48000 + +#define MAX98390_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) + +static struct snd_soc_dai_driver max98390_dai[] = { + { + .name = "max98390-aif1", + .playback = { + .stream_name = "HiFi Playback", + .channels_min = 1, + .channels_max = 2, + .rates = MAX98390_RATES, + .formats = MAX98390_FORMATS, + }, + .capture = { + .stream_name = "HiFi Capture", + .channels_min = 1, + .channels_max = 2, + .rates = MAX98390_RATES, + .formats = MAX98390_FORMATS, + }, + .ops = &max98390_dai_ops, + } +}; + +static int max98390_dsm_init(struct snd_soc_component *component) +{ + int ret; + char filename[128]; + const char *vendor, *product; + struct max98390_priv *max98390 = + snd_soc_component_get_drvdata(component); + const struct firmware *fw; + char *dsm_param; + + vendor = dmi_get_system_info(DMI_SYS_VENDOR); + product = dmi_get_system_info(DMI_PRODUCT_NAME); + + if (vendor && product) { + snprintf(filename, sizeof(filename), "dsm_param_%s_%s.bin", + vendor, product); + } else { + sprintf(filename, "dsm_param.bin"); + } + ret = request_firmware(&fw, filename, component->dev); + if (ret) { + ret = request_firmware(&fw, "dsm_param.bin", component->dev); + if (ret) + goto err; + } + + dev_dbg(component->dev, + "max98390: param fw size %ld\n", + fw->size); + dsm_param = (char *)fw->data; + dsm_param += MAX98390_DSM_PAYLOAD_OFFSET; + regmap_bulk_write(max98390->regmap, DSM_EQ_BQ1_B0_BYTE0, + dsm_param, + fw->size - MAX98390_DSM_PAYLOAD_OFFSET); + release_firmware(fw); + regmap_write(max98390->regmap, MAX98390_R23E1_DSP_GLOBAL_EN, 0x01); + +err: + return ret; +} + +static int max98390_dsm_calibrate(struct snd_soc_component *component) +{ + unsigned int rdc, rdc_cal_result, temp; + unsigned int rdc_integer, rdc_factor; + struct max98390_priv *max98390 = + snd_soc_component_get_drvdata(component); + + regmap_write(max98390->regmap, MAX98390_R203A_AMP_EN, 0x81); + regmap_write(max98390->regmap, MAX98390_R23FF_GLOBAL_EN, 0x01); + + regmap_read(max98390->regmap, + THERMAL_RDC_RD_BACK_BYTE1, &rdc); + regmap_read(max98390->regmap, + THERMAL_RDC_RD_BACK_BYTE0, &rdc_cal_result); + rdc_cal_result |= (rdc << 8) & 0x0000FFFF; + if (rdc_cal_result) + max98390->ref_rdc_value = 268435456U / rdc_cal_result; + + regmap_read(max98390->regmap, MAX98390_MEAS_ADC_CH2_READ, &temp); + max98390->ambient_temp_value = temp * 52 - 1188; + + rdc_integer = rdc_cal_result * 937 / 65536; + rdc_factor = ((rdc_cal_result * 937 * 100) / 65536) + - (rdc_integer * 100); + + dev_info(component->dev, "rdc resistance about %d.%02d ohm, reg=0x%X temp reg=0x%X\n", + rdc_integer, rdc_factor, rdc_cal_result, temp); + + regmap_write(max98390->regmap, MAX98390_R23FF_GLOBAL_EN, 0x00); + regmap_write(max98390->regmap, MAX98390_R203A_AMP_EN, 0x80); + + return 0; +} + +static int max98390_probe(struct snd_soc_component *component) +{ + struct max98390_priv *max98390 = + snd_soc_component_get_drvdata(component); + + regmap_write(max98390->regmap, MAX98390_SOFTWARE_RESET, 0x01); + /* Sleep reset settle time */ + msleep(20); + /* Update dsm bin param */ + max98390_dsm_init(component); + + /* Amp Setting */ + regmap_write(max98390->regmap, MAX98390_CLK_MON, 0x6f); + regmap_write(max98390->regmap, MAX98390_PCM_RX_EN_A, 0x03); + regmap_write(max98390->regmap, MAX98390_PWR_GATE_CTL, 0x2d); + regmap_write(max98390->regmap, MAX98390_ENV_TRACK_VOUT_HEADROOM, 0x0e); + regmap_write(max98390->regmap, MAX98390_BOOST_BYPASS1, 0x46); + regmap_write(max98390->regmap, MAX98390_FET_SCALING3, 0x03); + + /* Dsm Setting */ + regmap_write(max98390->regmap, DSM_VOL_CTRL, 0x94); + regmap_write(max98390->regmap, DSMIG_EN, 0x19); + regmap_write(max98390->regmap, MAX98390_R203A_AMP_EN, 0x80); + if (max98390->ref_rdc_value) { + regmap_write(max98390->regmap, DSM_TPROT_RECIP_RDC_ROOM_BYTE0, + max98390->ref_rdc_value & 0x000000ff); + regmap_write(max98390->regmap, DSM_TPROT_RECIP_RDC_ROOM_BYTE1, + (max98390->ref_rdc_value >> 8) & 0x000000ff); + regmap_write(max98390->regmap, DSM_TPROT_RECIP_RDC_ROOM_BYTE2, + (max98390->ref_rdc_value >> 16) & 0x000000ff); + } + if (max98390->ambient_temp_value) { + regmap_write(max98390->regmap, DSM_TPROT_ROOM_TEMPERATURE_BYTE1, + (max98390->ambient_temp_value >> 8) & 0x000000ff); + regmap_write(max98390->regmap, DSM_TPROT_ROOM_TEMPERATURE_BYTE0, + (max98390->ambient_temp_value) & 0x000000ff); + } + + return 0; +} + +#ifdef CONFIG_PM_SLEEP +static int max98390_suspend(struct device *dev) +{ + struct max98390_priv *max98390 = dev_get_drvdata(dev); + + dev_dbg(dev, "%s:Enter\n", __func__); + + regcache_cache_only(max98390->regmap, true); + regcache_mark_dirty(max98390->regmap); + + return 0; +} + +static int max98390_resume(struct device *dev) +{ + struct max98390_priv *max98390 = dev_get_drvdata(dev); + + dev_dbg(dev, "%s:Enter\n", __func__); + + regcache_cache_only(max98390->regmap, false); + regcache_sync(max98390->regmap); + + return 0; +} +#endif + +static const struct dev_pm_ops max98390_pm = { + SET_SYSTEM_SLEEP_PM_OPS(max98390_suspend, max98390_resume) +}; + +static const struct snd_soc_component_driver soc_codec_dev_max98390 = { + .probe = max98390_probe, + .controls = max98390_snd_controls, + .num_controls = ARRAY_SIZE(max98390_snd_controls), + .dapm_widgets = max98390_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(max98390_dapm_widgets), + .dapm_routes = max98390_audio_map, + .num_dapm_routes = ARRAY_SIZE(max98390_audio_map), + .idle_bias_on = 1, + .use_pmdown_time = 1, + .endianness = 1, + .non_legacy_dai_naming = 1, +}; + +static const struct regmap_config max98390_regmap = { + .reg_bits = 16, + .val_bits = 8, + .max_register = MAX98390_R24FF_REV_ID, + .reg_defaults = max98390_reg_defaults, + .num_reg_defaults = ARRAY_SIZE(max98390_reg_defaults), + .readable_reg = max98390_readable_register, + .volatile_reg = max98390_volatile_reg, + .cache_type = REGCACHE_RBTREE, +}; + +#ifdef CONFIG_OF +static const struct of_device_id max98390_dt_ids[] = { + { .compatible = "maxim,max98390", }, + { } +}; +MODULE_DEVICE_TABLE(of, max98390_dt_ids); +#endif + +static int max98390_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + int ret = 0; + int reg = 0; + + struct max98390_priv *max98390 = NULL; + struct i2c_adapter *adapter = to_i2c_adapter(i2c->dev.parent); + + ret = i2c_check_functionality(adapter, + I2C_FUNC_SMBUS_BYTE + | I2C_FUNC_SMBUS_BYTE_DATA); + if (!ret) { + dev_err(&i2c->dev, "I2C check functionality failed\n"); + return -ENXIO; + } + + max98390 = devm_kzalloc(&i2c->dev, sizeof(*max98390), GFP_KERNEL); + if (!max98390) { + ret = -ENOMEM; + return ret; + } + i2c_set_clientdata(i2c, max98390); + + ret = device_property_read_u32(&i2c->dev, "maxim,temperature_calib", + &max98390->ambient_temp_value); + if (ret) { + dev_info(&i2c->dev, + "no optional property 'temperature_calib' found, default:\n"); + } + ret = device_property_read_u32(&i2c->dev, "maxim,r0_calib", + &max98390->ref_rdc_value); + if (ret) { + dev_info(&i2c->dev, + "no optional property 'r0_calib' found, default:\n"); + } + + dev_info(&i2c->dev, + "%s: r0_calib: 0x%x,temperature_calib: 0x%x", + __func__, max98390->ref_rdc_value, + max98390->ambient_temp_value); + + /* regmap initialization */ + max98390->regmap = devm_regmap_init_i2c(i2c, &max98390_regmap); + if (IS_ERR(max98390->regmap)) { + ret = PTR_ERR(max98390->regmap); + dev_err(&i2c->dev, + "Failed to allocate regmap: %d\n", ret); + return ret; + } + + /* Check Revision ID */ + ret = regmap_read(max98390->regmap, + MAX98390_R24FF_REV_ID, ®); + if (ret) { + dev_err(&i2c->dev, + "ret=%d, Failed to read: 0x%02X\n", + ret, MAX98390_R24FF_REV_ID); + return ret; + } + dev_info(&i2c->dev, "MAX98390 revisionID: 0x%02X\n", reg); + + ret = devm_snd_soc_register_component(&i2c->dev, + &soc_codec_dev_max98390, + max98390_dai, ARRAY_SIZE(max98390_dai)); + + return ret; +} + +static const struct i2c_device_id max98390_i2c_id[] = { + { "max98390", 0}, + {}, +}; + +MODULE_DEVICE_TABLE(i2c, max98390_i2c_id); + +#if defined(CONFIG_OF) +static const struct of_device_id max98390_of_match[] = { + { .compatible = "maxim,max98390", }, + {} +}; +MODULE_DEVICE_TABLE(of, max98390_of_match); +#endif + +#ifdef CONFIG_ACPI +static const struct acpi_device_id max98390_acpi_match[] = { + { "MX98390", 0 }, + {}, +}; +MODULE_DEVICE_TABLE(acpi, max98390_acpi_match); +#endif + +static struct i2c_driver max98390_i2c_driver = { + .driver = { + .name = "max98390", + .of_match_table = of_match_ptr(max98390_of_match), + .acpi_match_table = ACPI_PTR(max98390_acpi_match), + .pm = &max98390_pm, + }, + .probe = max98390_i2c_probe, + .id_table = max98390_i2c_id, +}; + +module_i2c_driver(max98390_i2c_driver) + +MODULE_DESCRIPTION("ALSA SoC MAX98390 driver"); +MODULE_AUTHOR("Steve Lee <steves.lee@maximintegrated.com>"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/max98390.h b/sound/soc/codecs/max98390.h new file mode 100644 index 000000000000..f59cb114d957 --- /dev/null +++ b/sound/soc/codecs/max98390.h @@ -0,0 +1,663 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2020, Maxim Integrated. + */ + +#ifndef _MAX98390_H +#define _MAX98390_H + +/* MAX98390 Register Address */ +#define MAX98390_SOFTWARE_RESET 0x2000 +#define MAX98390_INT_RAW1 0x2002 +#define MAX98390_INT_RAW2 0x2003 +#define MAX98390_INT_RAW3 0x2004 +#define MAX98390_INT_STATE1 0x2005 +#define MAX98390_INT_STATE2 0x2006 +#define MAX98390_INT_STATE3 0x2007 +#define MAX98390_INT_FLAG1 0x2008 +#define MAX98390_INT_FLAG2 0x2009 +#define MAX98390_INT_FLAG3 0x200a +#define MAX98390_INT_EN1 0x200b +#define MAX98390_INT_EN2 0x200c +#define MAX98390_INT_EN3 0x200d +#define MAX98390_INT_FLAG_CLR1 0x200e +#define MAX98390_INT_FLAG_CLR2 0x200f +#define MAX98390_INT_FLAG_CLR3 0x2010 +#define MAX98390_IRQ_CTRL 0x2011 +#define MAX98390_CLK_MON 0x2012 +#define MAX98390_DAT_MON 0x2014 +#define MAX98390_WDOG_CTRL 0x2015 +#define MAX98390_WDOG_RST 0x2016 +#define MAX98390_MEAS_ADC_THERM_WARN_THRESH 0x2017 +#define MAX98390_MEAS_ADC_THERM_SHDN_THRESH 0x2018 +#define MAX98390_MEAS_ADC_THERM_HYSTERESIS 0x2019 +#define MAX98390_PIN_CFG 0x201a +#define MAX98390_PCM_RX_EN_A 0x201b +#define MAX98390_PCM_RX_EN_B 0x201c +#define MAX98390_PCM_TX_EN_A 0x201d +#define MAX98390_PCM_TX_EN_B 0x201e +#define MAX98390_PCM_TX_HIZ_CTRL_A 0x201f +#define MAX98390_PCM_TX_HIZ_CTRL_B 0x2020 +#define MAX98390_PCM_CH_SRC_1 0x2021 +#define MAX98390_PCM_CH_SRC_2 0x2022 +#define MAX98390_PCM_CH_SRC_3 0x2023 +#define MAX98390_PCM_MODE_CFG 0x2024 +#define MAX98390_PCM_MASTER_MODE 0x2025 +#define MAX98390_PCM_CLK_SETUP 0x2026 +#define MAX98390_PCM_SR_SETUP 0x2027 +#define MAX98390_ICC_RX_EN_A 0x202c +#define MAX98390_ICC_RX_EN_B 0x202d +#define MAX98390_ICC_TX_EN_A 0x202e +#define MAX98390_ICC_TX_EN_B 0x202f +#define MAX98390_ICC_HIZ_MANUAL_MODE 0x2030 +#define MAX98390_ICC_TX_HIZ_EN_A 0x2031 +#define MAX98390_ICC_TX_HIZ_EN_B 0x2032 +#define MAX98390_ICC_LNK_EN 0x2033 +#define MAX98390_R2039_AMP_DSP_CFG 0x2039 +#define MAX98390_R203A_AMP_EN 0x203a +#define MAX98390_TONE_GEN_DC_CFG 0x203b +#define MAX98390_SPK_SRC_SEL 0x203c +#define MAX98390_R203D_SPK_GAIN 0x203d +#define MAX98390_SSM_CFG 0x203e +#define MAX98390_MEAS_EN 0x203f +#define MAX98390_MEAS_DSP_CFG 0x2040 +#define MAX98390_BOOST_CTRL0 0x2041 +#define MAX98390_BOOST_CTRL3 0x2042 +#define MAX98390_BOOST_CTRL1 0x2043 +#define MAX98390_MEAS_ADC_CFG 0x2044 +#define MAX98390_MEAS_ADC_BASE_MSB 0x2045 +#define MAX98390_MEAS_ADC_BASE_LSB 0x2046 +#define MAX98390_ADC_CH0_DIVIDE 0x2047 +#define MAX98390_ADC_CH1_DIVIDE 0x2048 +#define MAX98390_ADC_CH2_DIVIDE 0x2049 +#define MAX98390_ADC_CH0_FILT_CFG 0x204a +#define MAX98390_ADC_CH1_FILT_CFG 0x204b +#define MAX98390_ADC_CH2_FILT_CFG 0x204c +#define MAX98390_MEAS_ADC_CH0_READ 0x204d +#define MAX98390_MEAS_ADC_CH1_READ 0x204e +#define MAX98390_MEAS_ADC_CH2_READ 0x204f +#define MAX98390_PWR_GATE_CTL 0x2050 +#define MAX98390_PWR_GATE_STATUS 0x2051 +#define MAX98390_VBAT_LOW_STATUS 0x2052 +#define MAX98390_PVDD_LOW_STATUS 0x2053 +#define MAX98390_BROWNOUT_STATUS 0x2054 +#define MAX98390_BROWNOUT_EN 0x2055 +#define MAX98390_BROWNOUT_INFINITE_HOLD 0x2056 +#define MAX98390_BROWNOUT_INFINITE_HOLD_CLR 0x2057 +#define MAX98390_BROWNOUT_LVL_HOLD 0x2058 +#define MAX98390_BROWNOUT_LVL1_THRESH 0x2059 +#define MAX98390_BROWNOUT_LVL2_THRESH 0x205a +#define MAX98390_BROWNOUT_LVL3_THRESH 0x205b +#define MAX98390_BROWNOUT_LVL4_THRESH 0x205c +#define MAX98390_BROWNOUT_THRESH_HYSTERYSIS 0x205d +#define MAX98390_BROWNOUT_AMP_LIMITER_ATK_REL 0x205e +#define MAX98390_BROWNOUT_AMP_GAIN_ATK_REL 0x205f +#define MAX98390_BROWNOUT_AMP1_CLIP_MODE 0x2060 +#define MAX98390_BROWNOUT_LVL1_CUR_LIMIT 0x2061 +#define MAX98390_BROWNOUT_LVL1_AMP1_CTRL1 0x2062 +#define MAX98390_BROWNOUT_LVL1_AMP1_CTRL2 0x2063 +#define MAX98390_BROWNOUT_LVL1_AMP1_CTRL3 0x2064 +#define MAX98390_BROWNOUT_LVL2_CUR_LIMIT 0x2065 +#define MAX98390_BROWNOUT_LVL2_AMP1_CTRL1 0x2066 +#define MAX98390_BROWNOUT_LVL2_AMP1_CTRL2 0x2067 +#define MAX98390_BROWNOUT_LVL2_AMP1_CTRL3 0x2068 +#define MAX98390_BROWNOUT_LVL3_CUR_LIMIT 0x2069 +#define MAX98390_BROWNOUT_LVL3_AMP1_CTRL1 0x206a +#define MAX98390_BROWNOUT_LVL3_AMP1_CTRL2 0x206b +#define MAX98390_BROWNOUT_LVL3_AMP1_CTRL3 0x206c +#define MAX98390_BROWNOUT_LVL4_CUR_LIMIT 0x206d +#define MAX98390_BROWNOUT_LVL4_AMP1_CTRL1 0x206e +#define MAX98390_BROWNOUT_LVL4_AMP1_CTRL2 0x206f +#define MAX98390_BROWNOUT_LVL4_AMP1_CTRL3 0x2070 +#define MAX98390_BROWNOUT_LOWEST_STATUS 0x2071 +#define MAX98390_BROWNOUT_ILIM_HLD 0x2072 +#define MAX98390_BROWNOUT_LIM_HLD 0x2073 +#define MAX98390_BROWNOUT_CLIP_HLD 0x2074 +#define MAX98390_BROWNOUT_GAIN_HLD 0x2075 +#define MAX98390_ENV_TRACK_VOUT_HEADROOM 0x2076 +#define MAX98390_ENV_TRACK_BOOST_VOUT_DELAY 0x2077 +#define MAX98390_ENV_TRACK_REL_RATE 0x2078 +#define MAX98390_ENV_TRACK_HOLD_RATE 0x2079 +#define MAX98390_ENV_TRACK_CTRL 0x207a +#define MAX98390_ENV_TRACK_BOOST_VOUT_READ 0x207b +#define MAX98390_BOOST_BYPASS1 0x207c +#define MAX98390_BOOST_BYPASS2 0x207d +#define MAX98390_BOOST_BYPASS3 0x207e +#define MAX98390_FET_SCALING1 0x207f +#define MAX98390_FET_SCALING2 0x2080 +#define MAX98390_FET_SCALING3 0x2081 +#define MAX98390_FET_SCALING4 0x2082 +#define MAX98390_SPK_SPEEDUP 0x2084 + +#define DSM_STBASS_HPF_B0_BYTE0 0x2101 +#define DSM_STBASS_HPF_B0_BYTE1 0x2102 +#define DSM_STBASS_HPF_B0_BYTE2 0x2103 +#define DSM_STBASS_HPF_B1_BYTE0 0x2105 +#define DSM_STBASS_HPF_B1_BYTE1 0x2106 +#define DSM_STBASS_HPF_B1_BYTE2 0x2107 +#define DSM_STBASS_HPF_B2_BYTE0 0x2109 +#define DSM_STBASS_HPF_B2_BYTE1 0x210a +#define DSM_STBASS_HPF_B2_BYTE2 0x210b +#define DSM_STBASS_HPF_A1_BYTE0 0x210d +#define DSM_STBASS_HPF_A1_BYTE1 0x210e +#define DSM_STBASS_HPF_A1_BYTE2 0x210f +#define DSM_STBASS_HPF_A2_BYTE0 0x2111 +#define DSM_STBASS_HPF_A2_BYTE1 0x2112 +#define DSM_STBASS_HPF_A2_BYTE2 0x2113 +#define DSM_STBASS_LPF_B0_BYTE0 0x2115 +#define DSM_STBASS_LPF_B0_BYTE1 0x2116 +#define DSM_STBASS_LPF_B0_BYTE2 0x2117 +#define DSM_STBASS_LPF_B1_BYTE0 0x2119 +#define DSM_STBASS_LPF_B1_BYTE1 0x211a +#define DSM_STBASS_LPF_B1_BYTE2 0x211b +#define DSM_STBASS_LPF_B2_BYTE0 0x211d +#define DSM_STBASS_LPF_B2_BYTE1 0x211e +#define DSM_STBASS_LPF_B2_BYTE2 0x211f +#define DSM_STBASS_LPF_A1_BYTE0 0x2121 +#define DSM_STBASS_LPF_A1_BYTE1 0x2122 +#define DSM_STBASS_LPF_A1_BYTE2 0x2123 +#define DSM_STBASS_LPF_A2_BYTE0 0x2125 +#define DSM_STBASS_LPF_A2_BYTE1 0x2126 +#define DSM_STBASS_LPF_A2_BYTE2 0x2127 +#define DSM_EQ_BQ1_B0_BYTE0 0x2129 +#define DSM_EQ_BQ1_B0_BYTE1 0x212a +#define DSM_EQ_BQ1_B0_BYTE2 0x212b +#define DSM_EQ_BQ1_B1_BYTE0 0x212d +#define DSM_EQ_BQ1_B1_BYTE1 0x212e +#define DSM_EQ_BQ1_B1_BYTE2 0x212f +#define DSM_EQ_BQ1_B2_BYTE0 0x2131 +#define DSM_EQ_BQ1_B2_BYTE1 0x2132 +#define DSM_EQ_BQ1_B2_BYTE2 0x2133 +#define DSM_EQ_BQ1_A1_BYTE0 0x2135 +#define DSM_EQ_BQ1_A1_BYTE1 0x2136 +#define DSM_EQ_BQ1_A1_BYTE2 0x2137 +#define DSM_EQ_BQ1_A2_BYTE0 0x2139 +#define DSM_EQ_BQ1_A2_BYTE1 0x213a +#define DSM_EQ_BQ1_A2_BYTE2 0x213b +#define DSM_EQ_BQ2_B0_BYTE0 0x213d +#define DSM_EQ_BQ2_B0_BYTE1 0x213e +#define DSM_EQ_BQ2_B0_BYTE2 0x213f +#define DSM_EQ_BQ2_B1_BYTE0 0x2141 +#define DSM_EQ_BQ2_B1_BYTE1 0x2142 +#define DSM_EQ_BQ2_B1_BYTE2 0x2143 +#define DSM_EQ_BQ2_B2_BYTE0 0x2145 +#define DSM_EQ_BQ2_B2_BYTE1 0x2146 +#define DSM_EQ_BQ2_B2_BYTE2 0x2147 +#define DSM_EQ_BQ2_A1_BYTE0 0x2149 +#define DSM_EQ_BQ2_A1_BYTE1 0x214a +#define DSM_EQ_BQ2_A1_BYTE2 0x214b +#define DSM_EQ_BQ2_A2_BYTE0 0x214d +#define DSM_EQ_BQ2_A2_BYTE1 0x214e +#define DSM_EQ_BQ2_A2_BYTE2 0x214f +#define DSM_EQ_BQ3_B0_BYTE0 0x2151 +#define DSM_EQ_BQ3_B0_BYTE1 0x2152 +#define DSM_EQ_BQ3_B0_BYTE2 0x2153 +#define DSM_EQ_BQ3_B1_BYTE0 0x2155 +#define DSM_EQ_BQ3_B1_BYTE1 0x2156 +#define DSM_EQ_BQ3_B1_BYTE2 0x2157 +#define DSM_EQ_BQ3_B2_BYTE0 0x2159 +#define DSM_EQ_BQ3_B2_BYTE1 0x215a +#define DSM_EQ_BQ3_B2_BYTE2 0x215b +#define DSM_EQ_BQ3_A1_BYTE0 0x215d +#define DSM_EQ_BQ3_A1_BYTE1 0x215e +#define DSM_EQ_BQ3_A1_BYTE2 0x215f +#define DSM_EQ_BQ3_A2_BYTE0 0x2161 +#define DSM_EQ_BQ3_A2_BYTE1 0x2162 +#define DSM_EQ_BQ3_A2_BYTE2 0x2163 +#define DSM_EQ_BQ4_B0_BYTE0 0x2165 +#define DSM_EQ_BQ4_B0_BYTE1 0x2166 +#define DSM_EQ_BQ4_B0_BYTE2 0x2167 +#define DSM_EQ_BQ4_B1_BYTE0 0x2169 +#define DSM_EQ_BQ4_B1_BYTE1 0x216a +#define DSM_EQ_BQ4_B1_BYTE2 0x216b +#define DSM_EQ_BQ4_B2_BYTE0 0x216d +#define DSM_EQ_BQ4_B2_BYTE1 0x216e +#define DSM_EQ_BQ4_B2_BYTE2 0x216f +#define DSM_EQ_BQ4_A1_BYTE0 0x2171 +#define DSM_EQ_BQ4_A1_BYTE1 0x2172 +#define DSM_EQ_BQ4_A1_BYTE2 0x2173 +#define DSM_EQ_BQ4_A2_BYTE0 0x2175 +#define DSM_EQ_BQ4_A2_BYTE1 0x2176 +#define DSM_EQ_BQ4_A2_BYTE2 0x2177 +#define DSM_EQ_BQ5_B0_BYTE0 0x2179 +#define DSM_EQ_BQ5_B0_BYTE1 0x217a +#define DSM_EQ_BQ5_B0_BYTE2 0x217b +#define DSM_EQ_BQ5_B1_BYTE0 0x217d +#define DSM_EQ_BQ5_B1_BYTE1 0x217e +#define DSM_EQ_BQ5_B1_BYTE2 0x217f +#define DSM_EQ_BQ5_B2_BYTE0 0x2181 +#define DSM_EQ_BQ5_B2_BYTE1 0x2182 +#define DSM_EQ_BQ5_B2_BYTE2 0x2183 +#define DSM_EQ_BQ5_A1_BYTE0 0x2185 +#define DSM_EQ_BQ5_A1_BYTE1 0x2186 +#define DSM_EQ_BQ5_A1_BYTE2 0x2187 +#define DSM_EQ_BQ5_A2_BYTE0 0x2189 +#define DSM_EQ_BQ5_A2_BYTE1 0x218a +#define DSM_EQ_BQ5_A2_BYTE2 0x218b +#define DSM_EQ_BQ6_B0_BYTE0 0x218d +#define DSM_EQ_BQ6_B0_BYTE1 0x218e +#define DSM_EQ_BQ6_B0_BYTE2 0x218f +#define DSM_EQ_BQ6_B1_BYTE0 0x2191 +#define DSM_EQ_BQ6_B1_BYTE1 0x2192 +#define DSM_EQ_BQ6_B1_BYTE2 0x2193 +#define DSM_EQ_BQ6_B2_BYTE0 0x2195 +#define DSM_EQ_BQ6_B2_BYTE1 0x2196 +#define DSM_EQ_BQ6_B2_BYTE2 0x2197 +#define DSM_EQ_BQ6_A1_BYTE0 0x2199 +#define DSM_EQ_BQ6_A1_BYTE1 0x219a +#define DSM_EQ_BQ6_A1_BYTE2 0x219b +#define DSM_EQ_BQ6_A2_BYTE0 0x219d +#define DSM_EQ_BQ6_A2_BYTE1 0x219e +#define DSM_EQ_BQ6_A2_BYTE2 0x219f +#define DSM_EQ_BQ7_B0_BYTE0 0x21a1 +#define DSM_EQ_BQ7_B0_BYTE1 0x21a2 +#define DSM_EQ_BQ7_B0_BYTE2 0x21a3 +#define DSM_EQ_BQ7_B1_BYTE0 0x21a5 +#define DSM_EQ_BQ7_B1_BYTE1 0x21a6 +#define DSM_EQ_BQ7_B1_BYTE2 0x21a7 +#define DSM_EQ_BQ7_B2_BYTE0 0x21a9 +#define DSM_EQ_BQ7_B2_BYTE1 0x21aa +#define DSM_EQ_BQ7_B2_BYTE2 0x21ab +#define DSM_EQ_BQ7_A1_BYTE0 0x21ad +#define DSM_EQ_BQ7_A1_BYTE1 0x21ae +#define DSM_EQ_BQ7_A1_BYTE2 0x21af +#define DSM_EQ_BQ7_A2_BYTE0 0x21b1 +#define DSM_EQ_BQ7_A2_BYTE1 0x21b2 +#define DSM_EQ_BQ7_A2_BYTE2 0x21b3 +#define DSM_EQ_BQ8_B0_BYTE0 0x21b5 +#define DSM_EQ_BQ8_B0_BYTE1 0x21b6 +#define DSM_EQ_BQ8_B0_BYTE2 0x21b7 +#define DSM_EQ_BQ8_B1_BYTE0 0x21b9 +#define DSM_EQ_BQ8_B1_BYTE1 0x21ba +#define DSM_EQ_BQ8_B1_BYTE2 0x21bb +#define DSM_EQ_BQ8_B2_BYTE0 0x21bd +#define DSM_EQ_BQ8_B2_BYTE1 0x21be +#define DSM_EQ_BQ8_B2_BYTE2 0x21bf +#define DSM_EQ_BQ8_A1_BYTE0 0x21c1 +#define DSM_EQ_BQ8_A1_BYTE1 0x21c2 +#define DSM_EQ_BQ8_A1_BYTE2 0x21c3 +#define DSM_EQ_BQ8_A2_BYTE0 0x21c5 +#define DSM_EQ_BQ8_A2_BYTE1 0x21c6 +#define DSM_EQ_BQ8_A2_BYTE2 0x21c7 +#define DSM_LFX_BQ_B0_BYTE0 0x21c9 +#define DSM_LFX_BQ_B0_BYTE1 0x21ca +#define DSM_LFX_BQ_B0_BYTE2 0x21cb +#define DSM_LFX_BQ_B1_BYTE0 0x21cd +#define DSM_LFX_BQ_B1_BYTE1 0x21ce +#define DSM_LFX_BQ_B1_BYTE2 0x21cf +#define DSM_LFX_BQ_B2_BYTE0 0x21d1 +#define DSM_LFX_BQ_B2_BYTE1 0x21d2 +#define DSM_LFX_BQ_B2_BYTE2 0x21d3 +#define DSM_LFX_BQ_A1_BYTE0 0x21d5 +#define DSM_LFX_BQ_A1_BYTE1 0x21d6 +#define DSM_LFX_BQ_A1_BYTE2 0x21d7 +#define DSM_LFX_BQ_A2_BYTE0 0x21d9 +#define DSM_LFX_BQ_A2_BYTE1 0x21da +#define DSM_LFX_BQ_A2_BYTE2 0x21db +#define DSM_PPR_HPF_B0_BYTE0 0x21dd +#define DSM_PPR_HPF_B0_BYTE1 0x21de +#define DSM_PPR_HPF_B0_BYTE2 0x21df +#define DSM_PPR_HPF_B1_BYTE0 0x21e1 +#define DSM_PPR_HPF_B1_BYTE1 0x21e2 +#define DSM_PPR_HPF_B1_BYTE2 0x21e3 +#define DSM_PPR_HPF_B2_BYTE0 0x21e5 +#define DSM_PPR_HPF_B2_BYTE1 0x21e6 +#define DSM_PPR_HPF_B2_BYTE2 0x21e7 +#define DSM_PPR_HPF_A1_BYTE0 0x21e9 +#define DSM_PPR_HPF_A1_BYTE1 0x21ea +#define DSM_PPR_HPF_A1_BYTE2 0x21eb +#define DSM_PPR_HPF_A2_BYTE0 0x21ed +#define DSM_PPR_HPF_A2_BYTE1 0x21ee +#define DSM_PPR_HPF_A2_BYTE2 0x21ef +#define DSM_PPR_LPF_B0_BYTE0 0x21f1 +#define DSM_PPR_LPF_B0_BYTE1 0x21f2 +#define DSM_PPR_LPF_B0_BYTE2 0x21f3 +#define DSM_PPR_LPF_B1_BYTE0 0x21f5 +#define DSM_PPR_LPF_B1_BYTE1 0x21f6 +#define DSM_PPR_LPF_B1_BYTE2 0x21f7 +#define DSM_PPR_LPF_B2_BYTE0 0x21f9 +#define DSM_PPR_LPF_B2_BYTE1 0x21fa +#define DSM_PPR_LPF_B2_BYTE2 0x21fb +#define DSM_PPR_LPF_A1_BYTE0 0x21fd +#define DSM_PPR_LPF_A1_BYTE1 0x21fe +#define DSM_PPR_LPF_A1_BYTE2 0x21ff +#define DSM_PPR_LPF_A2_BYTE0 0x2201 +#define DSM_PPR_LPF_A2_BYTE1 0x2202 +#define DSM_PPR_LPF_A2_BYTE2 0x2203 +#define DSM_SPL_BQ_B0_BYTE0 0x2205 +#define DSM_SPL_BQ_B0_BYTE1 0x2206 +#define DSM_SPL_BQ_B0_BYTE2 0x2207 +#define DSM_SPL_BQ_B1_BYTE0 0x2209 +#define DSM_SPL_BQ_B1_BYTE1 0x220a +#define DSM_SPL_BQ_B1_BYTE2 0x220b +#define DSM_SPL_BQ_B2_BYTE0 0x220d +#define DSM_SPL_BQ_B2_BYTE1 0x220e +#define DSM_SPL_BQ_B2_BYTE2 0x220f +#define DSM_SPL_BQ_A1_BYTE0 0x2211 +#define DSM_SPL_BQ_A1_BYTE1 0x2212 +#define DSM_SPL_BQ_A1_BYTE2 0x2213 +#define DSM_SPL_BQ_A2_BYTE0 0x2215 +#define DSM_SPL_BQ_A2_BYTE1 0x2216 +#define DSM_SPL_BQ_A2_BYTE2 0x2217 +#define DSM_EXCUR_BQ_B0_BYTE0 0x2219 +#define DSM_EXCUR_BQ_B0_BYTE1 0x221a +#define DSM_EXCUR_BQ_B0_BYTE2 0x221b +#define DSM_EXCUR_BQ_B1_BYTE0 0x221d +#define DSM_EXCUR_BQ_B1_BYTE1 0x221e +#define DSM_EXCUR_BQ_B1_BYTE2 0x221f +#define DSM_EXCUR_BQ_B2_BYTE0 0x2221 +#define DSM_EXCUR_BQ_B2_BYTE1 0x2222 +#define DSM_EXCUR_BQ_B2_BYTE2 0x2223 +#define DSM_EXCUR_BQ_A1_BYTE0 0x2225 +#define DSM_EXCUR_BQ_A1_BYTE1 0x2226 +#define DSM_EXCUR_BQ_A1_BYTE2 0x2227 +#define DSM_EXCUR_BQ_A2_BYTE0 0x2229 +#define DSM_EXCUR_BQ_A2_BYTE1 0x222a +#define DSM_EXCUR_BQ_A2_BYTE2 0x222b +#define DSM_EXCPROT_HPF1_B0_BYTE0 0x222d +#define DSM_EXCPROT_HPF1_B0_BYTE1 0x222e +#define DSM_EXCPROT_HPF1_B0_BYTE2 0x222f +#define DSM_EXCPROT_HPF1_B1_BYTE0 0x2231 +#define DSM_EXCPROT_HPF1_B1_BYTE1 0x2232 +#define DSM_EXCPROT_HPF1_B1_BYTE2 0x2233 +#define DSM_EXCPROT_HPF1_B2_BYTE0 0x2235 +#define DSM_EXCPROT_HPF1_B2_BYTE1 0x2236 +#define DSM_EXCPROT_HPF1_B2_BYTE2 0x2237 +#define DSM_EXCPROT_HPF1_A1_BYTE0 0x2239 +#define DSM_EXCPROT_HPF1_A1_BYTE1 0x223a +#define DSM_EXCPROT_HPF1_A1_BYTE2 0x223b +#define DSM_EXCPROT_HPF1_A2_BYTE0 0x223d +#define DSM_EXCPROT_HPF1_A2_BYTE1 0x223e +#define DSM_EXCPROT_HPF1_A2_BYTE2 0x223f +#define DSM_EXCPROT_HPF2_B0_BYTE0 0x2241 +#define DSM_EXCPROT_HPF2_B0_BYTE1 0x2242 +#define DSM_EXCPROT_HPF2_B0_BYTE2 0x2243 +#define DSM_EXCPROT_HPF2_B1_BYTE0 0x2245 +#define DSM_EXCPROT_HPF2_B1_BYTE1 0x2246 +#define DSM_EXCPROT_HPF2_B1_BYTE2 0x2247 +#define DSM_EXCPROT_HPF2_B2_BYTE0 0x2249 +#define DSM_EXCPROT_HPF2_B2_BYTE1 0x224a +#define DSM_EXCPROT_HPF2_B2_BYTE2 0x224b +#define DSM_EXCPROT_HPF2_A1_BYTE0 0x224d +#define DSM_EXCPROT_HPF2_A1_BYTE1 0x224e +#define DSM_EXCPROT_HPF2_A1_BYTE2 0x224f +#define DSM_EXCPROT_HPF2_A2_BYTE0 0x2251 +#define DSM_EXCPROT_HPF2_A2_BYTE1 0x2252 +#define DSM_EXCPROT_HPF2_A2_BYTE2 0x2253 +#define DSM_EXCPROT_HPF3_B0_BYTE0 0x2255 +#define DSM_EXCPROT_HPF3_B0_BYTE1 0x2256 +#define DSM_EXCPROT_HPF3_B0_BYTE2 0x2257 +#define DSM_EXCPROT_HPF3_B1_BYTE0 0x2259 +#define DSM_EXCPROT_HPF3_B1_BYTE1 0x225a +#define DSM_EXCPROT_HPF3_B1_BYTE2 0x225b +#define DSM_EXCPROT_HPF3_B2_BYTE0 0x225d +#define DSM_EXCPROT_HPF3_B2_BYTE1 0x225e +#define DSM_EXCPROT_HPF3_B2_BYTE2 0x225f +#define DSM_EXCPROT_HPF3_A1_BYTE0 0x2261 +#define DSM_EXCPROT_HPF3_A1_BYTE1 0x2262 +#define DSM_EXCPROT_HPF3_A1_BYTE2 0x2263 +#define DSM_EXCPROT_HPF3_A2_BYTE0 0x2265 +#define DSM_EXCPROT_HPF3_A2_BYTE1 0x2266 +#define DSM_EXCPROT_HPF3_A2_BYTE2 0x2267 +#define DSM_EXCPROT_HPF4_B0_BYTE0 0x2269 +#define DSM_EXCPROT_HPF4_B0_BYTE1 0x226a +#define DSM_EXCPROT_HPF4_B0_BYTE2 0x226b +#define DSM_EXCPROT_HPF4_B1_BYTE0 0x226d +#define DSM_EXCPROT_HPF4_B1_BYTE1 0x226e +#define DSM_EXCPROT_HPF4_B1_BYTE2 0x226f +#define DSM_EXCPROT_HPF4_B2_BYTE0 0x2271 +#define DSM_EXCPROT_HPF4_B2_BYTE1 0x2272 +#define DSM_EXCPROT_HPF4_B2_BYTE2 0x2273 +#define DSM_EXCPROT_HPF4_A1_BYTE0 0x2275 +#define DSM_EXCPROT_HPF4_A1_BYTE1 0x2276 +#define DSM_EXCPROT_HPF4_A1_BYTE2 0x2277 +#define DSM_EXCPROT_HPF4_A2_BYTE0 0x2279 +#define DSM_EXCPROT_HPF4_A2_BYTE1 0x227a +#define DSM_EXCPROT_HPF4_A2_BYTE2 0x227b +#define DSM_EXCPROT_HPF5_B0_BYTE0 0x227d +#define DSM_EXCPROT_HPF5_B0_BYTE1 0x227e +#define DSM_EXCPROT_HPF5_B0_BYTE2 0x227f +#define DSM_EXCPROT_HPF5_B1_BYTE0 0x2281 +#define DSM_EXCPROT_HPF5_B1_BYTE1 0x2282 +#define DSM_EXCPROT_HPF5_B1_BYTE2 0x2283 +#define DSM_EXCPROT_HPF5_B2_BYTE0 0x2285 +#define DSM_EXCPROT_HPF5_B2_BYTE1 0x2286 +#define DSM_EXCPROT_HPF5_B2_BYTE2 0x2287 +#define DSM_EXCPROT_HPF5_A1_BYTE0 0x2289 +#define DSM_EXCPROT_HPF5_A1_BYTE1 0x228a +#define DSM_EXCPROT_HPF5_A1_BYTE2 0x228b +#define DSM_EXCPROT_HPF5_A2_BYTE0 0x228d +#define DSM_EXCPROT_HPF5_A2_BYTE1 0x228e +#define DSM_EXCPROT_HPF5_A2_BYTE2 0x228f +#define DSM_DEBUZZ_BPF_B0_BYTE0 0x2291 +#define DSM_DEBUZZ_BPF_B0_BYTE1 0x2292 +#define DSM_DEBUZZ_BPF_B0_BYTE2 0x2293 +#define DSM_DEBUZZ_BPF_B1_BYTE0 0x2295 +#define DSM_DEBUZZ_BPF_B1_BYTE1 0x2296 +#define DSM_DEBUZZ_BPF_B1_BYTE2 0x2297 +#define DSM_DEBUZZ_BPF_B2_BYTE0 0x2299 +#define DSM_DEBUZZ_BPF_B2_BYTE1 0x229a +#define DSM_DEBUZZ_BPF_B2_BYTE2 0x229b +#define DSM_DEBUZZ_BPF_A1_BYTE0 0x229d +#define DSM_DEBUZZ_BPF_A1_BYTE1 0x229e +#define DSM_DEBUZZ_BPF_A1_BYTE2 0x229f +#define DSM_DEBUZZ_BPF_A2_BYTE0 0x22a1 +#define DSM_DEBUZZ_BPF_A2_BYTE1 0x22a2 +#define DSM_DEBUZZ_BPF_A2_BYTE2 0x22a3 +#define DSM_DEBUZZ_PORT_B0_BYTE0 0x22a5 +#define DSM_DEBUZZ_PORT_B0_BYTE1 0x22a6 +#define DSM_DEBUZZ_PORT_B0_BYTE2 0x22a7 +#define DSM_DEBUZZ_PORT_B1_BYTE0 0x22a9 +#define DSM_DEBUZZ_PORT_B1_BYTE1 0x22aa +#define DSM_DEBUZZ_PORT_B1_BYTE2 0x22ab +#define DSM_DEBUZZ_PORT_B2_BYTE0 0x22ad +#define DSM_DEBUZZ_PORT_B2_BYTE1 0x22ae +#define DSM_DEBUZZ_PORT_B2_BYTE2 0x22af +#define DSM_DEBUZZ_PORT_A1_BYTE0 0x22b1 +#define DSM_DEBUZZ_PORT_A1_BYTE1 0x22b2 +#define DSM_DEBUZZ_PORT_A1_BYTE2 0x22b3 +#define DSM_DEBUZZ_PORT_A2_BYTE0 0x22b5 +#define DSM_DEBUZZ_PORT_A2_BYTE1 0x22b6 +#define DSM_DEBUZZ_PORT_A2_BYTE2 0x22b7 +#define DSM_DEBUZZ_NOTCH_B0_BYTE0 0x22b9 +#define DSM_DEBUZZ_NOTCH_B0_BYTE1 0x22ba +#define DSM_DEBUZZ_NOTCH_B0_BYTE2 0x22bb +#define DSM_DEBUZZ_NOTCH_B1_BYTE0 0x22bd +#define DSM_DEBUZZ_NOTCH_B1_BYTE1 0x22be +#define DSM_DEBUZZ_NOTCH_B1_BYTE2 0x22bf +#define DSM_DEBUZZ_NOTCH_B2_BYTE0 0x22c1 +#define DSM_DEBUZZ_NOTCH_B2_BYTE1 0x22c2 +#define DSM_DEBUZZ_NOTCH_B2_BYTE2 0x22c3 +#define DSM_DEBUZZ_NOTCH_A1_BYTE0 0x22c5 +#define DSM_DEBUZZ_NOTCH_A1_BYTE1 0x22c6 +#define DSM_DEBUZZ_NOTCH_A1_BYTE2 0x22c7 +#define DSM_DEBUZZ_NOTCH_A2_BYTE0 0x22c9 +#define DSM_DEBUZZ_NOTCH_A2_BYTE1 0x22ca +#define DSM_DEBUZZ_NOTCH_A2_BYTE2 0x22cb +#define DSM_THERMAL_BQ_B0_BYTE0 0x22cd +#define DSM_THERMAL_BQ_B0_BYTE1 0x22ce +#define DSM_THERMAL_BQ_B0_BYTE2 0x22cf +#define DSM_THERMAL_BQ_B1_BYTE0 0x22d1 +#define DSM_THERMAL_BQ_B1_BYTE1 0x22d2 +#define DSM_THERMAL_BQ_B1_BYTE2 0x22d3 +#define DSM_THERMAL_BQ_B2_BYTE0 0x22d5 +#define DSM_THERMAL_BQ_B2_BYTE1 0x22d6 +#define DSM_THERMAL_BQ_B2_BYTE2 0x22d7 +#define DSM_THERMAL_BQ_A1_BYTE0 0x22d9 +#define DSM_THERMAL_BQ_A1_BYTE1 0x22da +#define DSM_THERMAL_BQ_A1_BYTE2 0x22db +#define DSM_THERMAL_BQ_A2_BYTE0 0x22dd +#define DSM_THERMAL_BQ_A2_BYTE1 0x22de +#define DSM_THERMAL_BQ_A2_BYTE2 0x22df +#define DSM_WBDRC_FILT1_B0_BYTE0 0x22e1 +#define DSM_WBDRC_FILT1_B0_BYTE1 0x22e2 +#define DSM_WBDRC_FILT1_B0_BYTE2 0x22e3 +#define DSM_WBDRC_FILT1_B1_BYTE0 0x22e5 +#define DSM_WBDRC_FILT1_B1_BYTE1 0x22e6 +#define DSM_WBDRC_FILT1_B1_BYTE2 0x22e7 +#define DSM_WBDRC_FILT1_B2_BYTE0 0x22e9 +#define DSM_WBDRC_FILT1_B2_BYTE1 0x22ea +#define DSM_WBDRC_FILT1_B2_BYTE2 0x22eb +#define DSM_WBDRC_FILT1_A1_BYTE0 0x22ed +#define DSM_WBDRC_FILT1_A1_BYTE1 0x22ee +#define DSM_WBDRC_FILT1_A1_BYTE2 0x22ef +#define DSM_WBDRC_FILT1_A2_BYTE0 0x22f1 +#define DSM_WBDRC_FILT1_A2_BYTE1 0x22f2 +#define DSM_WBDRC_FILT1_A2_BYTE2 0x22f3 +#define DSM_WBDRC_FILT2_B0_BYTE0 0x22f5 +#define DSM_WBDRC_FILT2_B0_BYTE1 0x22f6 +#define DSM_WBDRC_FILT2_B0_BYTE2 0x22f7 +#define DSM_WBDRC_FILT2_B1_BYTE0 0x22f9 +#define DSM_WBDRC_FILT2_B1_BYTE1 0x22fa +#define DSM_WBDRC_FILT2_B1_BYTE2 0x22fb +#define DSM_WBDRC_FILT2_B2_BYTE0 0x22fd +#define DSM_WBDRC_FILT2_B2_BYTE1 0x22fe +#define DSM_WBDRC_FILT2_B2_BYTE2 0x22ff +#define DSM_WBDRC_FILT2_A1_BYTE0 0x2301 +#define DSM_WBDRC_FILT2_A1_BYTE1 0x2302 +#define DSM_WBDRC_FILT2_A1_BYTE2 0x2303 +#define DSM_WBDRC_FILT2_A2_BYTE0 0x2305 +#define DSM_WBDRC_FILT2_A2_BYTE1 0x2306 +#define DSM_WBDRC_FILT2_A2_BYTE2 0x2307 +#define DSM_PPR_RELEASE_TIME_BYTE0 0x2309 +#define DSM_PPR_RELEASE_TIME_BYTE1 0x230a +#define DSM_PPR_RELEASE_TIME_BYTE2 0x230b +#define DSM_PPR_ATTACK_TIME_BYTE0 0x230d +#define DSM_PPR_ATTACK_TIME_BYTE1 0x230e +#define DSM_PPR_ATTACK_TIME_BYTE2 0x230f +#define DSM_DEBUZZER_RELEASE_TIME_BYTE0 0x2311 +#define DSM_DEBUZZER_RELEASE_TIME_BYTE1 0x2312 +#define DSM_DEBUZZER_RELEASE_TIME_BYTE2 0x2313 +#define DSM_DEBUZZER_ATTACK_TIME_BYTE0 0x2315 +#define DSM_DEBUZZER_ATTACK_TIME_BYTE1 0x2316 +#define DSM_DEBUZZER_ATTACK_TIME_BYTE2 0x2317 + +#define DSMIG_WB_DRC_RELEASE_TIME_1 0x2380 +#define DSMIG_WB_DRC_RELEASE_TIME_2 0x2381 +#define DSMIG_WB_DRC_ATTACK_TIME_1 0x2382 +#define DSMIG_WB_DRC_ATTACK_TIME_2 0x2383 +#define DSMIG_WB_DRC_COMPRESSION_RATIO 0x2384 +#define DSMIG_WB_DRC_COMPRESSION_THRESHOLD 0x2385 +#define DSMIG_WB_DRC_MAKEUPGAIN 0x2386 +#define DSMIG_WB_DRC_NOISE_GATE_THRESHOLD 0x2387 +#define DSMIG_WBDRC_HPF_ENABLE 0x2388 +#define DSMIG_WB_DRC_TEST_SMOOTHER_OUT_EN 0x2389 +#define DSMIG_PPR_THRESHOLD 0x238b +#define DSM_STEREO_BASS_CHANNEL_SELECT 0x238d +#define DSM_TPROT_THRESHOLD_BYTE0 0x238e +#define DSM_TPROT_THRESHOLD_BYTE1 0x238f +#define DSM_TPROT_ROOM_TEMPERATURE_BYTE0 0x2390 +#define DSM_TPROT_ROOM_TEMPERATURE_BYTE1 0x2391 +#define DSM_TPROT_RECIP_RDC_ROOM_BYTE0 0x2392 +#define DSM_TPROT_RECIP_RDC_ROOM_BYTE1 0x2393 +#define DSM_TPROT_RECIP_RDC_ROOM_BYTE2 0x2394 +#define DSM_TPROT_RECIP_TCONST_BYTE0 0x2395 +#define DSM_TPROT_RECIP_TCONST_BYTE1 0x2396 +#define DSM_TPROT_RECIP_TCONST_BYTE2 0x2397 +#define DSM_THERMAL_ATTENUATION_SETTINGS 0x2398 +#define DSM_THERMAL_PILOT_TONE_ATTENUATION 0x2399 +#define DSM_TPROT_PG_TEMP_THRESH_BYTE0 0x239a +#define DSM_TPROT_PG_TEMP_THRESH_BYTE1 0x239b + +#define THERMAL_RDC_RD_BACK_BYTE1 0x239c +#define THERMAL_RDC_RD_BACK_BYTE0 0x239d +#define THERMAL_COILTEMP_RD_BACK_BYTE1 0x239e +#define THERMAL_COILTEMP_RD_BACK_BYTE0 0x239f + +#define DSMIG_DEBUZZER_THRESHOLD 0x23b5 +#define DSMIG_DEBUZZER_ALPHA_COEF_TEST_ONLY 0x23b6 +#define DSM_VOL_ENA 0x23b9 +#define DSM_VOL_CTRL 0x23ba + +#define DSMIG_EN 0x23e0 +#define MAX98390_R23E1_DSP_GLOBAL_EN 0x23e1 + +#define DSM_THERMAL_GAIN 0x23f0 +#define DSM_PPR_GAIN 0x23f1 +#define DSM_DBZ_GAIN 0x23f2 +#define DSM_WBDRC_GAIN 0x23f3 + +#define MAX98390_R23FF_GLOBAL_EN 0x23FF +#define MAX98390_R24FF_REV_ID 0x24FF + +/* MAX98390_R2021_PCM_RX_SRC_1 */ +#define MAX98390_PCM_RX_CH_SRC_SHIFT (0) +#define MAX98390_PCM_RX_CH_SRC_BASS_SHIFT (4) + +/* MAX98390_R2022_PCM_TX_SRC_1 */ +#define MAX98390_PCM_TX_CH_SRC_A_V_SHIFT (0) +#define MAX98390_PCM_TX_CH_SRC_A_I_SHIFT (4) + +/* MAX98390_R2024_PCM_DATA_FMT_CFG */ +#define MAX98390_PCM_MODE_CFG_FORMAT_MASK (0x7 << 3) +#define MAX98390_PCM_MODE_CFG_FORMAT_SHIFT (3) +#define MAX98390_PCM_TX_CH_INTERLEAVE_MASK (0x1 << 2) +#define MAX98390_PCM_FORMAT_I2S (0x0 << 0) +#define MAX98390_PCM_FORMAT_LJ (0x1 << 0) +#define MAX98390_PCM_FORMAT_TDM_MODE0 (0x3 << 0) +#define MAX98390_PCM_FORMAT_TDM_MODE1 (0x4 << 0) +#define MAX98390_PCM_FORMAT_TDM_MODE2 (0x5 << 0) +#define MAX98390_PCM_MODE_CFG_CHANSZ_MASK (0x3 << 6) +#define MAX98390_PCM_MODE_CFG_CHANSZ_16 (0x1 << 6) +#define MAX98390_PCM_MODE_CFG_CHANSZ_24 (0x2 << 6) +#define MAX98390_PCM_MODE_CFG_CHANSZ_32 (0x3 << 6) + +/* MAX98390_R2039_AMP_DSP_CFG */ +#define MAX98390_AMP_DSP_CFG_RMP_UP_SHIFT (4) +#define MAX98390_AMP_DSP_CFG_RMP_DN_SHIFT (5) + +/* MAX98390_R203A_AMP_EN */ +#define MAX98390_R203A_AMP_EN_SHIFT (0) + +/* MAX98390_PCM_MASTER_MODE */ +#define MAX98390_PCM_MASTER_MODE_MASK (0x3 << 0) +#define MAX98390_PCM_MASTER_MODE_SLAVE (0x0 << 0) +#define MAX98390_PCM_MASTER_MODE_MASTER (0x3 << 0) + +#define MAX98390_PCM_MASTER_MODE_MCLK_MASK (0xF << 2) +#define MAX98390_PCM_MASTER_MODE_MCLK_RATE_SHIFT (2) + +/* PCM_CLK_SETUP */ +#define MAX98390_PCM_MODE_CFG_PCM_BCLKEDGE (0x1 << 2) +#define MAX98390_PCM_CLK_SETUP_BSEL_MASK (0xF << 0) + +/* PCM_SR_SETUP */ +#define MAX98390_PCM_SR_SET1_SR_MASK (0xF << 0) +#define MAX98390_PCM_SR_SET1_SR_8000 (0x0 << 0) +#define MAX98390_PCM_SR_SET1_SR_11025 (0x1 << 0) +#define MAX98390_PCM_SR_SET1_SR_12000 (0x2 << 0) +#define MAX98390_PCM_SR_SET1_SR_16000 (0x3 << 0) +#define MAX98390_PCM_SR_SET1_SR_22050 (0x4 << 0) +#define MAX98390_PCM_SR_SET1_SR_24000 (0x5 << 0) +#define MAX98390_PCM_SR_SET1_SR_32000 (0x6 << 0) +#define MAX98390_PCM_SR_SET1_SR_44100 (0x7 << 0) +#define MAX98390_PCM_SR_SET1_SR_48000 (0x8 << 0) + +/* PCM_TO_SPK_MONO_MIX_1 */ +#define MAX98390_PCM_TO_SPK_MONOMIX_CFG_MASK (0x3 << 6) +#define MAX98390_PCM_TO_SPK_MONOMIX_CFG_SHIFT (6) +#define MAX98390_PCM_TO_SPK_CH0_SRC_MASK (0xF << 0) +#define MAX98390_PCM_TO_SPK_CH1_SRC_MASK (0xF << 4) + +/* MAX98390_BOOST_CTRL3 */ +#define MAX98390_BOOST_CLK_PHASE_CFG_SHIFT (2) + +/* SOFT_RESET */ +#define MAX98390_SOFT_RESET_MASK (0x1 << 0) + +#define MAX98390_GLOBAL_EN_MASK (0x1 << 0) +#define MAX98390_AMP_EN_MASK (0x1 << 0) + +/* DSM register offset */ +#define MAX98390_DSM_PAYLOAD_OFFSET 16 +#define MAX98390_DSM_PAYLOAD_OFFSET_2 495 + +struct max98390_priv { + struct regmap *regmap; + unsigned int sysclk; + unsigned int master; + unsigned int tdm_mode; + unsigned int ref_rdc_value; + unsigned int ambient_temp_value; +}; +#endif diff --git a/sound/soc/codecs/max9867.c b/sound/soc/codecs/max9867.c index 6d49a1cc98c6..c72cb2888c21 100644 --- a/sound/soc/codecs/max9867.c +++ b/sound/soc/codecs/max9867.c @@ -23,8 +23,21 @@ static const char *const max9867_spmode[] = { }; static const char *const max9867_filter_text[] = {"IIR", "FIR"}; +static const char *const max9867_adc_dac_filter_text[] = { + "Disabled", + "Elliptical/16/256", + "Butterworth/16/500", + "Elliptical/8/256", + "Butterworth/8/500", + "Butterworth/8-24" +}; + static SOC_ENUM_SINGLE_DECL(max9867_filter, MAX9867_CODECFLTR, 7, max9867_filter_text); +static SOC_ENUM_SINGLE_DECL(max9867_dac_filter, MAX9867_CODECFLTR, 0, + max9867_adc_dac_filter_text); +static SOC_ENUM_SINGLE_DECL(max9867_adc_filter, MAX9867_CODECFLTR, 4, + max9867_adc_dac_filter_text); static SOC_ENUM_SINGLE_DECL(max9867_spkmode, MAX9867_MODECONFIG, 0, max9867_spmode); static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(max9867_master_tlv, @@ -64,6 +77,9 @@ static const struct snd_kcontrol_new max9867_snd_controls[] = { SOC_SINGLE("Volume Smoothing Switch", MAX9867_MODECONFIG, 6, 1, 0), SOC_SINGLE("Line ZC Switch", MAX9867_MODECONFIG, 5, 1, 0), SOC_ENUM("DSP Filter", max9867_filter), + SOC_ENUM("ADC Filter", max9867_adc_filter), + SOC_ENUM("DAC Filter", max9867_dac_filter), + SOC_SINGLE("Mono Playback Switch", MAX9867_IFC1B, 3, 1, 0), }; /* Input mixer */ @@ -88,20 +104,38 @@ static const struct snd_kcontrol_new max9867_line_out_control = SOC_DAPM_DOUBLE_R("Switch", MAX9867_LEFTVOL, MAX9867_RIGHTVOL, 6, 1, 1); +/* DMIC mux */ +static const char *const dmic_mux_text[] = { + "ADC", "DMIC" +}; +static SOC_ENUM_SINGLE_DECL(left_dmic_mux_enum, + MAX9867_MICCONFIG, 5, dmic_mux_text); +static SOC_ENUM_SINGLE_DECL(right_dmic_mux_enum, + MAX9867_MICCONFIG, 4, dmic_mux_text); +static const struct snd_kcontrol_new max9867_left_dmic_mux = + SOC_DAPM_ENUM("DMICL Mux", left_dmic_mux_enum); +static const struct snd_kcontrol_new max9867_right_dmic_mux = + SOC_DAPM_ENUM("DMICR Mux", right_dmic_mux_enum); static const struct snd_soc_dapm_widget max9867_dapm_widgets[] = { SND_SOC_DAPM_INPUT("MICL"), SND_SOC_DAPM_INPUT("MICR"), + SND_SOC_DAPM_INPUT("DMICL"), + SND_SOC_DAPM_INPUT("DMICR"), SND_SOC_DAPM_INPUT("LINL"), SND_SOC_DAPM_INPUT("LINR"), - SND_SOC_DAPM_PGA("Left Line Input", MAX9867_PWRMAN, 6, 0, NULL, 0), - SND_SOC_DAPM_PGA("Right Line Input", MAX9867_PWRMAN, 5, 0, NULL, 0), + SND_SOC_DAPM_PGA("Left Line Input", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("Right Line Input", SND_SOC_NOPM, 0, 0, NULL, 0), SND_SOC_DAPM_MIXER_NAMED_CTL("Input Mixer", SND_SOC_NOPM, 0, 0, max9867_input_mixer_controls, ARRAY_SIZE(max9867_input_mixer_controls)), - SND_SOC_DAPM_ADC("ADCL", "HiFi Capture", MAX9867_PWRMAN, 1, 0), - SND_SOC_DAPM_ADC("ADCR", "HiFi Capture", MAX9867_PWRMAN, 0, 0), + SND_SOC_DAPM_MUX("DMICL Mux", SND_SOC_NOPM, 0, 0, + &max9867_left_dmic_mux), + SND_SOC_DAPM_MUX("DMICR Mux", SND_SOC_NOPM, 0, 0, + &max9867_right_dmic_mux), + SND_SOC_DAPM_ADC("ADCL", "HiFi Capture", SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_ADC("ADCR", "HiFi Capture", SND_SOC_NOPM, 0, 0), SND_SOC_DAPM_MIXER("Digital", SND_SOC_NOPM, 0, 0, max9867_sidetone_mixer_controls, @@ -109,8 +143,8 @@ static const struct snd_soc_dapm_widget max9867_dapm_widgets[] = { SND_SOC_DAPM_MIXER_NAMED_CTL("Output Mixer", SND_SOC_NOPM, 0, 0, max9867_output_mixer_controls, ARRAY_SIZE(max9867_output_mixer_controls)), - SND_SOC_DAPM_DAC("DACL", "HiFi Playback", MAX9867_PWRMAN, 3, 0), - SND_SOC_DAPM_DAC("DACR", "HiFi Playback", MAX9867_PWRMAN, 2, 0), + SND_SOC_DAPM_DAC("DACL", "HiFi Playback", SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_DAC("DACR", "HiFi Playback", SND_SOC_NOPM, 0, 0), SND_SOC_DAPM_SWITCH("Master Playback", SND_SOC_NOPM, 0, 0, &max9867_line_out_control), SND_SOC_DAPM_OUTPUT("LOUT"), @@ -124,8 +158,12 @@ static const struct snd_soc_dapm_route max9867_audio_map[] = { {"Input Mixer", "Mic Capture Switch", "MICR"}, {"Input Mixer", "Line Capture Switch", "Left Line Input"}, {"Input Mixer", "Line Capture Switch", "Right Line Input"}, - {"ADCL", NULL, "Input Mixer"}, - {"ADCR", NULL, "Input Mixer"}, + {"DMICL Mux", "DMIC", "DMICL"}, + {"DMICR Mux", "DMIC", "DMICR"}, + {"DMICL Mux", "ADC", "Input Mixer"}, + {"DMICR Mux", "ADC", "Input Mixer"}, + {"ADCL", NULL, "DMICL Mux"}, + {"ADCR", NULL, "DMICR Mux"}, {"Digital", "Sidetone Switch", "ADCL"}, {"Digital", "Sidetone Switch", "ADCR"}, @@ -346,7 +384,8 @@ static int max9867_dai_set_fmt(struct snd_soc_dai *codec_dai, } regmap_write(max9867->regmap, MAX9867_IFC1A, iface1A); - regmap_write(max9867->regmap, MAX9867_IFC1B, iface1B); + regmap_update_bits(max9867->regmap, MAX9867_IFC1B, + MAX9867_IFC1B_BCLK_MASK, iface1B); return 0; } @@ -413,15 +452,14 @@ static int max9867_set_bias_level(struct snd_soc_component *component, if (err) return err; - err = regmap_update_bits(max9867->regmap, MAX9867_PWRMAN, - MAX9867_SHTDOWN, MAX9867_SHTDOWN); + err = regmap_write(max9867->regmap, + MAX9867_PWRMAN, 0xff); if (err) return err; } break; case SND_SOC_BIAS_OFF: - err = regmap_update_bits(max9867->regmap, MAX9867_PWRMAN, - MAX9867_SHTDOWN, 0); + err = regmap_write(max9867->regmap, MAX9867_PWRMAN, 0); if (err) return err; @@ -463,35 +501,10 @@ static bool max9867_volatile_register(struct device *dev, unsigned int reg) } } -static const struct reg_default max9867_reg[] = { - { 0x04, 0x00 }, - { 0x05, 0x00 }, - { 0x06, 0x00 }, - { 0x07, 0x00 }, - { 0x08, 0x00 }, - { 0x09, 0x00 }, - { 0x0A, 0x00 }, - { 0x0B, 0x00 }, - { 0x0C, 0x00 }, - { 0x0D, 0x00 }, - { 0x0E, 0x40 }, - { 0x0F, 0x40 }, - { 0x10, 0x00 }, - { 0x11, 0x00 }, - { 0x12, 0x00 }, - { 0x13, 0x00 }, - { 0x14, 0x00 }, - { 0x15, 0x00 }, - { 0x16, 0x00 }, - { 0x17, 0x00 }, -}; - static const struct regmap_config max9867_regmap = { .reg_bits = 8, .val_bits = 8, .max_register = MAX9867_REVISION, - .reg_defaults = max9867_reg, - .num_reg_defaults = ARRAY_SIZE(max9867_reg), .volatile_reg = max9867_volatile_register, .cache_type = REGCACHE_RBTREE, }; diff --git a/sound/soc/codecs/max9867.h b/sound/soc/codecs/max9867.h index d459d49449cb..3092c3b99075 100644 --- a/sound/soc/codecs/max9867.h +++ b/sound/soc/codecs/max9867.h @@ -58,7 +58,6 @@ #define MAX9867_MICCONFIG 0x15 #define MAX9867_MODECONFIG 0x16 #define MAX9867_PWRMAN 0x17 -#define MAX9867_SHTDOWN 0x80 #define MAX9867_REVISION 0xff #define MAX9867_CACHEREGNUM 10 diff --git a/sound/soc/codecs/nau8810.c b/sound/soc/codecs/nau8810.c index de26758c30a8..33ebc6398426 100644 --- a/sound/soc/codecs/nau8810.c +++ b/sound/soc/codecs/nau8810.c @@ -355,6 +355,8 @@ static const struct snd_kcontrol_new nau8810_snd_controls[] = { /* Speaker Output Mixer */ static const struct snd_kcontrol_new nau8810_speaker_mixer_controls[] = { + SOC_DAPM_SINGLE("AUX Bypass Switch", NAU8810_REG_SPKMIX, + NAU8810_AUXSPK_SFT, 1, 0), SOC_DAPM_SINGLE("Line Bypass Switch", NAU8810_REG_SPKMIX, NAU8810_BYPSPK_SFT, 1, 0), SOC_DAPM_SINGLE("PCM Playback Switch", NAU8810_REG_SPKMIX, @@ -363,6 +365,8 @@ static const struct snd_kcontrol_new nau8810_speaker_mixer_controls[] = { /* Mono Output Mixer */ static const struct snd_kcontrol_new nau8810_mono_mixer_controls[] = { + SOC_DAPM_SINGLE("AUX Bypass Switch", NAU8810_REG_MONOMIX, + NAU8810_AUXMOUT_SFT, 1, 0), SOC_DAPM_SINGLE("Line Bypass Switch", NAU8810_REG_MONOMIX, NAU8810_BYPMOUT_SFT, 1, 0), SOC_DAPM_SINGLE("PCM Playback Switch", NAU8810_REG_MONOMIX, @@ -371,6 +375,8 @@ static const struct snd_kcontrol_new nau8810_mono_mixer_controls[] = { /* PGA Mute */ static const struct snd_kcontrol_new nau8810_pgaboost_mixer_controls[] = { + SOC_DAPM_SINGLE("AUX PGA Switch", NAU8810_REG_ADCBOOST, + NAU8810_AUXBSTGAIN_SFT, 0x7, 0), SOC_DAPM_SINGLE("PGA Mute Switch", NAU8810_REG_PGAGAIN, NAU8810_PGAMT_SFT, 1, 1), SOC_DAPM_SINGLE("PMIC PGA Switch", NAU8810_REG_ADCBOOST, @@ -379,6 +385,8 @@ static const struct snd_kcontrol_new nau8810_pgaboost_mixer_controls[] = { /* Input PGA */ static const struct snd_kcontrol_new nau8810_inpga[] = { + SOC_DAPM_SINGLE("AUX Switch", NAU8810_REG_INPUT_SIGNAL, + NAU8810_AUXPGA_SFT, 1, 0), SOC_DAPM_SINGLE("MicN Switch", NAU8810_REG_INPUT_SIGNAL, NAU8810_NMICPGA_SFT, 1, 0), SOC_DAPM_SINGLE("MicP Switch", NAU8810_REG_INPUT_SIGNAL, @@ -401,6 +409,23 @@ static int check_mclk_select_pll(struct snd_soc_dapm_widget *source, return (value & NAU8810_CLKM_MASK); } +static int check_mic_enabled(struct snd_soc_dapm_widget *source, + struct snd_soc_dapm_widget *sink) +{ + struct snd_soc_component *component = + snd_soc_dapm_to_component(source->dapm); + struct nau8810 *nau8810 = snd_soc_component_get_drvdata(component); + unsigned int value; + + regmap_read(nau8810->regmap, NAU8810_REG_INPUT_SIGNAL, &value); + if (value & NAU8810_PMICPGA_EN || value & NAU8810_NMICPGA_EN) + return 1; + regmap_read(nau8810->regmap, NAU8810_REG_ADCBOOST, &value); + if (value & NAU8810_PMICBSTGAIN_MASK) + return 1; + return 0; +} + static const struct snd_soc_dapm_widget nau8810_dapm_widgets[] = { SND_SOC_DAPM_MIXER("Speaker Mixer", NAU8810_REG_POWER3, NAU8810_SPKMX_EN_SFT, 0, &nau8810_speaker_mixer_controls[0], @@ -425,6 +450,8 @@ static const struct snd_soc_dapm_widget nau8810_dapm_widgets[] = { SND_SOC_DAPM_MIXER("Input Boost Stage", NAU8810_REG_POWER2, NAU8810_BST_EN_SFT, 0, nau8810_pgaboost_mixer_controls, ARRAY_SIZE(nau8810_pgaboost_mixer_controls)), + SND_SOC_DAPM_PGA("AUX Input", NAU8810_REG_POWER1, + NAU8810_AUX_EN_SFT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("Mic Bias", NAU8810_REG_POWER1, NAU8810_MICBIAS_EN_SFT, 0, NULL, 0), @@ -434,6 +461,7 @@ static const struct snd_soc_dapm_widget nau8810_dapm_widgets[] = { SND_SOC_DAPM_SWITCH("Digital Loopback", SND_SOC_NOPM, 0, 0, &nau8810_loopback), + SND_SOC_DAPM_INPUT("AUX"), SND_SOC_DAPM_INPUT("MICN"), SND_SOC_DAPM_INPUT("MICP"), SND_SOC_DAPM_OUTPUT("MONOOUT"), @@ -445,10 +473,12 @@ static const struct snd_soc_dapm_route nau8810_dapm_routes[] = { {"DAC", NULL, "PLL", check_mclk_select_pll}, /* Mono output mixer */ + {"Mono Mixer", "AUX Bypass Switch", "AUX Input"}, {"Mono Mixer", "PCM Playback Switch", "DAC"}, {"Mono Mixer", "Line Bypass Switch", "Input Boost Stage"}, /* Speaker output mixer */ + {"Speaker Mixer", "AUX Bypass Switch", "AUX Input"}, {"Speaker Mixer", "PCM Playback Switch", "DAC"}, {"Speaker Mixer", "Line Bypass Switch", "Input Boost Stage"}, @@ -463,13 +493,16 @@ static const struct snd_soc_dapm_route nau8810_dapm_routes[] = { /* Input Boost Stage */ {"ADC", NULL, "Input Boost Stage"}, {"ADC", NULL, "PLL", check_mclk_select_pll}, + {"Input Boost Stage", "AUX PGA Switch", "AUX Input"}, {"Input Boost Stage", "PGA Mute Switch", "Input PGA"}, {"Input Boost Stage", "PMIC PGA Switch", "MICP"}, /* Input PGA */ - {"Input PGA", NULL, "Mic Bias"}, + {"Input PGA", NULL, "Mic Bias", check_mic_enabled}, + {"Input PGA", "AUX Switch", "AUX Input"}, {"Input PGA", "MicN Switch", "MICN"}, {"Input PGA", "MicP Switch", "MICP"}, + {"AUX Input", NULL, "AUX"}, /* Digital Looptack */ {"Digital Loopback", "Switch", "ADC"}, @@ -862,6 +895,8 @@ static int nau8810_i2c_probe(struct i2c_client *i2c, static const struct i2c_device_id nau8810_i2c_id[] = { { "nau8810", 0 }, + { "nau8812", 0 }, + { "nau8814", 0 }, { } }; MODULE_DEVICE_TABLE(i2c, nau8810_i2c_id); @@ -869,6 +904,8 @@ MODULE_DEVICE_TABLE(i2c, nau8810_i2c_id); #ifdef CONFIG_OF static const struct of_device_id nau8810_of_match[] = { { .compatible = "nuvoton,nau8810", }, + { .compatible = "nuvoton,nau8812", }, + { .compatible = "nuvoton,nau8814", }, { } }; MODULE_DEVICE_TABLE(of, nau8810_of_match); diff --git a/sound/soc/codecs/nau8810.h b/sound/soc/codecs/nau8810.h index 1ada31883dc6..6a7cacbe044a 100644 --- a/sound/soc/codecs/nau8810.h +++ b/sound/soc/codecs/nau8810.h @@ -69,6 +69,7 @@ /* NAU8810_REG_POWER1 (0x1) */ #define NAU8810_DCBUF_EN (0x1 << 8) +#define NAU8810_AUX_EN_SFT 6 #define NAU8810_PLL_EN_SFT 5 #define NAU8810_MICBIAS_EN_SFT 4 #define NAU8810_ABIAS_EN (0x1 << 3) @@ -228,7 +229,10 @@ /* NAU8810_REG_INPUT_SIGNAL (0x2C) */ #define NAU8810_PMICPGA_SFT 0 +#define NAU8810_PMICPGA_EN (0x1 << NAU8810_PMICPGA_SFT) #define NAU8810_NMICPGA_SFT 1 +#define NAU8810_NMICPGA_EN (0x1 << NAU8810_NMICPGA_SFT) +#define NAU8810_AUXPGA_SFT 2 /* NAU8810_REG_PGAGAIN (0x2D) */ #define NAU8810_PGAGAIN_SFT 0 @@ -236,12 +240,15 @@ #define NAU8810_PGAZC_SFT 7 /* NAU8810_REG_ADCBOOST (0x2F) */ +#define NAU8810_AUXBSTGAIN_SFT 0 #define NAU8810_PMICBSTGAIN_SFT 4 +#define NAU8810_PMICBSTGAIN_MASK (0x7 << NAU8810_PMICBSTGAIN_SFT) #define NAU8810_PGABST_SFT 8 /* NAU8810_REG_SPKMIX (0x32) */ #define NAU8810_DACSPK_SFT 0 #define NAU8810_BYPSPK_SFT 1 +#define NAU8810_AUXSPK_SFT 5 /* NAU8810_REG_SPKGAIN (0x36) */ #define NAU8810_SPKGAIN_SFT 0 @@ -251,6 +258,7 @@ /* NAU8810_REG_MONOMIX (0x38) */ #define NAU8810_DACMOUT_SFT 0 #define NAU8810_BYPMOUT_SFT 1 +#define NAU8810_AUXMOUT_SFT 2 #define NAU8810_MOUTMXMT_SFT 6 diff --git a/sound/soc/codecs/rl6231.c b/sound/soc/codecs/rl6231.c index d181c217d835..2586d1cafc0c 100644 --- a/sound/soc/codecs/rl6231.c +++ b/sound/soc/codecs/rl6231.c @@ -97,12 +97,13 @@ struct pll_calc_map { int n; int m; bool m_bp; + bool k_bp; }; static const struct pll_calc_map pll_preset_table[] = { - {19200000, 4096000, 23, 14, 1, false}, - {19200000, 24576000, 3, 30, 3, false}, - {3840000, 24576000, 3, 30, 0, true}, + {19200000, 4096000, 23, 14, 1, false, false}, + {19200000, 24576000, 3, 30, 3, false, false}, + {3840000, 24576000, 3, 30, 0, true, false}, }; static unsigned int find_best_div(unsigned int in, @@ -128,7 +129,7 @@ static unsigned int find_best_div(unsigned int in, * rl6231_pll_calc - Calcualte PLL M/N/K code. * @freq_in: external clock provided to codec. * @freq_out: target clock which codec works on. - * @pll_code: Pointer to structure with M, N, K and bypass flag. + * @pll_code: Pointer to structure with M, N, K, m_bypass and k_bypass flag. * * Calcualte M/N/K code to configure PLL for codec. * @@ -143,7 +144,7 @@ int rl6231_pll_calc(const unsigned int freq_in, unsigned int red, pll_out, in_t, out_t, div, div_t; unsigned int red_t = abs(freq_out - freq_in); unsigned int f_in, f_out, f_max; - bool bypass = false; + bool m_bypass = false, k_bypass = false; if (RL6231_PLL_INP_MAX < freq_in || RL6231_PLL_INP_MIN > freq_in) return -EINVAL; @@ -154,7 +155,8 @@ int rl6231_pll_calc(const unsigned int freq_in, k = pll_preset_table[i].k; m = pll_preset_table[i].m; n = pll_preset_table[i].n; - bypass = pll_preset_table[i].m_bp; + m_bypass = pll_preset_table[i].m_bp; + k_bypass = pll_preset_table[i].k_bp; pr_debug("Use preset PLL parameter table\n"); goto code_find; } @@ -172,12 +174,14 @@ int rl6231_pll_calc(const unsigned int freq_in, f_in = freq_in / div; f_out = freq_out / div; k = min_k; + if (min_k < -1) + min_k = -1; for (k_t = min_k; k_t <= max_k; k_t++) { for (n_t = 0; n_t <= max_n; n_t++) { in_t = f_in * (n_t + 2); pll_out = f_out * (k_t + 2); if (in_t == pll_out) { - bypass = true; + m_bypass = true; n = n_t; k = k_t; goto code_find; @@ -185,7 +189,7 @@ int rl6231_pll_calc(const unsigned int freq_in, out_t = in_t / (k_t + 2); red = abs(f_out - out_t); if (red < red_t) { - bypass = true; + m_bypass = true; n = n_t; m = 0; k = k_t; @@ -197,7 +201,7 @@ int rl6231_pll_calc(const unsigned int freq_in, out_t = in_t / ((m_t + 2) * (k_t + 2)); red = abs(f_out - out_t); if (red < red_t) { - bypass = false; + m_bypass = false; n = n_t; m = m_t; k = k_t; @@ -211,8 +215,13 @@ int rl6231_pll_calc(const unsigned int freq_in, pr_debug("Only get approximation about PLL\n"); code_find: + if (k == -1) { + k_bypass = true; + k = 0; + } - pll_code->m_bp = bypass; + pll_code->m_bp = m_bypass; + pll_code->k_bp = k_bypass; pll_code->m_code = m; pll_code->n_code = n; pll_code->k_code = k; diff --git a/sound/soc/codecs/rl6231.h b/sound/soc/codecs/rl6231.h index 6d8ed0377296..928082750860 100644 --- a/sound/soc/codecs/rl6231.h +++ b/sound/soc/codecs/rl6231.h @@ -18,6 +18,7 @@ struct rl6231_pll_code { bool m_bp; /* Indicates bypass m code or not. */ + bool k_bp; /* Indicates bypass k code or not. */ int m_code; int n_code; int k_code; diff --git a/sound/soc/codecs/rt1015.c b/sound/soc/codecs/rt1015.c index bb310bc7febd..67e2e944d21b 100644 --- a/sound/soc/codecs/rt1015.c +++ b/sound/soc/codecs/rt1015.c @@ -475,7 +475,7 @@ static int rt1015_bypass_boost_put(struct snd_kcontrol *kcontrol, snd_soc_component_write(component, RT1015_CLSD_INTERNAL9, 0x0140); snd_soc_component_write(component, - RT1015_GAT_BOOST, 0x00fe); + RT1015_GAT_BOOST, 0x0efe); snd_soc_component_write(component, RT1015_PWR_STATE_CTRL, 0x000d); msleep(500); @@ -780,6 +780,14 @@ static int rt1015_set_component_pll(struct snd_soc_component *component, freq_out == rt1015->pll_out) return 0; + if (source == RT1015_PLL_S_BCLK) { + if (rt1015->bclk_ratio == 0) { + dev_err(component->dev, + "Can not support bclk ratio as 0.\n"); + return -EINVAL; + } + } + switch (source) { case RT1015_PLL_S_MCLK: snd_soc_component_update_bits(component, RT1015_CLK2, @@ -819,12 +827,30 @@ static int rt1015_set_component_pll(struct snd_soc_component *component, return 0; } +static int rt1015_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio) +{ + struct snd_soc_component *component = dai->component; + struct rt1015_priv *rt1015 = snd_soc_component_get_drvdata(component); + + dev_dbg(component->dev, "%s ratio=%d\n", __func__, ratio); + + rt1015->bclk_ratio = ratio; + + if (ratio == 50) { + dev_dbg(component->dev, "Unsupport bclk ratio\n"); + return -EINVAL; + } + + return 0; +} + static int rt1015_probe(struct snd_soc_component *component) { struct rt1015_priv *rt1015 = snd_soc_component_get_drvdata(component); rt1015->component = component; + rt1015->bclk_ratio = 0; snd_soc_component_write(component, RT1015_BAT_RPO_STEP1, 0x061c); return 0; @@ -844,6 +870,7 @@ static void rt1015_remove(struct snd_soc_component *component) static struct snd_soc_dai_ops rt1015_aif_dai_ops = { .hw_params = rt1015_hw_params, .set_fmt = rt1015_set_dai_fmt, + .set_bclk_ratio = rt1015_set_bclk_ratio, }; static struct snd_soc_dai_driver rt1015_dai[] = { diff --git a/sound/soc/codecs/rt1015.h b/sound/soc/codecs/rt1015.h index ef3745a4faae..6fbe802082c4 100644 --- a/sound/soc/codecs/rt1015.h +++ b/sound/soc/codecs/rt1015.h @@ -362,6 +362,7 @@ struct rt1015_priv { int sysclk_src; int lrck; int bclk; + int bclk_ratio; int id; int pll_src; int pll_in; diff --git a/sound/soc/codecs/rt1016.c b/sound/soc/codecs/rt1016.c new file mode 100644 index 000000000000..a23d368ab4da --- /dev/null +++ b/sound/soc/codecs/rt1016.c @@ -0,0 +1,695 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// rt1016.c -- RT1016 ALSA SoC audio amplifier driver +// +// Copyright 2020 Realtek Semiconductor Corp. +// Author: Oder Chiou <oder_chiou@realtek.com> +// + +#include <linux/fs.h> +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/pm.h> +#include <linux/regmap.h> +#include <linux/i2c.h> +#include <linux/platform_device.h> +#include <linux/firmware.h> +#include <linux/gpio.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <sound/initval.h> +#include <sound/tlv.h> + +#include "rl6231.h" +#include "rt1016.h" + +static const struct reg_sequence rt1016_patch[] = { + {RT1016_VOL_CTRL_3, 0x8900}, + {RT1016_ANA_CTRL_1, 0xa002}, + {RT1016_ANA_CTRL_2, 0x0002}, + {RT1016_CLOCK_4, 0x6700}, + {RT1016_CLASSD_3, 0xdc55}, + {RT1016_CLASSD_4, 0x376a}, + {RT1016_CLASSD_5, 0x009f}, +}; + +static const struct reg_default rt1016_reg[] = { + {0x00, 0x0000}, + {0x01, 0x5400}, + {0x02, 0x5506}, + {0x03, 0xf800}, + {0x04, 0x0000}, + {0x05, 0xbfbf}, + {0x06, 0x8900}, + {0x07, 0xa002}, + {0x08, 0x0000}, + {0x09, 0x0000}, + {0x0a, 0x0000}, + {0x0c, 0x0000}, + {0x0d, 0x0000}, + {0x0e, 0x10ec}, + {0x0f, 0x6595}, + {0x11, 0x0002}, + {0x1c, 0x0000}, + {0x1d, 0x0000}, + {0x1e, 0x0000}, + {0x1f, 0xf000}, + {0x20, 0x0000}, + {0x21, 0x6000}, + {0x22, 0x0000}, + {0x23, 0x6700}, + {0x24, 0x0000}, + {0x25, 0x0000}, + {0x26, 0x0000}, + {0x40, 0x0018}, + {0x60, 0x00a5}, + {0x80, 0x0010}, + {0x81, 0x0009}, + {0x82, 0x0000}, + {0x83, 0x0000}, + {0xa0, 0x0700}, + {0xc0, 0x0080}, + {0xc1, 0x02a0}, + {0xc2, 0x1400}, + {0xc3, 0x0a4a}, + {0xc4, 0x552a}, + {0xc5, 0x087e}, + {0xc6, 0x0020}, + {0xc7, 0xa833}, + {0xc8, 0x0433}, + {0xc9, 0x8040}, + {0xca, 0xdc55}, + {0xcb, 0x376a}, + {0xcc, 0x009f}, + {0xcf, 0x0020}, +}; + +static bool rt1016_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case RT1016_ANA_FLAG: + case RT1016_VERSION2_ID: + case RT1016_VERSION1_ID: + case RT1016_VENDER_ID: + case RT1016_DEVICE_ID: + case RT1016_TEST_SIGNAL: + case RT1016_SC_CTRL_1: + return true; + + default: + return false; + } +} + +static bool rt1016_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case RT1016_RESET: + case RT1016_PADS_CTRL_1: + case RT1016_PADS_CTRL_2: + case RT1016_I2C_CTRL: + case RT1016_VOL_CTRL_1: + case RT1016_VOL_CTRL_2: + case RT1016_VOL_CTRL_3: + case RT1016_ANA_CTRL_1: + case RT1016_MUX_SEL: + case RT1016_RX_I2S_CTRL: + case RT1016_ANA_FLAG: + case RT1016_VERSION2_ID: + case RT1016_VERSION1_ID: + case RT1016_VENDER_ID: + case RT1016_DEVICE_ID: + case RT1016_ANA_CTRL_2: + case RT1016_TEST_SIGNAL: + case RT1016_TEST_CTRL_1: + case RT1016_TEST_CTRL_2: + case RT1016_TEST_CTRL_3: + case RT1016_CLOCK_1: + case RT1016_CLOCK_2: + case RT1016_CLOCK_3: + case RT1016_CLOCK_4: + case RT1016_CLOCK_5: + case RT1016_CLOCK_6: + case RT1016_CLOCK_7: + case RT1016_I2S_CTRL: + case RT1016_DAC_CTRL_1: + case RT1016_SC_CTRL_1: + case RT1016_SC_CTRL_2: + case RT1016_SC_CTRL_3: + case RT1016_SC_CTRL_4: + case RT1016_SIL_DET: + case RT1016_SYS_CLK: + case RT1016_BIAS_CUR: + case RT1016_DAC_CTRL_2: + case RT1016_LDO_CTRL: + case RT1016_CLASSD_1: + case RT1016_PLL1: + case RT1016_PLL2: + case RT1016_PLL3: + case RT1016_CLASSD_2: + case RT1016_CLASSD_OUT: + case RT1016_CLASSD_3: + case RT1016_CLASSD_4: + case RT1016_CLASSD_5: + case RT1016_PWR_CTRL: + return true; + + default: + return false; + } +} + +static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -9550, 50, 0); + +static const struct snd_kcontrol_new rt1016_snd_controls[] = { + SOC_DOUBLE_TLV("DAC Playback Volume", RT1016_VOL_CTRL_2, + RT1016_L_VOL_SFT, RT1016_R_VOL_SFT, 191, 0, dac_vol_tlv), + SOC_DOUBLE("DAC Playback Switch", RT1016_VOL_CTRL_1, + RT1016_DA_MUTE_L_SFT, RT1016_DA_MUTE_R_SFT, 1, 1), +}; + +static int rt1016_is_sys_clk_from_pll(struct snd_soc_dapm_widget *source, + struct snd_soc_dapm_widget *sink) +{ + struct snd_soc_component *component = + snd_soc_dapm_to_component(source->dapm); + struct rt1016_priv *rt1016 = snd_soc_component_get_drvdata(component); + + if (rt1016->sysclk_src == RT1016_SCLK_S_PLL) + return 1; + else + return 0; +} + +/* Interface data select */ +static const char * const rt1016_data_select[] = { + "L/R", "R/L", "L/L", "R/R" +}; + +static SOC_ENUM_SINGLE_DECL(rt1016_if_data_swap_enum, + RT1016_I2S_CTRL, RT1016_I2S_DATA_SWAP_SFT, rt1016_data_select); + +static const struct snd_kcontrol_new rt1016_if_data_swap_mux = + SOC_DAPM_ENUM("Data Swap Mux", rt1016_if_data_swap_enum); + +static const struct snd_soc_dapm_widget rt1016_dapm_widgets[] = { + SND_SOC_DAPM_MUX("Data Swap Mux", SND_SOC_NOPM, 0, 0, + &rt1016_if_data_swap_mux), + + SND_SOC_DAPM_SUPPLY("DAC Filter", RT1016_CLOCK_3, + RT1016_PWR_DAC_FILTER_BIT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("DAMOD", RT1016_CLOCK_3, RT1016_PWR_DACMOD_BIT, 0, + NULL, 0), + SND_SOC_DAPM_SUPPLY("FIFO", RT1016_CLOCK_3, RT1016_PWR_CLK_FIFO_BIT, 0, + NULL, 0), + SND_SOC_DAPM_SUPPLY("Pure DC", RT1016_CLOCK_3, + RT1016_PWR_CLK_PUREDC_BIT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("CLK Silence Det", RT1016_CLOCK_3, + RT1016_PWR_SIL_DET_BIT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("RC 25M", RT1016_CLOCK_3, RT1016_PWR_RC_25M_BIT, 0, + NULL, 0), + SND_SOC_DAPM_SUPPLY("PLL1", RT1016_CLOCK_3, RT1016_PWR_PLL1_BIT, 0, + NULL, 0), + SND_SOC_DAPM_SUPPLY("ANA CTRL", RT1016_CLOCK_3, RT1016_PWR_ANA_CTRL_BIT, + 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("CLK SYS", RT1016_CLOCK_3, RT1016_PWR_CLK_SYS_BIT, + 0, NULL, 0), + + SND_SOC_DAPM_SUPPLY("LRCK Det", RT1016_CLOCK_4, RT1016_PWR_LRCK_DET_BIT, + 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("BCLK Det", RT1016_CLOCK_4, RT1016_PWR_BCLK_DET_BIT, + 0, NULL, 0), + + SND_SOC_DAPM_SUPPLY("CKGEN DAC", RT1016_DAC_CTRL_2, + RT1016_CKGEN_DAC_BIT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("VCM SLOW", RT1016_CLASSD_1, RT1016_VCM_SLOW_BIT, 0, + NULL, 0), + SND_SOC_DAPM_SUPPLY("Silence Det", RT1016_SIL_DET, + RT1016_SIL_DET_EN_BIT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("PLL2", RT1016_PLL2, RT1016_PLL2_EN_BIT, 0, NULL, + 0), + + SND_SOC_DAPM_SUPPLY_S("BG1 BG2", 1, RT1016_PWR_CTRL, + RT1016_PWR_BG_1_2_BIT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY_S("MBIAS BG", 1, RT1016_PWR_CTRL, + RT1016_PWR_MBIAS_BG_BIT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY_S("PLL", 1, RT1016_PWR_CTRL, RT1016_PWR_PLL_BIT, 0, + NULL, 0), + SND_SOC_DAPM_SUPPLY_S("BASIC", 1, RT1016_PWR_CTRL, RT1016_PWR_BASIC_BIT, + 0, NULL, 0), + SND_SOC_DAPM_SUPPLY_S("CLASS D", 1, RT1016_PWR_CTRL, + RT1016_PWR_CLSD_BIT, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY_S("25M", 1, RT1016_PWR_CTRL, RT1016_PWR_25M_BIT, 0, + NULL, 0), + SND_SOC_DAPM_SUPPLY_S("DACL", 1, RT1016_PWR_CTRL, RT1016_PWR_DACL_BIT, + 0, NULL, 0), + SND_SOC_DAPM_SUPPLY_S("DACR", 1, RT1016_PWR_CTRL, RT1016_PWR_DACR_BIT, + 0, NULL, 0), + SND_SOC_DAPM_SUPPLY_S("LDO2", 1, RT1016_PWR_CTRL, RT1016_PWR_LDO2_BIT, + 0, NULL, 0), + SND_SOC_DAPM_SUPPLY_S("VREF", 1, RT1016_PWR_CTRL, RT1016_PWR_VREF_BIT, + 0, NULL, 0), + SND_SOC_DAPM_SUPPLY_S("MBIAS", 1, RT1016_PWR_CTRL, RT1016_PWR_MBIAS_BIT, + 0, NULL, 0), + + SND_SOC_DAPM_AIF_IN("AIFRX", "AIF Playback", 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_DAC("DAC", NULL, SND_SOC_NOPM, 0, 0), + + SND_SOC_DAPM_OUTPUT("SPO"), +}; + +static const struct snd_soc_dapm_route rt1016_dapm_routes[] = { + { "Data Swap Mux", "L/R", "AIFRX" }, + { "Data Swap Mux", "R/L", "AIFRX" }, + { "Data Swap Mux", "L/L", "AIFRX" }, + { "Data Swap Mux", "R/R", "AIFRX" }, + + { "DAC", NULL, "DAC Filter" }, + { "DAC", NULL, "DAMOD" }, + { "DAC", NULL, "FIFO" }, + { "DAC", NULL, "Pure DC" }, + { "DAC", NULL, "Silence Det" }, + { "DAC", NULL, "ANA CTRL" }, + { "DAC", NULL, "CLK SYS" }, + { "DAC", NULL, "LRCK Det" }, + { "DAC", NULL, "BCLK Det" }, + { "DAC", NULL, "CKGEN DAC" }, + { "DAC", NULL, "VCM SLOW" }, + + { "PLL", NULL, "PLL1" }, + { "PLL", NULL, "PLL2" }, + { "25M", NULL, "RC 25M" }, + { "Silence Det", NULL, "CLK Silence Det" }, + + { "DAC", NULL, "Data Swap Mux" }, + { "DAC", NULL, "BG1 BG2" }, + { "DAC", NULL, "MBIAS BG" }, + { "DAC", NULL, "PLL", rt1016_is_sys_clk_from_pll}, + { "DAC", NULL, "BASIC" }, + { "DAC", NULL, "CLASS D" }, + { "DAC", NULL, "25M" }, + { "DAC", NULL, "DACL" }, + { "DAC", NULL, "DACR" }, + { "DAC", NULL, "LDO2" }, + { "DAC", NULL, "VREF" }, + { "DAC", NULL, "MBIAS" }, + + { "SPO", NULL, "DAC" }, +}; + +static int rt1016_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) +{ + struct snd_soc_component *component = dai->component; + struct rt1016_priv *rt1016 = snd_soc_component_get_drvdata(component); + int pre_div, bclk_ms, frame_size; + unsigned int val_len = 0; + + rt1016->lrck = params_rate(params); + pre_div = rl6231_get_clk_info(rt1016->sysclk, rt1016->lrck); + if (pre_div < 0) { + dev_err(component->dev, "Unsupported clock rate\n"); + return -EINVAL; + } + + frame_size = snd_soc_params_to_frame_size(params); + if (frame_size < 0) { + dev_err(component->dev, "Unsupported frame size: %d\n", + frame_size); + return -EINVAL; + } + + bclk_ms = frame_size > 32; + rt1016->bclk = rt1016->lrck * (32 << bclk_ms); + + if (bclk_ms && rt1016->master) + snd_soc_component_update_bits(component, RT1016_I2S_CTRL, + RT1016_I2S_BCLK_MS_MASK, RT1016_I2S_BCLK_MS_64); + + dev_dbg(component->dev, "lrck is %dHz and pre_div is %d for iis %d\n", + rt1016->lrck, pre_div, dai->id); + + switch (params_width(params)) { + case 16: + val_len = RT1016_I2S_DL_16; + break; + case 20: + val_len = RT1016_I2S_DL_20; + break; + case 24: + val_len = RT1016_I2S_DL_24; + break; + case 32: + val_len = RT1016_I2S_DL_32; + break; + default: + return -EINVAL; + } + + snd_soc_component_update_bits(component, RT1016_I2S_CTRL, + RT1016_I2S_DL_MASK, val_len); + snd_soc_component_update_bits(component, RT1016_CLOCK_2, + RT1016_FS_PD_MASK | RT1016_OSR_PD_MASK, + ((pre_div + 3) << RT1016_FS_PD_SFT) | + (pre_div << RT1016_OSR_PD_SFT)); + + return 0; +} + +static int rt1016_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) +{ + struct snd_soc_component *component = dai->component; + struct rt1016_priv *rt1016 = snd_soc_component_get_drvdata(component); + unsigned int reg_val = 0; + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + reg_val |= RT1016_I2S_MS_M; + rt1016->master = 1; + break; + case SND_SOC_DAIFMT_CBS_CFS: + reg_val |= RT1016_I2S_MS_S; + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_IB_NF: + reg_val |= RT1016_I2S_BCLK_POL_INV; + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + break; + + case SND_SOC_DAIFMT_LEFT_J: + reg_val |= RT1016_I2S_DF_LEFT; + break; + + case SND_SOC_DAIFMT_DSP_A: + reg_val |= RT1016_I2S_DF_PCM_A; + break; + + case SND_SOC_DAIFMT_DSP_B: + reg_val |= RT1016_I2S_DF_PCM_B; + break; + + default: + return -EINVAL; + } + + snd_soc_component_update_bits(component, RT1016_I2S_CTRL, + RT1016_I2S_MS_MASK | RT1016_I2S_BCLK_POL_MASK | + RT1016_I2S_DF_MASK, reg_val); + + return 0; +} + +static int rt1016_set_component_sysclk(struct snd_soc_component *component, + int clk_id, int source, unsigned int freq, int dir) +{ + struct rt1016_priv *rt1016 = snd_soc_component_get_drvdata(component); + unsigned int reg_val = 0; + + if (freq == rt1016->sysclk && clk_id == rt1016->sysclk_src) + return 0; + + switch (clk_id) { + case RT1016_SCLK_S_MCLK: + reg_val |= RT1016_CLK_SYS_SEL_MCLK; + break; + + case RT1016_SCLK_S_PLL: + reg_val |= RT1016_CLK_SYS_SEL_PLL; + break; + + default: + dev_err(component->dev, "Invalid clock id (%d)\n", clk_id); + return -EINVAL; + } + + rt1016->sysclk = freq; + rt1016->sysclk_src = clk_id; + + dev_dbg(component->dev, "Sysclk is %dHz and clock id is %d\n", + freq, clk_id); + + snd_soc_component_update_bits(component, RT1016_CLOCK_1, + RT1016_CLK_SYS_SEL_MASK, reg_val); + + return 0; +} + +static int rt1016_set_component_pll(struct snd_soc_component *component, + int pll_id, int source, unsigned int freq_in, + unsigned int freq_out) +{ + struct rt1016_priv *rt1016 = snd_soc_component_get_drvdata(component); + struct rl6231_pll_code pll_code; + int ret; + + if (!freq_in || !freq_out) { + dev_dbg(component->dev, "PLL disabled\n"); + + rt1016->pll_in = 0; + rt1016->pll_out = 0; + + return 0; + } + + if (source == rt1016->pll_src && freq_in == rt1016->pll_in && + freq_out == rt1016->pll_out) + return 0; + + switch (source) { + case RT1016_PLL_S_MCLK: + snd_soc_component_update_bits(component, RT1016_CLOCK_1, + RT1016_PLL_SEL_MASK, RT1016_PLL_SEL_MCLK); + break; + + case RT1016_PLL_S_BCLK: + snd_soc_component_update_bits(component, RT1016_CLOCK_1, + RT1016_PLL_SEL_MASK, RT1016_PLL_SEL_BCLK); + break; + + default: + dev_err(component->dev, "Unknown PLL Source %d\n", source); + return -EINVAL; + } + + ret = rl6231_pll_calc(freq_in, freq_out * 4, &pll_code); + if (ret < 0) { + dev_err(component->dev, "Unsupport input clock %d\n", freq_in); + return ret; + } + + dev_dbg(component->dev, "mbypass=%d m=%d n=%d kbypass=%d k=%d\n", + pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code), + pll_code.n_code, pll_code.k_bp, + (pll_code.k_bp ? 0 : pll_code.k_code)); + + snd_soc_component_write(component, RT1016_PLL1, + (pll_code.m_bp ? 0 : pll_code.m_code) << RT1016_PLL_M_SFT | + pll_code.m_bp << RT1016_PLL_M_BP_SFT | pll_code.n_code); + snd_soc_component_write(component, RT1016_PLL2, + pll_code.k_bp << RT1016_PLL_K_BP_SFT | + (pll_code.k_bp ? 0 : pll_code.k_code)); + + rt1016->pll_in = freq_in; + rt1016->pll_out = freq_out; + rt1016->pll_src = source; + + return 0; +} + +static int rt1016_probe(struct snd_soc_component *component) +{ + struct rt1016_priv *rt1016 = + snd_soc_component_get_drvdata(component); + + rt1016->component = component; + + return 0; +} + +static void rt1016_remove(struct snd_soc_component *component) +{ + struct rt1016_priv *rt1016 = snd_soc_component_get_drvdata(component); + + regmap_write(rt1016->regmap, RT1016_RESET, 0); +} + +#define RT1016_STEREO_RATES SNDRV_PCM_RATE_8000_48000 +#define RT1016_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) + +static struct snd_soc_dai_ops rt1016_aif_dai_ops = { + .hw_params = rt1016_hw_params, + .set_fmt = rt1016_set_dai_fmt, +}; + +static struct snd_soc_dai_driver rt1016_dai[] = { + { + .name = "rt1016-aif", + .id = 0, + .playback = { + .stream_name = "AIF Playback", + .channels_min = 1, + .channels_max = 2, + .rates = RT1016_STEREO_RATES, + .formats = RT1016_FORMATS, + }, + .ops = &rt1016_aif_dai_ops, + } +}; + +#ifdef CONFIG_PM +static int rt1016_suspend(struct snd_soc_component *component) +{ + struct rt1016_priv *rt1016 = snd_soc_component_get_drvdata(component); + + regcache_cache_only(rt1016->regmap, true); + regcache_mark_dirty(rt1016->regmap); + + return 0; +} + +static int rt1016_resume(struct snd_soc_component *component) +{ + struct rt1016_priv *rt1016 = snd_soc_component_get_drvdata(component); + + regcache_cache_only(rt1016->regmap, false); + regcache_sync(rt1016->regmap); + + return 0; +} +#else +#define rt1016_suspend NULL +#define rt1016_resume NULL +#endif + +static const struct snd_soc_component_driver soc_component_dev_rt1016 = { + .probe = rt1016_probe, + .remove = rt1016_remove, + .suspend = rt1016_suspend, + .resume = rt1016_resume, + .controls = rt1016_snd_controls, + .num_controls = ARRAY_SIZE(rt1016_snd_controls), + .dapm_widgets = rt1016_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(rt1016_dapm_widgets), + .dapm_routes = rt1016_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(rt1016_dapm_routes), + .set_sysclk = rt1016_set_component_sysclk, + .set_pll = rt1016_set_component_pll, + .use_pmdown_time = 1, + .endianness = 1, + .non_legacy_dai_naming = 1, +}; + +static const struct regmap_config rt1016_regmap = { + .reg_bits = 8, + .val_bits = 16, + .max_register = RT1016_PWR_CTRL, + .volatile_reg = rt1016_volatile_register, + .readable_reg = rt1016_readable_register, + .cache_type = REGCACHE_RBTREE, + .reg_defaults = rt1016_reg, + .num_reg_defaults = ARRAY_SIZE(rt1016_reg), +}; + +static const struct i2c_device_id rt1016_i2c_id[] = { + { "rt1016", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, rt1016_i2c_id); + +#if defined(CONFIG_OF) +static const struct of_device_id rt1016_of_match[] = { + { .compatible = "realtek,rt1016", }, + {}, +}; +MODULE_DEVICE_TABLE(of, rt1016_of_match); +#endif + +#ifdef CONFIG_ACPI +static struct acpi_device_id rt1016_acpi_match[] = { + {"10EC1016", 0,}, + {}, +}; +MODULE_DEVICE_TABLE(acpi, rt1016_acpi_match); +#endif + +static int rt1016_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct rt1016_priv *rt1016; + int ret; + unsigned int val; + + rt1016 = devm_kzalloc(&i2c->dev, sizeof(struct rt1016_priv), + GFP_KERNEL); + if (rt1016 == NULL) + return -ENOMEM; + + i2c_set_clientdata(i2c, rt1016); + + rt1016->regmap = devm_regmap_init_i2c(i2c, &rt1016_regmap); + if (IS_ERR(rt1016->regmap)) { + ret = PTR_ERR(rt1016->regmap); + dev_err(&i2c->dev, "Failed to allocate register map: %d\n", + ret); + return ret; + } + + regmap_read(rt1016->regmap, RT1016_DEVICE_ID, &val); + if (val != RT1016_DEVICE_ID_VAL) { + dev_err(&i2c->dev, + "Device with ID register %x is not rt1016\n", val); + return -ENODEV; + } + + regmap_write(rt1016->regmap, RT1016_RESET, 0); + + ret = regmap_register_patch(rt1016->regmap, rt1016_patch, + ARRAY_SIZE(rt1016_patch)); + if (ret != 0) + dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret); + + return devm_snd_soc_register_component(&i2c->dev, + &soc_component_dev_rt1016, + rt1016_dai, ARRAY_SIZE(rt1016_dai)); +} + +static void rt1016_i2c_shutdown(struct i2c_client *client) +{ + struct rt1016_priv *rt1016 = i2c_get_clientdata(client); + + regmap_write(rt1016->regmap, RT1016_RESET, 0); +} + +static struct i2c_driver rt1016_i2c_driver = { + .driver = { + .name = "rt1016", + .of_match_table = of_match_ptr(rt1016_of_match), + .acpi_match_table = ACPI_PTR(rt1016_acpi_match), + }, + .probe = rt1016_i2c_probe, + .shutdown = rt1016_i2c_shutdown, + .id_table = rt1016_i2c_id, +}; +module_i2c_driver(rt1016_i2c_driver); + +MODULE_DESCRIPTION("ASoC RT1016 driver"); +MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>"); +MODULE_LICENSE("GPL v2"); diff --git a/sound/soc/codecs/rt1016.h b/sound/soc/codecs/rt1016.h new file mode 100644 index 000000000000..041d6a5a6f46 --- /dev/null +++ b/sound/soc/codecs/rt1016.h @@ -0,0 +1,232 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * rt1016.h -- RT1016 ALSA SoC audio amplifier driver + * + * Copyright 2020 Realtek Semiconductor Corp. + * Author: Oder Chiou <oder_chiou@realtek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __RT1016_H__ +#define __RT1016_H__ + +#define RT1016_DEVICE_ID_VAL 0x6595 + +#define RT1016_RESET 0x00 +#define RT1016_PADS_CTRL_1 0x01 +#define RT1016_PADS_CTRL_2 0x02 +#define RT1016_I2C_CTRL 0x03 +#define RT1016_VOL_CTRL_1 0x04 +#define RT1016_VOL_CTRL_2 0x05 +#define RT1016_VOL_CTRL_3 0x06 +#define RT1016_ANA_CTRL_1 0x07 +#define RT1016_MUX_SEL 0x08 +#define RT1016_RX_I2S_CTRL 0x09 +#define RT1016_ANA_FLAG 0x0a +#define RT1016_VERSION2_ID 0x0c +#define RT1016_VERSION1_ID 0x0d +#define RT1016_VENDER_ID 0x0e +#define RT1016_DEVICE_ID 0x0f +#define RT1016_ANA_CTRL_2 0x11 +#define RT1016_TEST_SIGNAL 0x1c +#define RT1016_TEST_CTRL_1 0x1d +#define RT1016_TEST_CTRL_2 0x1e +#define RT1016_TEST_CTRL_3 0x1f +#define RT1016_CLOCK_1 0x20 +#define RT1016_CLOCK_2 0x21 +#define RT1016_CLOCK_3 0x22 +#define RT1016_CLOCK_4 0x23 +#define RT1016_CLOCK_5 0x24 +#define RT1016_CLOCK_6 0x25 +#define RT1016_CLOCK_7 0x26 +#define RT1016_I2S_CTRL 0x40 +#define RT1016_DAC_CTRL_1 0x60 +#define RT1016_SC_CTRL_1 0x80 +#define RT1016_SC_CTRL_2 0x81 +#define RT1016_SC_CTRL_3 0x82 +#define RT1016_SC_CTRL_4 0x83 +#define RT1016_SIL_DET 0xa0 +#define RT1016_SYS_CLK 0xc0 +#define RT1016_BIAS_CUR 0xc1 +#define RT1016_DAC_CTRL_2 0xc2 +#define RT1016_LDO_CTRL 0xc3 +#define RT1016_CLASSD_1 0xc4 +#define RT1016_PLL1 0xc5 +#define RT1016_PLL2 0xc6 +#define RT1016_PLL3 0xc7 +#define RT1016_CLASSD_2 0xc8 +#define RT1016_CLASSD_OUT 0xc9 +#define RT1016_CLASSD_3 0xca +#define RT1016_CLASSD_4 0xcb +#define RT1016_CLASSD_5 0xcc +#define RT1016_PWR_CTRL 0xcf + +/* global definition */ +#define RT1016_L_VOL_MASK (0xff << 8) +#define RT1016_L_VOL_SFT 8 +#define RT1016_R_VOL_MASK (0xff) +#define RT1016_R_VOL_SFT 0 + +/* 0x04 */ +#define RT1016_DA_MUTE_L_SFT 7 +#define RT1016_DA_MUTE_R_SFT 6 + +/* 0x20 */ +#define RT1016_CLK_SYS_SEL_MASK (0x1 << 15) +#define RT1016_CLK_SYS_SEL_SFT 15 +#define RT1016_CLK_SYS_SEL_MCLK (0x0 << 15) +#define RT1016_CLK_SYS_SEL_PLL (0x1 << 15) +#define RT1016_PLL_SEL_MASK (0x1 << 13) +#define RT1016_PLL_SEL_SFT 13 +#define RT1016_PLL_SEL_MCLK (0x0 << 13) +#define RT1016_PLL_SEL_BCLK (0x1 << 13) + +/* 0x21 */ +#define RT1016_FS_PD_MASK (0x7 << 13) +#define RT1016_FS_PD_SFT 13 +#define RT1016_OSR_PD_MASK (0x3 << 10) +#define RT1016_OSR_PD_SFT 10 + +/* 0x22 */ +#define RT1016_PWR_DAC_FILTER (0x1 << 11) +#define RT1016_PWR_DAC_FILTER_BIT 11 +#define RT1016_PWR_DACMOD (0x1 << 10) +#define RT1016_PWR_DACMOD_BIT 10 +#define RT1016_PWR_CLK_FIFO (0x1 << 9) +#define RT1016_PWR_CLK_FIFO_BIT 9 +#define RT1016_PWR_CLK_PUREDC (0x1 << 8) +#define RT1016_PWR_CLK_PUREDC_BIT 8 +#define RT1016_PWR_SIL_DET (0x1 << 7) +#define RT1016_PWR_SIL_DET_BIT 7 +#define RT1016_PWR_RC_25M (0x1 << 6) +#define RT1016_PWR_RC_25M_BIT 6 +#define RT1016_PWR_PLL1 (0x1 << 5) +#define RT1016_PWR_PLL1_BIT 5 +#define RT1016_PWR_ANA_CTRL (0x1 << 4) +#define RT1016_PWR_ANA_CTRL_BIT 4 +#define RT1016_PWR_CLK_SYS (0x1 << 3) +#define RT1016_PWR_CLK_SYS_BIT 3 + +/* 0x23 */ +#define RT1016_PWR_LRCK_DET (0x1 << 15) +#define RT1016_PWR_LRCK_DET_BIT 15 +#define RT1016_PWR_BCLK_DET (0x1 << 11) +#define RT1016_PWR_BCLK_DET_BIT 11 + +/* 0x40 */ +#define RT1016_I2S_BCLK_MS_MASK (0x1 << 15) +#define RT1016_I2S_BCLK_MS_SFT 15 +#define RT1016_I2S_BCLK_MS_32 (0x0 << 15) +#define RT1016_I2S_BCLK_MS_64 (0x1 << 15) +#define RT1016_I2S_BCLK_POL_MASK (0x1 << 13) +#define RT1016_I2S_BCLK_POL_SFT 13 +#define RT1016_I2S_BCLK_POL_NOR (0x0 << 13) +#define RT1016_I2S_BCLK_POL_INV (0x1 << 13) +#define RT1016_I2S_DATA_SWAP_MASK (0x1 << 10) +#define RT1016_I2S_DATA_SWAP_SFT 10 +#define RT1016_I2S_DL_MASK (0x7 << 4) +#define RT1016_I2S_DL_SFT 4 +#define RT1016_I2S_DL_16 (0x1 << 4) +#define RT1016_I2S_DL_20 (0x2 << 4) +#define RT1016_I2S_DL_24 (0x3 << 4) +#define RT1016_I2S_DL_32 (0x4 << 4) +#define RT1016_I2S_MS_MASK (0x1 << 3) +#define RT1016_I2S_MS_SFT 3 +#define RT1016_I2S_MS_M (0x0 << 3) +#define RT1016_I2S_MS_S (0x1 << 3) +#define RT1016_I2S_DF_MASK (0x7 << 0) +#define RT1016_I2S_DF_SFT 0 +#define RT1016_I2S_DF_I2S (0x0) +#define RT1016_I2S_DF_LEFT (0x1) +#define RT1016_I2S_DF_PCM_A (0x2) +#define RT1016_I2S_DF_PCM_B (0x3) + +/* 0xa0 */ +#define RT1016_SIL_DET_EN (0x1 << 15) +#define RT1016_SIL_DET_EN_BIT 15 + +/* 0xc2 */ +#define RT1016_CKGEN_DAC (0x1 << 13) +#define RT1016_CKGEN_DAC_BIT 13 + +/* 0xc4 */ +#define RT1016_VCM_SLOW (0x1 << 6) +#define RT1016_VCM_SLOW_BIT 6 + +/* 0xc5 */ +#define RT1016_PLL_M_MAX 0xf +#define RT1016_PLL_M_MASK (RT1016_PLL_M_MAX << 12) +#define RT1016_PLL_M_SFT 12 +#define RT1016_PLL_M_BP (0x1 << 11) +#define RT1016_PLL_M_BP_SFT 11 +#define RT1016_PLL_N_MAX 0x1ff +#define RT1016_PLL_N_MASK (RT1016_PLL_N_MAX << 0) +#define RT1016_PLL_N_SFT 0 + +/* 0xc6 */ +#define RT1016_PLL2_EN (0x1 << 15) +#define RT1016_PLL2_EN_BIT 15 +#define RT1016_PLL_K_BP (0x1 << 5) +#define RT1016_PLL_K_BP_SFT 5 +#define RT1016_PLL_K_MAX 0x1f +#define RT1016_PLL_K_MASK (RT1016_PLL_K_MAX) +#define RT1016_PLL_K_SFT 0 + +/* 0xcf */ +#define RT1016_PWR_BG_1_2 (0x1 << 12) +#define RT1016_PWR_BG_1_2_BIT 12 +#define RT1016_PWR_MBIAS_BG (0x1 << 11) +#define RT1016_PWR_MBIAS_BG_BIT 11 +#define RT1016_PWR_PLL (0x1 << 9) +#define RT1016_PWR_PLL_BIT 9 +#define RT1016_PWR_BASIC (0x1 << 8) +#define RT1016_PWR_BASIC_BIT 8 +#define RT1016_PWR_CLSD (0x1 << 7) +#define RT1016_PWR_CLSD_BIT 7 +#define RT1016_PWR_25M (0x1 << 6) +#define RT1016_PWR_25M_BIT 6 +#define RT1016_PWR_DACL (0x1 << 4) +#define RT1016_PWR_DACL_BIT 4 +#define RT1016_PWR_DACR (0x1 << 3) +#define RT1016_PWR_DACR_BIT 3 +#define RT1016_PWR_LDO2 (0x1 << 2) +#define RT1016_PWR_LDO2_BIT 2 +#define RT1016_PWR_VREF (0x1 << 1) +#define RT1016_PWR_VREF_BIT 1 +#define RT1016_PWR_MBIAS (0x1 << 0) +#define RT1016_PWR_MBIAS_BIT 0 + +/* System Clock Source */ +enum { + RT1016_SCLK_S_MCLK, + RT1016_SCLK_S_PLL, +}; + +/* PLL1 Source */ +enum { + RT1016_PLL_S_MCLK, + RT1016_PLL_S_BCLK, +}; + +enum { + RT1016_AIF1, + RT1016_AIFS, +}; + +struct rt1016_priv { + struct snd_soc_component *component; + struct regmap *regmap; + int sysclk; + int sysclk_src; + int lrck; + int bclk; + int master; + int pll_src; + int pll_in; + int pll_out; +}; + +#endif /* __RT1016_H__ */ diff --git a/sound/soc/codecs/rt1308-sdw.c b/sound/soc/codecs/rt1308-sdw.c index a5a7e46de246..b0ba0d2acbdd 100644 --- a/sound/soc/codecs/rt1308-sdw.c +++ b/sound/soc/codecs/rt1308-sdw.c @@ -178,10 +178,6 @@ static int rt1308_io_init(struct device *dev, struct sdw_slave *slave) if (rt1308->hw_init) return 0; - ret = rt1308_read_prop(slave); - if (ret < 0) - goto _io_init_err_; - if (rt1308->first_hw_init) { regcache_cache_only(rt1308->regmap, false); regcache_cache_bypass(rt1308->regmap, true); @@ -235,9 +231,9 @@ static int rt1308_io_init(struct device *dev, struct sdw_slave *slave) efuse_c_btl_r = tmp; regmap_read(rt1308->regmap, 0xc872, &tmp); efuse_c_btl_r = efuse_c_btl_r | (tmp << 8); - dev_info(&slave->dev, "%s m_btl_l=0x%x, m_btl_r=0x%x\n", __func__, + dev_dbg(&slave->dev, "%s m_btl_l=0x%x, m_btl_r=0x%x\n", __func__, efuse_m_btl_l, efuse_m_btl_r); - dev_info(&slave->dev, "%s c_btl_l=0x%x, c_btl_r=0x%x\n", __func__, + dev_dbg(&slave->dev, "%s c_btl_l=0x%x, c_btl_r=0x%x\n", __func__, efuse_c_btl_l, efuse_c_btl_r); /* initial settings */ @@ -282,7 +278,6 @@ static int rt1308_io_init(struct device *dev, struct sdw_slave *slave) dev_dbg(&slave->dev, "%s hw_init complete\n", __func__); -_io_init_err_: return ret; } @@ -482,6 +477,9 @@ static int rt1308_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream, { struct sdw_stream_data *stream; + if (!sdw_stream) + return 0; + stream = kzalloc(sizeof(*stream), GFP_KERNEL); if (!stream) return -ENOMEM; @@ -684,9 +682,6 @@ static int rt1308_sdw_probe(struct sdw_slave *slave, { struct regmap *regmap; - /* Assign ops */ - slave->ops = &rt1308_slave_ops; - /* Regmap Initialization */ regmap = devm_regmap_init_sdw(slave, &rt1308_sdw_regmap); if (!regmap) diff --git a/sound/soc/codecs/rt5677-spi.c b/sound/soc/codecs/rt5677-spi.c index 3f40d2751833..7bfade8b3d6e 100644 --- a/sound/soc/codecs/rt5677-spi.c +++ b/sound/soc/codecs/rt5677-spi.c @@ -605,20 +605,15 @@ static int rt5677_spi_probe(struct spi_device *spi) g_spi = spi; - ret = snd_soc_register_component(&spi->dev, &rt5677_spi_dai_component, - &rt5677_spi_dai, 1); + ret = devm_snd_soc_register_component(&spi->dev, + &rt5677_spi_dai_component, + &rt5677_spi_dai, 1); if (ret < 0) dev_err(&spi->dev, "Failed to register component.\n"); return ret; } -static int rt5677_spi_remove(struct spi_device *spi) -{ - snd_soc_unregister_component(&spi->dev); - return 0; -} - static const struct acpi_device_id rt5677_spi_acpi_id[] = { { "RT5677AA", 0 }, { } @@ -631,7 +626,6 @@ static struct spi_driver rt5677_spi_driver = { .acpi_match_table = ACPI_PTR(rt5677_spi_acpi_id), }, .probe = rt5677_spi_probe, - .remove = rt5677_spi_remove, }; module_spi_driver(rt5677_spi_driver); diff --git a/sound/soc/codecs/rt5682-i2c.c b/sound/soc/codecs/rt5682-i2c.c new file mode 100644 index 000000000000..e28d08b1cd65 --- /dev/null +++ b/sound/soc/codecs/rt5682-i2c.c @@ -0,0 +1,306 @@ +// SPDX-License-Identifier: GPL-2.0-only +// +// rt5682.c -- RT5682 ALSA SoC audio component driver +// +// Copyright 2018 Realtek Semiconductor Corp. +// Author: Bard Liao <bardliao@realtek.com> +// + +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/pm.h> +#include <linux/pm_runtime.h> +#include <linux/i2c.h> +#include <linux/platform_device.h> +#include <linux/spi/spi.h> +#include <linux/acpi.h> +#include <linux/gpio.h> +#include <linux/of_gpio.h> +#include <linux/mutex.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/jack.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <sound/initval.h> +#include <sound/tlv.h> +#include <sound/rt5682.h> + +#include "rl6231.h" +#include "rt5682.h" + +static const struct rt5682_platform_data i2s_default_platform_data = { + .dmic1_data_pin = RT5682_DMIC1_DATA_GPIO2, + .dmic1_clk_pin = RT5682_DMIC1_CLK_GPIO3, + .jd_src = RT5682_JD1, + .btndet_delay = 16, + .dai_clk_names[RT5682_DAI_WCLK_IDX] = "rt5682-dai-wclk", + .dai_clk_names[RT5682_DAI_BCLK_IDX] = "rt5682-dai-bclk", +}; + +static const struct regmap_config rt5682_regmap = { + .reg_bits = 16, + .val_bits = 16, + .max_register = RT5682_I2C_MODE, + .volatile_reg = rt5682_volatile_register, + .readable_reg = rt5682_readable_register, + .cache_type = REGCACHE_RBTREE, + .reg_defaults = rt5682_reg, + .num_reg_defaults = RT5682_REG_NUM, + .use_single_read = true, + .use_single_write = true, +}; + +static void rt5682_jd_check_handler(struct work_struct *work) +{ + struct rt5682_priv *rt5682 = container_of(work, struct rt5682_priv, + jd_check_work.work); + + if (snd_soc_component_read32(rt5682->component, RT5682_AJD1_CTRL) + & RT5682_JDH_RS_MASK) { + /* jack out */ + rt5682->jack_type = rt5682_headset_detect(rt5682->component, 0); + + snd_soc_jack_report(rt5682->hs_jack, rt5682->jack_type, + SND_JACK_HEADSET | + SND_JACK_BTN_0 | SND_JACK_BTN_1 | + SND_JACK_BTN_2 | SND_JACK_BTN_3); + } else { + schedule_delayed_work(&rt5682->jd_check_work, 500); + } +} + +static irqreturn_t rt5682_irq(int irq, void *data) +{ + struct rt5682_priv *rt5682 = data; + + mod_delayed_work(system_power_efficient_wq, + &rt5682->jack_detect_work, msecs_to_jiffies(250)); + + return IRQ_HANDLED; +} + +static struct snd_soc_dai_driver rt5682_dai[] = { + { + .name = "rt5682-aif1", + .id = RT5682_AIF1, + .playback = { + .stream_name = "AIF1 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = RT5682_STEREO_RATES, + .formats = RT5682_FORMATS, + }, + .capture = { + .stream_name = "AIF1 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = RT5682_STEREO_RATES, + .formats = RT5682_FORMATS, + }, + .ops = &rt5682_aif1_dai_ops, + }, + { + .name = "rt5682-aif2", + .id = RT5682_AIF2, + .capture = { + .stream_name = "AIF2 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = RT5682_STEREO_RATES, + .formats = RT5682_FORMATS, + }, + .ops = &rt5682_aif2_dai_ops, + }, +}; + +static int rt5682_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct rt5682_platform_data *pdata = dev_get_platdata(&i2c->dev); + struct rt5682_priv *rt5682; + int i, ret; + unsigned int val; + + rt5682 = devm_kzalloc(&i2c->dev, sizeof(struct rt5682_priv), + GFP_KERNEL); + if (!rt5682) + return -ENOMEM; + + i2c_set_clientdata(i2c, rt5682); + + rt5682->pdata = i2s_default_platform_data; + + if (pdata) + rt5682->pdata = *pdata; + else + rt5682_parse_dt(rt5682, &i2c->dev); + + rt5682->regmap = devm_regmap_init_i2c(i2c, &rt5682_regmap); + if (IS_ERR(rt5682->regmap)) { + ret = PTR_ERR(rt5682->regmap); + dev_err(&i2c->dev, "Failed to allocate register map: %d\n", + ret); + return ret; + } + + for (i = 0; i < ARRAY_SIZE(rt5682->supplies); i++) + rt5682->supplies[i].supply = rt5682_supply_names[i]; + + ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(rt5682->supplies), + rt5682->supplies); + if (ret) { + dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret); + return ret; + } + + ret = regulator_bulk_enable(ARRAY_SIZE(rt5682->supplies), + rt5682->supplies); + if (ret) { + dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret); + return ret; + } + + if (gpio_is_valid(rt5682->pdata.ldo1_en)) { + if (devm_gpio_request_one(&i2c->dev, rt5682->pdata.ldo1_en, + GPIOF_OUT_INIT_HIGH, "rt5682")) + dev_err(&i2c->dev, "Fail gpio_request gpio_ldo\n"); + } + + /* Sleep for 300 ms miniumum */ + usleep_range(300000, 350000); + + regmap_write(rt5682->regmap, RT5682_I2C_MODE, 0x1); + usleep_range(10000, 15000); + + regmap_read(rt5682->regmap, RT5682_DEVICE_ID, &val); + if (val != DEVICE_ID) { + dev_err(&i2c->dev, + "Device with ID register %x is not rt5682\n", val); + return -ENODEV; + } + + mutex_init(&rt5682->calibrate_mutex); + rt5682_calibrate(rt5682); + + rt5682_apply_patch_list(rt5682, &i2c->dev); + + regmap_write(rt5682->regmap, RT5682_DEPOP_1, 0x0000); + + /* DMIC pin*/ + if (rt5682->pdata.dmic1_data_pin != RT5682_DMIC1_NULL) { + switch (rt5682->pdata.dmic1_data_pin) { + case RT5682_DMIC1_DATA_GPIO2: /* share with LRCK2 */ + regmap_update_bits(rt5682->regmap, RT5682_DMIC_CTRL_1, + RT5682_DMIC_1_DP_MASK, RT5682_DMIC_1_DP_GPIO2); + regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1, + RT5682_GP2_PIN_MASK, RT5682_GP2_PIN_DMIC_SDA); + break; + + case RT5682_DMIC1_DATA_GPIO5: /* share with DACDAT1 */ + regmap_update_bits(rt5682->regmap, RT5682_DMIC_CTRL_1, + RT5682_DMIC_1_DP_MASK, RT5682_DMIC_1_DP_GPIO5); + regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1, + RT5682_GP5_PIN_MASK, RT5682_GP5_PIN_DMIC_SDA); + break; + + default: + dev_warn(&i2c->dev, "invalid DMIC_DAT pin\n"); + break; + } + + switch (rt5682->pdata.dmic1_clk_pin) { + case RT5682_DMIC1_CLK_GPIO1: /* share with IRQ */ + regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1, + RT5682_GP1_PIN_MASK, RT5682_GP1_PIN_DMIC_CLK); + break; + + case RT5682_DMIC1_CLK_GPIO3: /* share with BCLK2 */ + regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1, + RT5682_GP3_PIN_MASK, RT5682_GP3_PIN_DMIC_CLK); + break; + + default: + dev_warn(&i2c->dev, "invalid DMIC_CLK pin\n"); + break; + } + } + + regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1, + RT5682_LDO1_DVO_MASK | RT5682_HP_DRIVER_MASK, + RT5682_LDO1_DVO_12 | RT5682_HP_DRIVER_5X); + regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0380); + regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1, + RT5682_GP4_PIN_MASK | RT5682_GP5_PIN_MASK, + RT5682_GP4_PIN_ADCDAT1 | RT5682_GP5_PIN_DACDAT1); + regmap_write(rt5682->regmap, RT5682_TEST_MODE_CTRL_1, 0x0000); + regmap_update_bits(rt5682->regmap, RT5682_BIAS_CUR_CTRL_8, + RT5682_HPA_CP_BIAS_CTRL_MASK, RT5682_HPA_CP_BIAS_3UA); + regmap_update_bits(rt5682->regmap, RT5682_CHARGE_PUMP_1, + RT5682_CP_CLK_HP_MASK, RT5682_CP_CLK_HP_300KHZ); + regmap_update_bits(rt5682->regmap, RT5682_HP_CHARGE_PUMP_1, + RT5682_PM_HP_MASK, RT5682_PM_HP_HV); + regmap_update_bits(rt5682->regmap, RT5682_DMIC_CTRL_1, + RT5682_FIFO_CLK_DIV_MASK, RT5682_FIFO_CLK_DIV_2); + + INIT_DELAYED_WORK(&rt5682->jack_detect_work, + rt5682_jack_detect_handler); + INIT_DELAYED_WORK(&rt5682->jd_check_work, + rt5682_jd_check_handler); + + if (i2c->irq) { + ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL, + rt5682_irq, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING + | IRQF_ONESHOT, "rt5682", rt5682); + if (ret) + dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret); + } + + return devm_snd_soc_register_component(&i2c->dev, + &rt5682_soc_component_dev, + rt5682_dai, ARRAY_SIZE(rt5682_dai)); +} + +static void rt5682_i2c_shutdown(struct i2c_client *client) +{ + struct rt5682_priv *rt5682 = i2c_get_clientdata(client); + + rt5682_reset(rt5682); +} + +static const struct of_device_id rt5682_of_match[] = { + {.compatible = "realtek,rt5682i"}, + {}, +}; +MODULE_DEVICE_TABLE(of, rt5682_of_match); + +static const struct acpi_device_id rt5682_acpi_match[] = { + {"10EC5682", 0,}, + {}, +}; +MODULE_DEVICE_TABLE(acpi, rt5682_acpi_match); + +static const struct i2c_device_id rt5682_i2c_id[] = { + {"rt5682", 0}, + {} +}; +MODULE_DEVICE_TABLE(i2c, rt5682_i2c_id); + +static struct i2c_driver rt5682_i2c_driver = { + .driver = { + .name = "rt5682", + .of_match_table = rt5682_of_match, + .acpi_match_table = rt5682_acpi_match, + }, + .probe = rt5682_i2c_probe, + .shutdown = rt5682_i2c_shutdown, + .id_table = rt5682_i2c_id, +}; +module_i2c_driver(rt5682_i2c_driver); + +MODULE_DESCRIPTION("ASoC RT5682 driver"); +MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>"); +MODULE_LICENSE("GPL v2"); diff --git a/sound/soc/codecs/rt5682-sdw.c b/sound/soc/codecs/rt5682-sdw.c index a2d1d3ae1e31..4cecc5ce545c 100644 --- a/sound/soc/codecs/rt5682-sdw.c +++ b/sound/soc/codecs/rt5682-sdw.c @@ -14,6 +14,7 @@ #include <linux/acpi.h> #include <linux/gpio.h> #include <linux/of_gpio.h> +#include <linux/pm_runtime.h> #include <linux/regulator/consumer.h> #include <linux/mutex.h> #include <linux/soundwire/sdw.h> @@ -28,7 +29,461 @@ #include <sound/tlv.h> #include "rt5682.h" -#include "rt5682-sdw.h" + +#define RT5682_SDW_ADDR_L 0x3000 +#define RT5682_SDW_ADDR_H 0x3001 +#define RT5682_SDW_DATA_L 0x3004 +#define RT5682_SDW_DATA_H 0x3005 +#define RT5682_SDW_CMD 0x3008 + +static int rt5682_sdw_read(void *context, unsigned int reg, unsigned int *val) +{ + struct device *dev = context; + struct rt5682_priv *rt5682 = dev_get_drvdata(dev); + unsigned int data_l, data_h; + + regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 0); + regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff); + regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff)); + regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_H, &data_h); + regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_L, &data_l); + + *val = (data_h << 8) | data_l; + + dev_vdbg(dev, "[%s] %04x => %04x\n", __func__, reg, *val); + + return 0; +} + +static int rt5682_sdw_write(void *context, unsigned int reg, unsigned int val) +{ + struct device *dev = context; + struct rt5682_priv *rt5682 = dev_get_drvdata(dev); + + regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 1); + regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff); + regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff)); + regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_H, (val >> 8) & 0xff); + regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_L, (val & 0xff)); + + dev_vdbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val); + + return 0; +} + +static const struct regmap_config rt5682_sdw_indirect_regmap = { + .reg_bits = 16, + .val_bits = 16, + .max_register = RT5682_I2C_MODE, + .volatile_reg = rt5682_volatile_register, + .readable_reg = rt5682_readable_register, + .cache_type = REGCACHE_RBTREE, + .reg_defaults = rt5682_reg, + .num_reg_defaults = RT5682_REG_NUM, + .use_single_read = true, + .use_single_write = true, + .reg_read = rt5682_sdw_read, + .reg_write = rt5682_sdw_write, +}; + +struct sdw_stream_data { + struct sdw_stream_runtime *sdw_stream; +}; + +static int rt5682_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream, + int direction) +{ + struct sdw_stream_data *stream; + + if (!sdw_stream) + return 0; + + stream = kzalloc(sizeof(*stream), GFP_KERNEL); + if (!stream) + return -ENOMEM; + + stream->sdw_stream = (struct sdw_stream_runtime *)sdw_stream; + + /* Use tx_mask or rx_mask to configure stream tag and set dma_data */ + if (direction == SNDRV_PCM_STREAM_PLAYBACK) + dai->playback_dma_data = stream; + else + dai->capture_dma_data = stream; + + return 0; +} + +static void rt5682_sdw_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct sdw_stream_data *stream; + + stream = snd_soc_dai_get_dma_data(dai, substream); + snd_soc_dai_set_dma_data(dai, substream, NULL); + kfree(stream); +} + +static int rt5682_sdw_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_component *component = dai->component; + struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component); + struct sdw_stream_config stream_config; + struct sdw_port_config port_config; + enum sdw_data_direction direction; + struct sdw_stream_data *stream; + int retval, port, num_channels; + unsigned int val_p = 0, val_c = 0, osr_p = 0, osr_c = 0; + + dev_dbg(dai->dev, "%s %s", __func__, dai->name); + + stream = snd_soc_dai_get_dma_data(dai, substream); + if (!stream) + return -ENOMEM; + + if (!rt5682->slave) + return -EINVAL; + + /* SoundWire specific configuration */ + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + direction = SDW_DATA_DIR_RX; + port = 1; + } else { + direction = SDW_DATA_DIR_TX; + port = 2; + } + + stream_config.frame_rate = params_rate(params); + stream_config.ch_count = params_channels(params); + stream_config.bps = snd_pcm_format_width(params_format(params)); + stream_config.direction = direction; + + num_channels = params_channels(params); + port_config.ch_mask = (1 << (num_channels)) - 1; + port_config.num = port; + + retval = sdw_stream_add_slave(rt5682->slave, &stream_config, + &port_config, 1, stream->sdw_stream); + if (retval) { + dev_err(dai->dev, "Unable to configure port\n"); + return retval; + } + + switch (params_rate(params)) { + case 48000: + val_p = RT5682_SDW_REF_1_48K; + val_c = RT5682_SDW_REF_2_48K; + break; + case 96000: + val_p = RT5682_SDW_REF_1_96K; + val_c = RT5682_SDW_REF_2_96K; + break; + case 192000: + val_p = RT5682_SDW_REF_1_192K; + val_c = RT5682_SDW_REF_2_192K; + break; + case 32000: + val_p = RT5682_SDW_REF_1_32K; + val_c = RT5682_SDW_REF_2_32K; + break; + case 24000: + val_p = RT5682_SDW_REF_1_24K; + val_c = RT5682_SDW_REF_2_24K; + break; + case 16000: + val_p = RT5682_SDW_REF_1_16K; + val_c = RT5682_SDW_REF_2_16K; + break; + case 12000: + val_p = RT5682_SDW_REF_1_12K; + val_c = RT5682_SDW_REF_2_12K; + break; + case 8000: + val_p = RT5682_SDW_REF_1_8K; + val_c = RT5682_SDW_REF_2_8K; + break; + case 44100: + val_p = RT5682_SDW_REF_1_44K; + val_c = RT5682_SDW_REF_2_44K; + break; + case 88200: + val_p = RT5682_SDW_REF_1_88K; + val_c = RT5682_SDW_REF_2_88K; + break; + case 176400: + val_p = RT5682_SDW_REF_1_176K; + val_c = RT5682_SDW_REF_2_176K; + break; + case 22050: + val_p = RT5682_SDW_REF_1_22K; + val_c = RT5682_SDW_REF_2_22K; + break; + case 11025: + val_p = RT5682_SDW_REF_1_11K; + val_c = RT5682_SDW_REF_2_11K; + break; + default: + return -EINVAL; + } + + if (params_rate(params) <= 48000) { + osr_p = RT5682_DAC_OSR_D_8; + osr_c = RT5682_ADC_OSR_D_8; + } else if (params_rate(params) <= 96000) { + osr_p = RT5682_DAC_OSR_D_4; + osr_c = RT5682_ADC_OSR_D_4; + } else { + osr_p = RT5682_DAC_OSR_D_2; + osr_c = RT5682_ADC_OSR_D_2; + } + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK, + RT5682_SDW_REF_1_MASK, val_p); + regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1, + RT5682_DAC_OSR_MASK, osr_p); + } else { + regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK, + RT5682_SDW_REF_2_MASK, val_c); + regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1, + RT5682_ADC_OSR_MASK, osr_c); + } + + return retval; +} + +static int rt5682_sdw_hw_free(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_component *component = dai->component; + struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component); + struct sdw_stream_data *stream = + snd_soc_dai_get_dma_data(dai, substream); + + if (!rt5682->slave) + return -EINVAL; + + sdw_stream_remove_slave(rt5682->slave, stream->sdw_stream); + return 0; +} + +static struct snd_soc_dai_ops rt5682_sdw_ops = { + .hw_params = rt5682_sdw_hw_params, + .hw_free = rt5682_sdw_hw_free, + .set_sdw_stream = rt5682_set_sdw_stream, + .shutdown = rt5682_sdw_shutdown, +}; + +static struct snd_soc_dai_driver rt5682_dai[] = { + { + .name = "rt5682-aif1", + .id = RT5682_AIF1, + .playback = { + .stream_name = "AIF1 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = RT5682_STEREO_RATES, + .formats = RT5682_FORMATS, + }, + .capture = { + .stream_name = "AIF1 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = RT5682_STEREO_RATES, + .formats = RT5682_FORMATS, + }, + .ops = &rt5682_aif1_dai_ops, + }, + { + .name = "rt5682-aif2", + .id = RT5682_AIF2, + .capture = { + .stream_name = "AIF2 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = RT5682_STEREO_RATES, + .formats = RT5682_FORMATS, + }, + .ops = &rt5682_aif2_dai_ops, + }, + { + .name = "rt5682-sdw", + .id = RT5682_SDW, + .playback = { + .stream_name = "SDW Playback", + .channels_min = 1, + .channels_max = 2, + .rates = RT5682_STEREO_RATES, + .formats = RT5682_FORMATS, + }, + .capture = { + .stream_name = "SDW Capture", + .channels_min = 1, + .channels_max = 2, + .rates = RT5682_STEREO_RATES, + .formats = RT5682_FORMATS, + }, + .ops = &rt5682_sdw_ops, + }, +}; + +static int rt5682_sdw_init(struct device *dev, struct regmap *regmap, + struct sdw_slave *slave) +{ + struct rt5682_priv *rt5682; + int ret; + + rt5682 = devm_kzalloc(dev, sizeof(*rt5682), GFP_KERNEL); + if (!rt5682) + return -ENOMEM; + + dev_set_drvdata(dev, rt5682); + rt5682->slave = slave; + rt5682->sdw_regmap = regmap; + rt5682->is_sdw = true; + + rt5682->regmap = devm_regmap_init(dev, NULL, dev, + &rt5682_sdw_indirect_regmap); + if (IS_ERR(rt5682->regmap)) { + ret = PTR_ERR(rt5682->regmap); + dev_err(dev, "Failed to allocate register map: %d\n", + ret); + return ret; + } + + /* + * Mark hw_init to false + * HW init will be performed when device reports present + */ + rt5682->hw_init = false; + rt5682->first_hw_init = false; + + mutex_init(&rt5682->calibrate_mutex); + INIT_DELAYED_WORK(&rt5682->jack_detect_work, + rt5682_jack_detect_handler); + + ret = devm_snd_soc_register_component(dev, + &rt5682_soc_component_dev, + rt5682_dai, ARRAY_SIZE(rt5682_dai)); + dev_dbg(&slave->dev, "%s\n", __func__); + + return ret; +} + +static int rt5682_io_init(struct device *dev, struct sdw_slave *slave) +{ + struct rt5682_priv *rt5682 = dev_get_drvdata(dev); + int ret = 0; + unsigned int val; + + if (rt5682->hw_init) + return 0; + + regmap_read(rt5682->regmap, RT5682_DEVICE_ID, &val); + if (val != DEVICE_ID) { + dev_err(dev, "Device with ID register %x is not rt5682\n", val); + return -ENODEV; + } + + /* + * PM runtime is only enabled when a Slave reports as Attached + */ + if (!rt5682->first_hw_init) { + /* set autosuspend parameters */ + pm_runtime_set_autosuspend_delay(&slave->dev, 3000); + pm_runtime_use_autosuspend(&slave->dev); + + /* update count of parent 'active' children */ + pm_runtime_set_active(&slave->dev); + + /* make sure the device does not suspend immediately */ + pm_runtime_mark_last_busy(&slave->dev); + + pm_runtime_enable(&slave->dev); + } + + pm_runtime_get_noresume(&slave->dev); + + if (rt5682->first_hw_init) { + regcache_cache_only(rt5682->regmap, false); + regcache_cache_bypass(rt5682->regmap, true); + } + + rt5682_calibrate(rt5682); + + if (rt5682->first_hw_init) { + regcache_cache_bypass(rt5682->regmap, false); + regcache_mark_dirty(rt5682->regmap); + regcache_sync(rt5682->regmap); + + /* volatile registers */ + regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2, + RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL); + + goto reinit; + } + + rt5682_apply_patch_list(rt5682, dev); + + regmap_write(rt5682->regmap, RT5682_DEPOP_1, 0x0000); + + regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1, + RT5682_LDO1_DVO_MASK | RT5682_HP_DRIVER_MASK, + RT5682_LDO1_DVO_12 | RT5682_HP_DRIVER_5X); + regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0380); + regmap_write(rt5682->regmap, RT5682_TEST_MODE_CTRL_1, 0x0000); + regmap_update_bits(rt5682->regmap, RT5682_BIAS_CUR_CTRL_8, + RT5682_HPA_CP_BIAS_CTRL_MASK, RT5682_HPA_CP_BIAS_3UA); + regmap_update_bits(rt5682->regmap, RT5682_CHARGE_PUMP_1, + RT5682_CP_CLK_HP_MASK, RT5682_CP_CLK_HP_300KHZ); + regmap_update_bits(rt5682->regmap, RT5682_HP_CHARGE_PUMP_1, + RT5682_PM_HP_MASK, RT5682_PM_HP_HV); + + /* Soundwire */ + regmap_write(rt5682->regmap, RT5682_PLL2_INTERNAL, 0xa266); + regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_1, 0x1700); + regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_2, 0x0006); + regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_3, 0x2600); + regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_4, 0x0c8f); + regmap_write(rt5682->regmap, RT5682_PLL_TRACK_2, 0x3000); + regmap_write(rt5682->regmap, RT5682_PLL_TRACK_3, 0x4000); + regmap_update_bits(rt5682->regmap, RT5682_GLB_CLK, + RT5682_SCLK_SRC_MASK | RT5682_PLL2_SRC_MASK, + RT5682_SCLK_SRC_PLL2 | RT5682_PLL2_SRC_SDW); + + regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2, + RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL); + regmap_write(rt5682->regmap, RT5682_CBJ_CTRL_1, 0xd042); + regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_3, + RT5682_CBJ_IN_BUF_EN, RT5682_CBJ_IN_BUF_EN); + regmap_update_bits(rt5682->regmap, RT5682_SAR_IL_CMD_1, + RT5682_SAR_POW_MASK, RT5682_SAR_POW_EN); + regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL, + RT5682_POW_IRQ | RT5682_POW_JDH | + RT5682_POW_ANA, RT5682_POW_IRQ | + RT5682_POW_JDH | RT5682_POW_ANA); + regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_2, + RT5682_PWR_JDH, RT5682_PWR_JDH); + regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2, + RT5682_JD1_EN_MASK | RT5682_JD1_IRQ_MASK, + RT5682_JD1_EN | RT5682_JD1_IRQ_PUL); + +reinit: + mod_delayed_work(system_power_efficient_wq, + &rt5682->jack_detect_work, msecs_to_jiffies(250)); + + /* Mark Slave initialization complete */ + rt5682->hw_init = true; + rt5682->first_hw_init = true; + + pm_runtime_mark_last_busy(&slave->dev); + pm_runtime_put_autosuspend(&slave->dev); + + dev_dbg(&slave->dev, "%s hw_init complete\n", __func__); + + return ret; +} static bool rt5682_sdw_readable_register(struct device *dev, unsigned int reg) { @@ -46,7 +501,7 @@ static bool rt5682_sdw_readable_register(struct device *dev, unsigned int reg) } } -const struct regmap_config rt5682_sdw_regmap = { +static const struct regmap_config rt5682_sdw_regmap = { .name = "sdw", .reg_bits = 32, .val_bits = 8, @@ -241,9 +696,6 @@ static int rt5682_sdw_probe(struct sdw_slave *slave, { struct regmap *regmap; - /* Assign ops */ - slave->ops = &rt5682_slave_ops; - /* Regmap Initialization */ regmap = devm_regmap_init_sdw(slave, &rt5682_sdw_regmap); if (IS_ERR(regmap)) diff --git a/sound/soc/codecs/rt5682-sdw.h b/sound/soc/codecs/rt5682-sdw.h deleted file mode 100644 index 76e6f607066e..000000000000 --- a/sound/soc/codecs/rt5682-sdw.h +++ /dev/null @@ -1,20 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only - * - * rt5682-sdw.h -- RT5682 SDW ALSA SoC audio driver - * - * Copyright 2019 Realtek Semiconductor Corp. - * Author: Oder Chiou <oder_chiou@realtek.com> - */ - -#ifndef __RT5682_SDW_H__ -#define __RT5682_SDW_H__ - -#define RT5682_SDW_ADDR_L 0x3000 -#define RT5682_SDW_ADDR_H 0x3001 -#define RT5682_SDW_DATA_L 0x3004 -#define RT5682_SDW_DATA_H 0x3005 -#define RT5682_SDW_CMD 0x3008 - -#define RT5682_PROBE_TIMEOUT 2000 - -#endif /* __RT5682_SDW_H__ */ diff --git a/sound/soc/codecs/rt5682.c b/sound/soc/codecs/rt5682.c index d36f560ad7a8..d3245123101d 100644 --- a/sound/soc/codecs/rt5682.c +++ b/sound/soc/codecs/rt5682.c @@ -1,10 +1,10 @@ // SPDX-License-Identifier: GPL-2.0-only -/* - * rt5682.c -- RT5682 ALSA SoC audio component driver - * - * Copyright 2018 Realtek Semiconductor Corp. - * Author: Bard Liao <bardliao@realtek.com> - */ +// +// rt5682.c -- RT5682 ALSA SoC audio component driver +// +// Copyright 2018 Realtek Semiconductor Corp. +// Author: Bard Liao <bardliao@realtek.com> +// #include <linux/module.h> #include <linux/moduleparam.h> @@ -12,7 +12,6 @@ #include <linux/delay.h> #include <linux/pm.h> #include <linux/pm_runtime.h> -#include <linux/i2c.h> #include <linux/platform_device.h> #include <linux/spi/spi.h> #include <linux/acpi.h> @@ -31,22 +30,13 @@ #include "rl6231.h" #include "rt5682.h" -#include "rt5682-sdw.h" -static const char *rt5682_supply_names[RT5682_NUM_SUPPLIES] = { +const char *rt5682_supply_names[RT5682_NUM_SUPPLIES] = { "AVDD", "MICVDD", "VBAT", }; - -static const struct rt5682_platform_data i2s_default_platform_data = { - .dmic1_data_pin = RT5682_DMIC1_DATA_GPIO2, - .dmic1_clk_pin = RT5682_DMIC1_CLK_GPIO3, - .jd_src = RT5682_JD1, - .btndet_delay = 16, - .dai_clk_names[RT5682_DAI_WCLK_IDX] = "rt5682-dai-wclk", - .dai_clk_names[RT5682_DAI_BCLK_IDX] = "rt5682-dai-bclk", -}; +EXPORT_SYMBOL_GPL(rt5682_supply_names); static const struct reg_sequence patch_list[] = { {RT5682_HP_IMP_SENS_CTRL_19, 0x1000}, @@ -55,7 +45,18 @@ static const struct reg_sequence patch_list[] = { {RT5682_PLL2_INTERNAL, 0x8266}, }; -static const struct reg_default rt5682_reg[] = { +void rt5682_apply_patch_list(struct rt5682_priv *rt5682, struct device *dev) +{ + int ret; + + ret = regmap_multi_reg_write(rt5682->regmap, patch_list, + ARRAY_SIZE(patch_list)); + if (ret) + dev_warn(dev, "Failed to apply regmap patch: %d\n", ret); +} +EXPORT_SYMBOL_GPL(rt5682_apply_patch_list); + +const struct reg_default rt5682_reg[RT5682_REG_NUM] = { {0x0002, 0x8080}, {0x0003, 0x8000}, {0x0005, 0x0000}, @@ -375,8 +376,9 @@ static const struct reg_default rt5682_reg[] = { {0x03f2, 0x0800}, {0x03f3, 0x0800}, }; +EXPORT_SYMBOL_GPL(rt5682_reg); -static bool rt5682_volatile_register(struct device *dev, unsigned int reg) +bool rt5682_volatile_register(struct device *dev, unsigned int reg) { switch (reg) { case RT5682_RESET: @@ -403,8 +405,9 @@ static bool rt5682_volatile_register(struct device *dev, unsigned int reg) return false; } } +EXPORT_SYMBOL_GPL(rt5682_volatile_register); -static bool rt5682_readable_register(struct device *dev, unsigned int reg) +bool rt5682_readable_register(struct device *dev, unsigned int reg) { switch (reg) { case RT5682_RESET: @@ -733,6 +736,7 @@ static bool rt5682_readable_register(struct device *dev, unsigned int reg) return false; } } +EXPORT_SYMBOL_GPL(rt5682_readable_register); static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -6525, 75, 0); static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -1725, 75, 0); @@ -800,12 +804,14 @@ static SOC_ENUM_SINGLE_DECL(rt5682_dacr_enum, static const struct snd_kcontrol_new rt5682_dac_r_mux = SOC_DAPM_ENUM("DAC R Mux", rt5682_dacr_enum); -static void rt5682_reset(struct rt5682_priv *rt5682) +void rt5682_reset(struct rt5682_priv *rt5682) { regmap_write(rt5682->regmap, RT5682_RESET, 0); if (!rt5682->is_sdw) regmap_write(rt5682->regmap, RT5682_I2C_MODE, 1); } +EXPORT_SYMBOL_GPL(rt5682_reset); + /** * rt5682_sel_asrc_clk_src - select ASRC clock source for a set of filters * @component: SoC audio component device. @@ -823,7 +829,6 @@ static void rt5682_reset(struct rt5682_priv *rt5682) int rt5682_sel_asrc_clk_src(struct snd_soc_component *component, unsigned int filter_mask, unsigned int clk_src) { - switch (clk_src) { case RT5682_CLK_SEL_SYS: case RT5682_CLK_SEL_I2S1_ASRC: @@ -857,7 +862,7 @@ static int rt5682_button_detect(struct snd_soc_component *component) val = snd_soc_component_read32(component, RT5682_4BTN_IL_CMD_1); btn_type = val & 0xfff0; snd_soc_component_write(component, RT5682_4BTN_IL_CMD_1, val); - pr_debug("%s btn_type=%x\n", __func__, btn_type); + dev_dbg(component->dev, "%s btn_type=%x\n", __func__, btn_type); snd_soc_component_update_bits(component, RT5682_SAR_IL_CMD_2, 0x10, 0x10); @@ -910,15 +915,13 @@ static void rt5682_enable_push_button_irq(struct snd_soc_component *component, * * Returns detect status. */ -static int rt5682_headset_detect(struct snd_soc_component *component, - int jack_insert) +int rt5682_headset_detect(struct snd_soc_component *component, int jack_insert) { struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component); struct snd_soc_dapm_context *dapm = &component->dapm; unsigned int val, count; if (jack_insert) { - snd_soc_component_update_bits(component, RT5682_PWR_ANLG_1, RT5682_PWR_VREF2 | RT5682_PWR_MB, RT5682_PWR_VREF2 | RT5682_PWR_MB); @@ -951,8 +954,8 @@ static int rt5682_headset_detect(struct snd_soc_component *component, break; default: rt5682->jack_type = SND_JACK_HEADPHONE; + break; } - } else { rt5682_enable_push_button_irq(component, false); snd_soc_component_update_bits(component, RT5682_CBJ_CTRL_1, @@ -973,38 +976,10 @@ static int rt5682_headset_detect(struct snd_soc_component *component, dev_dbg(component->dev, "jack_type = %d\n", rt5682->jack_type); return rt5682->jack_type; } - -static irqreturn_t rt5682_irq(int irq, void *data) -{ - struct rt5682_priv *rt5682 = data; - - mod_delayed_work(system_power_efficient_wq, - &rt5682->jack_detect_work, msecs_to_jiffies(250)); - - return IRQ_HANDLED; -} - -static void rt5682_jd_check_handler(struct work_struct *work) -{ - struct rt5682_priv *rt5682 = container_of(work, struct rt5682_priv, - jd_check_work.work); - - if (snd_soc_component_read32(rt5682->component, RT5682_AJD1_CTRL) - & RT5682_JDH_RS_MASK) { - /* jack out */ - rt5682->jack_type = rt5682_headset_detect(rt5682->component, 0); - - snd_soc_jack_report(rt5682->hs_jack, rt5682->jack_type, - SND_JACK_HEADSET | - SND_JACK_BTN_0 | SND_JACK_BTN_1 | - SND_JACK_BTN_2 | SND_JACK_BTN_3); - } else { - schedule_delayed_work(&rt5682->jd_check_work, 500); - } -} +EXPORT_SYMBOL_GPL(rt5682_headset_detect); static int rt5682_set_jack_detect(struct snd_soc_component *component, - struct snd_soc_jack *hs_jack, void *data) + struct snd_soc_jack *hs_jack, void *data) { struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component); @@ -1013,9 +988,9 @@ static int rt5682_set_jack_detect(struct snd_soc_component *component, if (!rt5682->is_sdw) { if (!hs_jack) { regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2, - RT5682_JD1_EN_MASK, RT5682_JD1_DIS); + RT5682_JD1_EN_MASK, RT5682_JD1_DIS); regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL, - RT5682_POW_JDH | RT5682_POW_JDL, 0); + RT5682_POW_JDH | RT5682_POW_JDL, 0); cancel_delayed_work_sync(&rt5682->jack_detect_work); return 0; } @@ -1058,15 +1033,15 @@ static int rt5682_set_jack_detect(struct snd_soc_component *component, 0x7f7f, (rt5682->pdata.btndet_delay << 8 | rt5682->pdata.btndet_delay)); mod_delayed_work(system_power_efficient_wq, - &rt5682->jack_detect_work, - msecs_to_jiffies(250)); + &rt5682->jack_detect_work, + msecs_to_jiffies(250)); break; case RT5682_JD_NULL: regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2, RT5682_JD1_EN_MASK, RT5682_JD1_DIS); regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL, - RT5682_POW_JDH | RT5682_POW_JDL, 0); + RT5682_POW_JDH | RT5682_POW_JDL, 0); break; default: @@ -1078,7 +1053,7 @@ static int rt5682_set_jack_detect(struct snd_soc_component *component, return 0; } -static void rt5682_jack_detect_handler(struct work_struct *work) +void rt5682_jack_detect_handler(struct work_struct *work) { struct rt5682_priv *rt5682 = container_of(work, struct rt5682_priv, jack_detect_work.work); @@ -1135,7 +1110,6 @@ static void rt5682_jack_detect_handler(struct work_struct *work) case 0x0000: /* unpressed */ break; default: - btn_type = 0; dev_err(rt5682->component->dev, "Unexpected button code 0x%04x\n", btn_type); @@ -1148,9 +1122,9 @@ static void rt5682_jack_detect_handler(struct work_struct *work) } snd_soc_jack_report(rt5682->hs_jack, rt5682->jack_type, - SND_JACK_HEADSET | - SND_JACK_BTN_0 | SND_JACK_BTN_1 | - SND_JACK_BTN_2 | SND_JACK_BTN_3); + SND_JACK_HEADSET | + SND_JACK_BTN_0 | SND_JACK_BTN_1 | + SND_JACK_BTN_2 | SND_JACK_BTN_3); if (!rt5682->is_sdw) { if (rt5682->jack_type & (SND_JACK_BTN_0 | SND_JACK_BTN_1 | @@ -1162,6 +1136,7 @@ static void rt5682_jack_detect_handler(struct work_struct *work) mutex_unlock(&rt5682->calibrate_mutex); } +EXPORT_SYMBOL_GPL(rt5682_jack_detect_handler); static const struct snd_kcontrol_new rt5682_snd_controls[] = { /* DAC Digital Volume */ @@ -1184,15 +1159,14 @@ static const struct snd_kcontrol_new rt5682_snd_controls[] = { 3, 0, adc_bst_tlv), }; - static int rt5682_div_sel(struct rt5682_priv *rt5682, - int target, const int div[], int size) + int target, const int div[], int size) { int i; if (rt5682->sysclk < target) { - pr_err("sysclk rate %d is too low\n", - rt5682->sysclk); + dev_err(rt5682->component->dev, + "sysclk rate %d is too low\n", rt5682->sysclk); return 0; } @@ -1201,18 +1175,18 @@ static int rt5682_div_sel(struct rt5682_priv *rt5682, if (target * div[i] == rt5682->sysclk) return i; if (target * div[i + 1] > rt5682->sysclk) { - dev_dbg(rt5682->component->dev, "can't find div for sysclk %d\n", + dev_dbg(rt5682->component->dev, + "can't find div for sysclk %d\n", rt5682->sysclk); return i; } } if (target * div[i] < rt5682->sysclk) - pr_err("sysclk rate %d is too high\n", - rt5682->sysclk); + dev_err(rt5682->component->dev, + "sysclk rate %d is too high\n", rt5682->sysclk); return size - 1; - } /** @@ -1226,7 +1200,7 @@ static int rt5682_div_sel(struct rt5682_priv *rt5682, * It is better for clock to approximate 3MHz. */ static int set_dmic_clk(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) + struct snd_kcontrol *kcontrol, int event) { struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); @@ -1246,7 +1220,7 @@ static int set_dmic_clk(struct snd_soc_dapm_widget *w, } static int set_filter_clk(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) + struct snd_kcontrol *kcontrol, int event) { struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); @@ -1290,7 +1264,7 @@ static int set_filter_clk(struct snd_soc_dapm_widget *w, } static int is_sys_clk_from_pll1(struct snd_soc_dapm_widget *w, - struct snd_soc_dapm_widget *sink) + struct snd_soc_dapm_widget *sink) { unsigned int val; struct snd_soc_component *component = @@ -1305,7 +1279,7 @@ static int is_sys_clk_from_pll1(struct snd_soc_dapm_widget *w, } static int is_sys_clk_from_pll2(struct snd_soc_dapm_widget *w, - struct snd_soc_dapm_widget *sink) + struct snd_soc_dapm_widget *sink) { unsigned int val; struct snd_soc_component *component = @@ -1320,7 +1294,7 @@ static int is_sys_clk_from_pll2(struct snd_soc_dapm_widget *w, } static int is_using_asrc(struct snd_soc_dapm_widget *w, - struct snd_soc_dapm_widget *sink) + struct snd_soc_dapm_widget *sink) { unsigned int reg, shift, val; struct snd_soc_component *component = @@ -1347,7 +1321,6 @@ static int is_using_asrc(struct snd_soc_dapm_widget *w, default: return 0; } - } /* Digital Mixer */ @@ -1501,13 +1474,13 @@ static const struct snd_kcontrol_new rt5682_alg_dac_r1_mux = /* Out Switch */ static const struct snd_kcontrol_new hpol_switch = SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5682_HP_CTRL_1, - RT5682_L_MUTE_SFT, 1, 1); + RT5682_L_MUTE_SFT, 1, 1); static const struct snd_kcontrol_new hpor_switch = SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5682_HP_CTRL_1, - RT5682_R_MUTE_SFT, 1, 1); + RT5682_R_MUTE_SFT, 1, 1); static int rt5682_hp_event(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) + struct snd_kcontrol *kcontrol, int event) { struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); @@ -1532,17 +1505,13 @@ static int rt5682_hp_event(struct snd_soc_dapm_widget *w, snd_soc_component_update_bits(component, RT5682_DAC_ADC_DIG_VOL1, 0x00c0, 0x0000); break; - - default: - return 0; } return 0; - } static int set_dmic_power(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) + struct snd_kcontrol *kcontrol, int event) { struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); @@ -1557,16 +1526,13 @@ static int set_dmic_power(struct snd_soc_dapm_widget *w, /*Add delay to avoid pop noise*/ msleep(delay); break; - - default: - return 0; } return 0; } static int rt5682_set_verf(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) + struct snd_kcontrol *kcontrol, int event) { struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); @@ -1583,9 +1549,6 @@ static int rt5682_set_verf(struct snd_soc_dapm_widget *w, snd_soc_component_update_bits(component, RT5682_PWR_ANLG_1, RT5682_PWR_FV2, 0); break; - - default: - break; } break; @@ -1603,14 +1566,8 @@ static int rt5682_set_verf(struct snd_soc_dapm_widget *w, RT5682_PWR_ANLG_1, RT5682_PWR_FV2, RT5682_PWR_FV2); break; - - default: - break; } break; - - default: - return 0; } return 0; @@ -1743,23 +1700,23 @@ static const struct snd_soc_dapm_widget rt5682_dapm_widgets[] = { /* Digital Interface Select */ SND_SOC_DAPM_MUX("IF1 01 ADC Swap Mux", SND_SOC_NOPM, 0, 0, - &rt5682_if1_01_adc_swap_mux), + &rt5682_if1_01_adc_swap_mux), SND_SOC_DAPM_MUX("IF1 23 ADC Swap Mux", SND_SOC_NOPM, 0, 0, - &rt5682_if1_23_adc_swap_mux), + &rt5682_if1_23_adc_swap_mux), SND_SOC_DAPM_MUX("IF1 45 ADC Swap Mux", SND_SOC_NOPM, 0, 0, - &rt5682_if1_45_adc_swap_mux), + &rt5682_if1_45_adc_swap_mux), SND_SOC_DAPM_MUX("IF1 67 ADC Swap Mux", SND_SOC_NOPM, 0, 0, - &rt5682_if1_67_adc_swap_mux), + &rt5682_if1_67_adc_swap_mux), SND_SOC_DAPM_MUX("IF2 ADC Swap Mux", SND_SOC_NOPM, 0, 0, - &rt5682_if2_adc_swap_mux), + &rt5682_if2_adc_swap_mux), SND_SOC_DAPM_MUX("ADCDAT Mux", SND_SOC_NOPM, 0, 0, - &rt5682_adcdat_pin_ctrl), + &rt5682_adcdat_pin_ctrl), SND_SOC_DAPM_MUX("DAC L Mux", SND_SOC_NOPM, 0, 0, - &rt5682_dac_l_mux), + &rt5682_dac_l_mux), SND_SOC_DAPM_MUX("DAC R Mux", SND_SOC_NOPM, 0, 0, - &rt5682_dac_r_mux), + &rt5682_dac_r_mux), /* Audio Interface */ SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, @@ -1831,7 +1788,6 @@ static const struct snd_soc_dapm_widget rt5682_dapm_widgets[] = { /* Output Lines */ SND_SOC_DAPM_OUTPUT("HPOL"), SND_SOC_DAPM_OUTPUT("HPOR"), - }; static const struct snd_soc_dapm_route rt5682_dapm_routes[] = { @@ -1997,7 +1953,7 @@ static const struct snd_soc_dapm_route rt5682_dapm_routes[] = { }; static int rt5682_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, - unsigned int rx_mask, int slots, int slot_width) + unsigned int rx_mask, int slots, int slot_width) { struct snd_soc_component *component = dai->component; unsigned int cl, val = 0; @@ -2065,9 +2021,8 @@ static int rt5682_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, return 0; } - static int rt5682_hw_params(struct snd_pcm_substream *substream, - struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) + struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) { struct snd_soc_component *component = dai->component; struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component); @@ -2085,7 +2040,7 @@ static int rt5682_hw_params(struct snd_pcm_substream *substream, } dev_dbg(dai->dev, "lrck is %dHz and pre_div is %d for iis %d\n", - rt5682->lrck[dai->id], pre_div, dai->id); + rt5682->lrck[dai->id], pre_div, dai->id); switch (params_width(params)) { case 16: @@ -2469,7 +2424,7 @@ static int rt5682_set_bclk2_ratio(struct snd_soc_dai *dai, unsigned int ratio) } static int rt5682_set_bias_level(struct snd_soc_component *component, - enum snd_soc_bias_level level) + enum snd_soc_bias_level level) { struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component); @@ -2492,8 +2447,7 @@ static int rt5682_set_bias_level(struct snd_soc_component *component, regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1, RT5682_PWR_BG, 0); break; - - default: + case SND_SOC_BIAS_ON: break; } @@ -2667,7 +2621,7 @@ static unsigned long rt5682_bclk_recalc_rate(struct clk_hw *hw, unsigned int bclks_per_wclk; snd_soc_component_read(component, RT5682_TDM_TCON_CTRL, - &bclks_per_wclk); + &bclks_per_wclk); switch (bclks_per_wclk & RT5682_TDM_BCLK_MS1_MASK) { case RT5682_TDM_BCLK_MS1_256: @@ -2922,7 +2876,8 @@ static int rt5682_resume(struct snd_soc_component *component) regcache_cache_only(rt5682->regmap, false); regcache_sync(rt5682->regmap); - rt5682_irq(0, rt5682); + mod_delayed_work(system_power_efficient_wq, + &rt5682->jack_detect_work, msecs_to_jiffies(250)); return 0; } @@ -2931,267 +2886,22 @@ static int rt5682_resume(struct snd_soc_component *component) #define rt5682_resume NULL #endif -#define RT5682_STEREO_RATES SNDRV_PCM_RATE_8000_192000 -#define RT5682_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ - SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) - -static const struct snd_soc_dai_ops rt5682_aif1_dai_ops = { +const struct snd_soc_dai_ops rt5682_aif1_dai_ops = { .hw_params = rt5682_hw_params, .set_fmt = rt5682_set_dai_fmt, .set_tdm_slot = rt5682_set_tdm_slot, .set_bclk_ratio = rt5682_set_bclk1_ratio, }; +EXPORT_SYMBOL_GPL(rt5682_aif1_dai_ops); -static const struct snd_soc_dai_ops rt5682_aif2_dai_ops = { +const struct snd_soc_dai_ops rt5682_aif2_dai_ops = { .hw_params = rt5682_hw_params, .set_fmt = rt5682_set_dai_fmt, .set_bclk_ratio = rt5682_set_bclk2_ratio, }; +EXPORT_SYMBOL_GPL(rt5682_aif2_dai_ops); -#if IS_ENABLED(CONFIG_SND_SOC_RT5682_SDW) -struct sdw_stream_data { - struct sdw_stream_runtime *sdw_stream; -}; - -static int rt5682_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream, - int direction) -{ - struct sdw_stream_data *stream; - - stream = kzalloc(sizeof(*stream), GFP_KERNEL); - if (!stream) - return -ENOMEM; - - stream->sdw_stream = (struct sdw_stream_runtime *)sdw_stream; - - /* Use tx_mask or rx_mask to configure stream tag and set dma_data */ - if (direction == SNDRV_PCM_STREAM_PLAYBACK) - dai->playback_dma_data = stream; - else - dai->capture_dma_data = stream; - - return 0; -} - -static void rt5682_sdw_shutdown(struct snd_pcm_substream *substream, - struct snd_soc_dai *dai) -{ - struct sdw_stream_data *stream; - - stream = snd_soc_dai_get_dma_data(dai, substream); - snd_soc_dai_set_dma_data(dai, substream, NULL); - kfree(stream); -} - -static int rt5682_sdw_hw_params(struct snd_pcm_substream *substream, - struct snd_pcm_hw_params *params, - struct snd_soc_dai *dai) -{ - struct snd_soc_component *component = dai->component; - struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component); - struct sdw_stream_config stream_config; - struct sdw_port_config port_config; - enum sdw_data_direction direction; - struct sdw_stream_data *stream; - int retval, port, num_channels; - unsigned int val_p = 0, val_c = 0, osr_p = 0, osr_c = 0; - - dev_dbg(dai->dev, "%s %s", __func__, dai->name); - stream = snd_soc_dai_get_dma_data(dai, substream); - - if (!stream) - return -ENOMEM; - - if (!rt5682->slave) - return -EINVAL; - - /* SoundWire specific configuration */ - if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { - direction = SDW_DATA_DIR_RX; - port = 1; - } else { - direction = SDW_DATA_DIR_TX; - port = 2; - } - - stream_config.frame_rate = params_rate(params); - stream_config.ch_count = params_channels(params); - stream_config.bps = snd_pcm_format_width(params_format(params)); - stream_config.direction = direction; - - num_channels = params_channels(params); - port_config.ch_mask = (1 << (num_channels)) - 1; - port_config.num = port; - - retval = sdw_stream_add_slave(rt5682->slave, &stream_config, - &port_config, 1, stream->sdw_stream); - if (retval) { - dev_err(dai->dev, "Unable to configure port\n"); - return retval; - } - - switch (params_rate(params)) { - case 48000: - val_p = RT5682_SDW_REF_1_48K; - val_c = RT5682_SDW_REF_2_48K; - break; - case 96000: - val_p = RT5682_SDW_REF_1_96K; - val_c = RT5682_SDW_REF_2_96K; - break; - case 192000: - val_p = RT5682_SDW_REF_1_192K; - val_c = RT5682_SDW_REF_2_192K; - break; - case 32000: - val_p = RT5682_SDW_REF_1_32K; - val_c = RT5682_SDW_REF_2_32K; - break; - case 24000: - val_p = RT5682_SDW_REF_1_24K; - val_c = RT5682_SDW_REF_2_24K; - break; - case 16000: - val_p = RT5682_SDW_REF_1_16K; - val_c = RT5682_SDW_REF_2_16K; - break; - case 12000: - val_p = RT5682_SDW_REF_1_12K; - val_c = RT5682_SDW_REF_2_12K; - break; - case 8000: - val_p = RT5682_SDW_REF_1_8K; - val_c = RT5682_SDW_REF_2_8K; - break; - case 44100: - val_p = RT5682_SDW_REF_1_44K; - val_c = RT5682_SDW_REF_2_44K; - break; - case 88200: - val_p = RT5682_SDW_REF_1_88K; - val_c = RT5682_SDW_REF_2_88K; - break; - case 176400: - val_p = RT5682_SDW_REF_1_176K; - val_c = RT5682_SDW_REF_2_176K; - break; - case 22050: - val_p = RT5682_SDW_REF_1_22K; - val_c = RT5682_SDW_REF_2_22K; - break; - case 11025: - val_p = RT5682_SDW_REF_1_11K; - val_c = RT5682_SDW_REF_2_11K; - break; - default: - return -EINVAL; - } - - if (params_rate(params) <= 48000) { - osr_p = RT5682_DAC_OSR_D_8; - osr_c = RT5682_ADC_OSR_D_8; - } else if (params_rate(params) <= 96000) { - osr_p = RT5682_DAC_OSR_D_4; - osr_c = RT5682_ADC_OSR_D_4; - } else { - osr_p = RT5682_DAC_OSR_D_2; - osr_c = RT5682_ADC_OSR_D_2; - } - - if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { - regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK, - RT5682_SDW_REF_1_MASK, val_p); - regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1, - RT5682_DAC_OSR_MASK, osr_p); - } else { - regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK, - RT5682_SDW_REF_2_MASK, val_c); - regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1, - RT5682_ADC_OSR_MASK, osr_c); - } - - return retval; -} - -static int rt5682_sdw_hw_free(struct snd_pcm_substream *substream, - struct snd_soc_dai *dai) -{ - struct snd_soc_component *component = dai->component; - struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component); - struct sdw_stream_data *stream = - snd_soc_dai_get_dma_data(dai, substream); - - if (!rt5682->slave) - return -EINVAL; - - sdw_stream_remove_slave(rt5682->slave, stream->sdw_stream); - return 0; -} - -static struct snd_soc_dai_ops rt5682_sdw_ops = { - .hw_params = rt5682_sdw_hw_params, - .hw_free = rt5682_sdw_hw_free, - .set_sdw_stream = rt5682_set_sdw_stream, - .shutdown = rt5682_sdw_shutdown, -}; -#endif - -static struct snd_soc_dai_driver rt5682_dai[] = { - { - .name = "rt5682-aif1", - .id = RT5682_AIF1, - .playback = { - .stream_name = "AIF1 Playback", - .channels_min = 1, - .channels_max = 2, - .rates = RT5682_STEREO_RATES, - .formats = RT5682_FORMATS, - }, - .capture = { - .stream_name = "AIF1 Capture", - .channels_min = 1, - .channels_max = 2, - .rates = RT5682_STEREO_RATES, - .formats = RT5682_FORMATS, - }, - .ops = &rt5682_aif1_dai_ops, - }, - { - .name = "rt5682-aif2", - .id = RT5682_AIF2, - .capture = { - .stream_name = "AIF2 Capture", - .channels_min = 1, - .channels_max = 2, - .rates = RT5682_STEREO_RATES, - .formats = RT5682_FORMATS, - }, - .ops = &rt5682_aif2_dai_ops, - }, -#if IS_ENABLED(CONFIG_SND_SOC_RT5682_SDW) - { - .name = "rt5682-sdw", - .id = RT5682_SDW, - .playback = { - .stream_name = "SDW Playback", - .channels_min = 1, - .channels_max = 2, - .rates = RT5682_STEREO_RATES, - .formats = RT5682_FORMATS, - }, - .capture = { - .stream_name = "SDW Capture", - .channels_min = 1, - .channels_max = 2, - .rates = RT5682_STEREO_RATES, - .formats = RT5682_FORMATS, - }, - .ops = &rt5682_sdw_ops, - }, -#endif -}; - -static const struct snd_soc_component_driver soc_component_dev_rt5682 = { +const struct snd_soc_component_driver rt5682_soc_component_dev = { .probe = rt5682_probe, .remove = rt5682_remove, .suspend = rt5682_suspend, @@ -3210,27 +2920,9 @@ static const struct snd_soc_component_driver soc_component_dev_rt5682 = { .endianness = 1, .non_legacy_dai_naming = 1, }; +EXPORT_SYMBOL_GPL(rt5682_soc_component_dev); -static const struct regmap_config rt5682_regmap = { - .reg_bits = 16, - .val_bits = 16, - .max_register = RT5682_I2C_MODE, - .volatile_reg = rt5682_volatile_register, - .readable_reg = rt5682_readable_register, - .cache_type = REGCACHE_RBTREE, - .reg_defaults = rt5682_reg, - .num_reg_defaults = ARRAY_SIZE(rt5682_reg), - .use_single_read = true, - .use_single_write = true, -}; - -static const struct i2c_device_id rt5682_i2c_id[] = { - {"rt5682", 0}, - {} -}; -MODULE_DEVICE_TABLE(i2c, rt5682_i2c_id); - -static int rt5682_parse_dt(struct rt5682_priv *rt5682, struct device *dev) +int rt5682_parse_dt(struct rt5682_priv *rt5682, struct device *dev) { device_property_read_u32(dev, "realtek,dmic1-data-pin", @@ -3258,8 +2950,9 @@ static int rt5682_parse_dt(struct rt5682_priv *rt5682, struct device *dev) return 0; } +EXPORT_SYMBOL_GPL(rt5682_parse_dt); -static void rt5682_calibrate(struct rt5682_priv *rt5682) +void rt5682_calibrate(struct rt5682_priv *rt5682) { int value, count; @@ -3296,7 +2989,7 @@ static void rt5682_calibrate(struct rt5682_priv *rt5682) } if (count >= 60) - pr_err("HP Calibration Failure\n"); + dev_err(rt5682->component->dev, "HP Calibration Failure\n"); /* restore settings */ regmap_write(rt5682->regmap, RT5682_PWR_ANLG_1, 0x02af); @@ -3308,415 +3001,8 @@ static void rt5682_calibrate(struct rt5682_priv *rt5682) regmap_write(rt5682->regmap, RT5682_STO1_ADC_MIXER, 0xc0c4); mutex_unlock(&rt5682->calibrate_mutex); - -} - -#if IS_ENABLED(CONFIG_SND_SOC_RT5682_SDW) -static int rt5682_sdw_read(void *context, unsigned int reg, unsigned int *val) -{ - struct device *dev = context; - struct rt5682_priv *rt5682 = dev_get_drvdata(dev); - unsigned int data_l, data_h; - - regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 0); - regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff); - regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff)); - regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_H, &data_h); - regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_L, &data_l); - - *val = (data_h << 8) | data_l; - - dev_vdbg(dev, "[%s] %04x => %04x\n", __func__, reg, *val); - - return 0; -} - -static int rt5682_sdw_write(void *context, unsigned int reg, unsigned int val) -{ - struct device *dev = context; - struct rt5682_priv *rt5682 = dev_get_drvdata(dev); - - regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 1); - regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff); - regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff)); - regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_H, (val >> 8) & 0xff); - regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_L, (val & 0xff)); - - dev_vdbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val); - - return 0; -} - -static const struct regmap_config rt5682_sdw_regmap = { - .reg_bits = 16, - .val_bits = 16, - .max_register = RT5682_I2C_MODE, - .volatile_reg = rt5682_volatile_register, - .readable_reg = rt5682_readable_register, - .cache_type = REGCACHE_RBTREE, - .reg_defaults = rt5682_reg, - .num_reg_defaults = ARRAY_SIZE(rt5682_reg), - .use_single_read = true, - .use_single_write = true, - .reg_read = rt5682_sdw_read, - .reg_write = rt5682_sdw_write, -}; - -int rt5682_sdw_init(struct device *dev, struct regmap *regmap, - struct sdw_slave *slave) -{ - struct rt5682_priv *rt5682; - int ret; - - rt5682 = devm_kzalloc(dev, sizeof(*rt5682), GFP_KERNEL); - if (!rt5682) - return -ENOMEM; - - dev_set_drvdata(dev, rt5682); - rt5682->slave = slave; - rt5682->sdw_regmap = regmap; - rt5682->is_sdw = true; - - rt5682->regmap = devm_regmap_init(dev, NULL, dev, &rt5682_sdw_regmap); - if (IS_ERR(rt5682->regmap)) { - ret = PTR_ERR(rt5682->regmap); - dev_err(dev, "Failed to allocate register map: %d\n", - ret); - return ret; - } - - /* - * Mark hw_init to false - * HW init will be performed when device reports present - */ - rt5682->hw_init = false; - rt5682->first_hw_init = false; - - mutex_init(&rt5682->calibrate_mutex); - INIT_DELAYED_WORK(&rt5682->jack_detect_work, - rt5682_jack_detect_handler); - - ret = devm_snd_soc_register_component(dev, &soc_component_dev_rt5682, - rt5682_dai, ARRAY_SIZE(rt5682_dai)); - - dev_dbg(&slave->dev, "%s\n", __func__); - - return ret; -} -EXPORT_SYMBOL_GPL(rt5682_sdw_init); - -int rt5682_io_init(struct device *dev, struct sdw_slave *slave) -{ - struct rt5682_priv *rt5682 = dev_get_drvdata(dev); - int ret = 0; - unsigned int val; - - if (rt5682->hw_init) - return 0; - - regmap_read(rt5682->regmap, RT5682_DEVICE_ID, &val); - if (val != DEVICE_ID) { - pr_err("Device with ID register %x is not rt5682\n", val); - return -ENODEV; - } - - /* - * PM runtime is only enabled when a Slave reports as Attached - */ - if (!rt5682->first_hw_init) { - /* set autosuspend parameters */ - pm_runtime_set_autosuspend_delay(&slave->dev, 3000); - pm_runtime_use_autosuspend(&slave->dev); - - /* update count of parent 'active' children */ - pm_runtime_set_active(&slave->dev); - - /* make sure the device does not suspend immediately */ - pm_runtime_mark_last_busy(&slave->dev); - - pm_runtime_enable(&slave->dev); - } - - pm_runtime_get_noresume(&slave->dev); - - rt5682_reset(rt5682); - - if (rt5682->first_hw_init) { - regcache_cache_only(rt5682->regmap, false); - regcache_cache_bypass(rt5682->regmap, true); - } - - rt5682_calibrate(rt5682); - - if (rt5682->first_hw_init) { - regcache_cache_bypass(rt5682->regmap, false); - regcache_mark_dirty(rt5682->regmap); - regcache_sync(rt5682->regmap); - - /* volatile registers */ - regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2, - RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL); - - goto reinit; - } - - ret = regmap_multi_reg_write(rt5682->regmap, patch_list, - ARRAY_SIZE(patch_list)); - if (ret != 0) - dev_warn(dev, "Failed to apply regmap patch: %d\n", ret); - - regmap_write(rt5682->regmap, RT5682_DEPOP_1, 0x0000); - - regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1, - RT5682_LDO1_DVO_MASK | RT5682_HP_DRIVER_MASK, - RT5682_LDO1_DVO_12 | RT5682_HP_DRIVER_5X); - regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0380); - regmap_write(rt5682->regmap, RT5682_TEST_MODE_CTRL_1, 0x0000); - regmap_update_bits(rt5682->regmap, RT5682_BIAS_CUR_CTRL_8, - RT5682_HPA_CP_BIAS_CTRL_MASK, RT5682_HPA_CP_BIAS_3UA); - regmap_update_bits(rt5682->regmap, RT5682_CHARGE_PUMP_1, - RT5682_CP_CLK_HP_MASK, RT5682_CP_CLK_HP_300KHZ); - regmap_update_bits(rt5682->regmap, RT5682_HP_CHARGE_PUMP_1, - RT5682_PM_HP_MASK, RT5682_PM_HP_HV); - - /* Soundwire */ - regmap_write(rt5682->regmap, RT5682_PLL2_INTERNAL, 0xa266); - regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_1, 0x1700); - regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_2, 0x0006); - regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_3, 0x2600); - regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_4, 0x0c8f); - regmap_write(rt5682->regmap, RT5682_PLL_TRACK_2, 0x3000); - regmap_write(rt5682->regmap, RT5682_PLL_TRACK_3, 0x4000); - regmap_update_bits(rt5682->regmap, RT5682_GLB_CLK, - RT5682_SCLK_SRC_MASK | RT5682_PLL2_SRC_MASK, - RT5682_SCLK_SRC_PLL2 | RT5682_PLL2_SRC_SDW); - - regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2, - RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL); - regmap_write(rt5682->regmap, RT5682_CBJ_CTRL_1, 0xd042); - regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_3, - RT5682_CBJ_IN_BUF_EN, RT5682_CBJ_IN_BUF_EN); - regmap_update_bits(rt5682->regmap, RT5682_SAR_IL_CMD_1, - RT5682_SAR_POW_MASK, RT5682_SAR_POW_EN); - regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL, - RT5682_POW_IRQ | RT5682_POW_JDH | - RT5682_POW_ANA, RT5682_POW_IRQ | - RT5682_POW_JDH | RT5682_POW_ANA); - regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_2, - RT5682_PWR_JDH, RT5682_PWR_JDH); - regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2, - RT5682_JD1_EN_MASK | RT5682_JD1_IRQ_MASK, - RT5682_JD1_EN | RT5682_JD1_IRQ_PUL); - -reinit: - mod_delayed_work(system_power_efficient_wq, - &rt5682->jack_detect_work, msecs_to_jiffies(250)); - - /* Mark Slave initialization complete */ - rt5682->hw_init = true; - rt5682->first_hw_init = true; - - pm_runtime_mark_last_busy(&slave->dev); - pm_runtime_put_autosuspend(&slave->dev); - - dev_dbg(&slave->dev, "%s hw_init complete\n", __func__); - - return ret; -} -EXPORT_SYMBOL_GPL(rt5682_io_init); -#endif - -static int rt5682_i2c_probe(struct i2c_client *i2c, - const struct i2c_device_id *id) -{ - struct rt5682_platform_data *pdata = dev_get_platdata(&i2c->dev); - struct rt5682_priv *rt5682; - int i, ret; - unsigned int val; - - rt5682 = devm_kzalloc(&i2c->dev, sizeof(struct rt5682_priv), - GFP_KERNEL); - - if (rt5682 == NULL) - return -ENOMEM; - - i2c_set_clientdata(i2c, rt5682); - - rt5682->pdata = i2s_default_platform_data; - - if (pdata) - rt5682->pdata = *pdata; - else - rt5682_parse_dt(rt5682, &i2c->dev); - - rt5682->regmap = devm_regmap_init_i2c(i2c, &rt5682_regmap); - if (IS_ERR(rt5682->regmap)) { - ret = PTR_ERR(rt5682->regmap); - dev_err(&i2c->dev, "Failed to allocate register map: %d\n", - ret); - return ret; - } - - for (i = 0; i < ARRAY_SIZE(rt5682->supplies); i++) - rt5682->supplies[i].supply = rt5682_supply_names[i]; - - ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(rt5682->supplies), - rt5682->supplies); - if (ret != 0) { - dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret); - return ret; - } - - ret = regulator_bulk_enable(ARRAY_SIZE(rt5682->supplies), - rt5682->supplies); - if (ret != 0) { - dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret); - return ret; - } - - if (gpio_is_valid(rt5682->pdata.ldo1_en)) { - if (devm_gpio_request_one(&i2c->dev, rt5682->pdata.ldo1_en, - GPIOF_OUT_INIT_HIGH, "rt5682")) - dev_err(&i2c->dev, "Fail gpio_request gpio_ldo\n"); - } - - /* Sleep for 300 ms miniumum */ - usleep_range(300000, 350000); - - regmap_write(rt5682->regmap, RT5682_I2C_MODE, 0x1); - usleep_range(10000, 15000); - - regmap_read(rt5682->regmap, RT5682_DEVICE_ID, &val); - if (val != DEVICE_ID) { - pr_err("Device with ID register %x is not rt5682\n", val); - return -ENODEV; - } - - rt5682_reset(rt5682); - - mutex_init(&rt5682->calibrate_mutex); - rt5682_calibrate(rt5682); - - ret = regmap_multi_reg_write(rt5682->regmap, patch_list, - ARRAY_SIZE(patch_list)); - if (ret != 0) - dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret); - - regmap_write(rt5682->regmap, RT5682_DEPOP_1, 0x0000); - - /* DMIC pin*/ - if (rt5682->pdata.dmic1_data_pin != RT5682_DMIC1_NULL) { - switch (rt5682->pdata.dmic1_data_pin) { - case RT5682_DMIC1_DATA_GPIO2: /* share with LRCK2 */ - regmap_update_bits(rt5682->regmap, RT5682_DMIC_CTRL_1, - RT5682_DMIC_1_DP_MASK, RT5682_DMIC_1_DP_GPIO2); - regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1, - RT5682_GP2_PIN_MASK, RT5682_GP2_PIN_DMIC_SDA); - break; - - case RT5682_DMIC1_DATA_GPIO5: /* share with DACDAT1 */ - regmap_update_bits(rt5682->regmap, RT5682_DMIC_CTRL_1, - RT5682_DMIC_1_DP_MASK, RT5682_DMIC_1_DP_GPIO5); - regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1, - RT5682_GP5_PIN_MASK, RT5682_GP5_PIN_DMIC_SDA); - break; - - default: - dev_warn(&i2c->dev, "invalid DMIC_DAT pin\n"); - break; - } - - switch (rt5682->pdata.dmic1_clk_pin) { - case RT5682_DMIC1_CLK_GPIO1: /* share with IRQ */ - regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1, - RT5682_GP1_PIN_MASK, RT5682_GP1_PIN_DMIC_CLK); - break; - - case RT5682_DMIC1_CLK_GPIO3: /* share with BCLK2 */ - regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1, - RT5682_GP3_PIN_MASK, RT5682_GP3_PIN_DMIC_CLK); - break; - - default: - dev_warn(&i2c->dev, "invalid DMIC_CLK pin\n"); - break; - } - } - - regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1, - RT5682_LDO1_DVO_MASK | RT5682_HP_DRIVER_MASK, - RT5682_LDO1_DVO_12 | RT5682_HP_DRIVER_5X); - regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0380); - regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1, - RT5682_GP4_PIN_MASK | RT5682_GP5_PIN_MASK, - RT5682_GP4_PIN_ADCDAT1 | RT5682_GP5_PIN_DACDAT1); - regmap_write(rt5682->regmap, RT5682_TEST_MODE_CTRL_1, 0x0000); - regmap_update_bits(rt5682->regmap, RT5682_BIAS_CUR_CTRL_8, - RT5682_HPA_CP_BIAS_CTRL_MASK, RT5682_HPA_CP_BIAS_3UA); - regmap_update_bits(rt5682->regmap, RT5682_CHARGE_PUMP_1, - RT5682_CP_CLK_HP_MASK, RT5682_CP_CLK_HP_300KHZ); - regmap_update_bits(rt5682->regmap, RT5682_HP_CHARGE_PUMP_1, - RT5682_PM_HP_MASK, RT5682_PM_HP_HV); - regmap_update_bits(rt5682->regmap, RT5682_DMIC_CTRL_1, - RT5682_FIFO_CLK_DIV_MASK, RT5682_FIFO_CLK_DIV_2); - - INIT_DELAYED_WORK(&rt5682->jack_detect_work, - rt5682_jack_detect_handler); - INIT_DELAYED_WORK(&rt5682->jd_check_work, - rt5682_jd_check_handler); - - - if (i2c->irq) { - ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL, - rt5682_irq, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING - | IRQF_ONESHOT, "rt5682", rt5682); - if (ret) - dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret); - - } - - return devm_snd_soc_register_component(&i2c->dev, - &soc_component_dev_rt5682, - rt5682_dai, ARRAY_SIZE(rt5682_dai)); } - -static void rt5682_i2c_shutdown(struct i2c_client *client) -{ - struct rt5682_priv *rt5682 = i2c_get_clientdata(client); - - rt5682_reset(rt5682); -} - -#ifdef CONFIG_OF -static const struct of_device_id rt5682_of_match[] = { - {.compatible = "realtek,rt5682i"}, - {}, -}; -MODULE_DEVICE_TABLE(of, rt5682_of_match); -#endif - -#ifdef CONFIG_ACPI -static const struct acpi_device_id rt5682_acpi_match[] = { - {"10EC5682", 0,}, - {}, -}; -MODULE_DEVICE_TABLE(acpi, rt5682_acpi_match); -#endif - -static struct i2c_driver __maybe_unused rt5682_i2c_driver = { - .driver = { - .name = "rt5682", - .of_match_table = of_match_ptr(rt5682_of_match), - .acpi_match_table = ACPI_PTR(rt5682_acpi_match), - }, - .probe = rt5682_i2c_probe, - .shutdown = rt5682_i2c_shutdown, - .id_table = rt5682_i2c_id, -}; - -#ifdef CONFIG_I2C -module_i2c_driver(rt5682_i2c_driver); -#endif +EXPORT_SYMBOL_GPL(rt5682_calibrate); MODULE_DESCRIPTION("ASoC RT5682 driver"); MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>"); diff --git a/sound/soc/codecs/rt5682.h b/sound/soc/codecs/rt5682.h index 0baeece84ec4..f172c9ebd227 100644 --- a/sound/soc/codecs/rt5682.h +++ b/sound/soc/codecs/rt5682.h @@ -1337,6 +1337,13 @@ #define RT5682_SAR_SOUR_BTN (0x3f) #define RT5682_SAR_SOUR_TYPE (0x0) +/* soundwire timeout */ +#define RT5682_PROBE_TIMEOUT 2000 + + +#define RT5682_STEREO_RATES SNDRV_PCM_RATE_8000_192000 +#define RT5682_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) /* System Clock Source */ enum { @@ -1418,10 +1425,29 @@ struct rt5682_priv { int jack_type; }; +extern const char *rt5682_supply_names[RT5682_NUM_SUPPLIES]; + int rt5682_sel_asrc_clk_src(struct snd_soc_component *component, unsigned int filter_mask, unsigned int clk_src); -int rt5682_sdw_init(struct device *dev, struct regmap *regmap, - struct sdw_slave *slave); -int rt5682_io_init(struct device *dev, struct sdw_slave *slave); + +void rt5682_apply_patch_list(struct rt5682_priv *rt5682, struct device *dev); + +int rt5682_headset_detect(struct snd_soc_component *component, int jack_insert); +void rt5682_jack_detect_handler(struct work_struct *work); + +bool rt5682_volatile_register(struct device *dev, unsigned int reg); +bool rt5682_readable_register(struct device *dev, unsigned int reg); + +int rt5682_register_component(struct device *dev); +void rt5682_calibrate(struct rt5682_priv *rt5682); +void rt5682_reset(struct rt5682_priv *rt5682); +int rt5682_parse_dt(struct rt5682_priv *rt5682, struct device *dev); + +#define RT5682_REG_NUM 318 +extern const struct reg_default rt5682_reg[RT5682_REG_NUM]; + +extern const struct snd_soc_dai_ops rt5682_aif1_dai_ops; +extern const struct snd_soc_dai_ops rt5682_aif2_dai_ops; +extern const struct snd_soc_component_driver rt5682_soc_component_dev; #endif /* __RT5682_H__ */ diff --git a/sound/soc/codecs/rt700-sdw.c b/sound/soc/codecs/rt700-sdw.c index d4e0f953bcce..4d14048d1197 100644 --- a/sound/soc/codecs/rt700-sdw.c +++ b/sound/soc/codecs/rt700-sdw.c @@ -450,9 +450,6 @@ static int rt700_sdw_probe(struct sdw_slave *slave, { struct regmap *sdw_regmap, *regmap; - /* Assign ops */ - slave->ops = &rt700_slave_ops; - /* Regmap Initialization */ sdw_regmap = devm_regmap_init_sdw(slave, &rt700_sdw_regmap); if (!sdw_regmap) diff --git a/sound/soc/codecs/rt700.c b/sound/soc/codecs/rt700.c index ff68f0e4f629..687ac2153666 100644 --- a/sound/soc/codecs/rt700.c +++ b/sound/soc/codecs/rt700.c @@ -860,6 +860,9 @@ static int rt700_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream, { struct sdw_stream_data *stream; + if (!sdw_stream) + return 0; + stream = kzalloc(sizeof(*stream), GFP_KERNEL); if (!stream) return -ENOMEM; diff --git a/sound/soc/codecs/rt711-sdw.c b/sound/soc/codecs/rt711-sdw.c index fc3a3fa3d51b..45b928954b58 100644 --- a/sound/soc/codecs/rt711-sdw.c +++ b/sound/soc/codecs/rt711-sdw.c @@ -450,9 +450,6 @@ static int rt711_sdw_probe(struct sdw_slave *slave, { struct regmap *sdw_regmap, *regmap; - /* Assign ops */ - slave->ops = &rt711_slave_ops; - /* Regmap Initialization */ sdw_regmap = devm_regmap_init_sdw(slave, &rt711_sdw_regmap); if (!sdw_regmap) diff --git a/sound/soc/codecs/rt711.c b/sound/soc/codecs/rt711.c index 2daed7692a3b..65b59dbfb43c 100644 --- a/sound/soc/codecs/rt711.c +++ b/sound/soc/codecs/rt711.c @@ -906,6 +906,9 @@ static int rt711_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream, { struct sdw_stream_data *stream; + if (!sdw_stream) + return 0; + stream = kzalloc(sizeof(*stream), GFP_KERNEL); if (!stream) return -ENOMEM; diff --git a/sound/soc/codecs/rt715-sdw.c b/sound/soc/codecs/rt715-sdw.c index 64ef56ef0318..d11b23d6b240 100644 --- a/sound/soc/codecs/rt715-sdw.c +++ b/sound/soc/codecs/rt715-sdw.c @@ -525,9 +525,6 @@ static int rt715_sdw_probe(struct sdw_slave *slave, { struct regmap *sdw_regmap, *regmap; - /* Assign ops */ - slave->ops = &rt715_slave_ops; - /* Regmap Initialization */ sdw_regmap = devm_regmap_init_sdw(slave, &rt715_sdw_regmap); if (!sdw_regmap) diff --git a/sound/soc/codecs/rt715.c b/sound/soc/codecs/rt715.c index 2cbc57b16b13..099c8bd20006 100644 --- a/sound/soc/codecs/rt715.c +++ b/sound/soc/codecs/rt715.c @@ -530,6 +530,9 @@ static int rt715_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream, struct sdw_stream_data *stream; + if (!sdw_stream) + return 0; + stream = kzalloc(sizeof(*stream), GFP_KERNEL); if (!stream) return -ENOMEM; diff --git a/sound/soc/codecs/sta32x.c b/sound/soc/codecs/sta32x.c index db4b3ec55311..e9ccebbc31e4 100644 --- a/sound/soc/codecs/sta32x.c +++ b/sound/soc/codecs/sta32x.c @@ -893,13 +893,13 @@ static int sta32x_probe(struct snd_soc_component *component) sta32x->supplies); if (ret != 0) { dev_err(component->dev, "Failed to enable supplies: %d\n", ret); - return ret; + goto err_clk_disable_unprepare; } ret = sta32x_startup_sequence(sta32x); if (ret < 0) { dev_err(component->dev, "Failed to startup device\n"); - return ret; + goto err_regulator_bulk_disable; } /* CONFA */ @@ -983,6 +983,13 @@ static int sta32x_probe(struct snd_soc_component *component) regulator_bulk_disable(ARRAY_SIZE(sta32x->supplies), sta32x->supplies); return 0; + +err_regulator_bulk_disable: + regulator_bulk_disable(ARRAY_SIZE(sta32x->supplies), sta32x->supplies); +err_clk_disable_unprepare: + if (sta32x->xti_clk) + clk_disable_unprepare(sta32x->xti_clk); + return ret; } static void sta32x_remove(struct snd_soc_component *component) diff --git a/sound/soc/codecs/tas2552.c b/sound/soc/codecs/tas2552.c index 56671f21cfe5..d90e5f2b6f27 100644 --- a/sound/soc/codecs/tas2552.c +++ b/sound/soc/codecs/tas2552.c @@ -602,6 +602,7 @@ static int tas2552_component_probe(struct snd_soc_component *component) return 0; probe_fail: + pm_runtime_put_noidle(component->dev); gpiod_set_value(tas2552->enable_gpio, 0); regulator_bulk_disable(ARRAY_SIZE(tas2552->supplies), diff --git a/sound/soc/codecs/tlv320adcx140.c b/sound/soc/codecs/tlv320adcx140.c index 1d7d7b34a46e..35fe8ee5bce9 100644 --- a/sound/soc/codecs/tlv320adcx140.c +++ b/sound/soc/codecs/tlv320adcx140.c @@ -180,6 +180,17 @@ static const struct snd_kcontrol_new decimation_filter_controls[] = { SOC_DAPM_ENUM("Decimation Filter", decimation_filter_enum), }; +static const char * const pdmclk_text[] = { + "2.8224 MHz", "1.4112 MHz", "705.6 kHz", "5.6448 MHz" +}; + +static SOC_ENUM_SINGLE_DECL(pdmclk_select_enum, ADCX140_PDMCLK_CFG, 0, + pdmclk_text); + +static const struct snd_kcontrol_new pdmclk_div_controls[] = { + SOC_DAPM_ENUM("PDM Clk Divider Select", pdmclk_select_enum), +}; + static const char * const resistor_text[] = { "2.5 kOhm", "10 kOhm", "20 kOhm" }; @@ -416,6 +427,9 @@ static const struct snd_soc_dapm_widget adcx140_dapm_widgets[] = { SND_SOC_DAPM_MUX("IN4 Analog Mic Resistor", SND_SOC_NOPM, 0, 0, in4_resistor_controls), + SND_SOC_DAPM_MUX("PDM Clk Div Select", SND_SOC_NOPM, 0, 0, + pdmclk_div_controls), + SND_SOC_DAPM_MUX("Decimation Filter", SND_SOC_NOPM, 0, 0, decimation_filter_controls), }; @@ -493,6 +507,11 @@ static const struct snd_soc_dapm_route adcx140_audio_map[] = { {"IN4 Analog Mic Resistor", "10 kOhm", "MIC4M Input Mux"}, {"IN4 Analog Mic Resistor", "20 kOhm", "MIC4M Input Mux"}, + {"PDM Clk Div Select", "2.8224 MHz", "MIC1P Input Mux"}, + {"PDM Clk Div Select", "1.4112 MHz", "MIC1P Input Mux"}, + {"PDM Clk Div Select", "705.6 kHz", "MIC1P Input Mux"}, + {"PDM Clk Div Select", "5.6448 MHz", "MIC1P Input Mux"}, + {"MIC1 Analog Mux", "Line In", "MIC1P"}, {"MIC2 Analog Mux", "Line In", "MIC2P"}, {"MIC3 Analog Mux", "Line In", "MIC3P"}, @@ -563,7 +582,7 @@ static int adcx140_reset(struct adcx140_priv *adcx140) /* 8.4.2: wait >= 10 ms after entering sleep mode. */ usleep_range(10000, 100000); - return 0; + return ret; } static int adcx140_hw_params(struct snd_pcm_substream *substream, @@ -742,6 +761,13 @@ static int adcx140_codec_probe(struct snd_soc_component *component) u32 bias_source; u32 vref_source; u8 bias_cfg; + int pdm_count; + u32 pdm_edges[ADCX140_NUM_PDM_EDGES]; + u32 pdm_edge_val = 0; + int gpi_count; + u32 gpi_inputs[ADCX140_NUM_GPI_PINS]; + u32 gpi_input_val = 0; + int i; int ret; ret = device_property_read_u32(adcx140->dev, "ti,mic-bias-source", @@ -749,8 +775,7 @@ static int adcx140_codec_probe(struct snd_soc_component *component) if (ret) bias_source = ADCX140_MIC_BIAS_VAL_VREF; - if (bias_source < ADCX140_MIC_BIAS_VAL_VREF || - bias_source > ADCX140_MIC_BIAS_VAL_AVDD) { + if (bias_source > ADCX140_MIC_BIAS_VAL_AVDD) { dev_err(adcx140->dev, "Mic Bias source value is invalid\n"); return -EINVAL; } @@ -760,14 +785,56 @@ static int adcx140_codec_probe(struct snd_soc_component *component) if (ret) vref_source = ADCX140_MIC_BIAS_VREF_275V; - if (vref_source < ADCX140_MIC_BIAS_VREF_275V || - vref_source > ADCX140_MIC_BIAS_VREF_1375V) { + if (vref_source > ADCX140_MIC_BIAS_VREF_1375V) { dev_err(adcx140->dev, "Mic Bias source value is invalid\n"); return -EINVAL; } bias_cfg = bias_source << ADCX140_MIC_BIAS_SHIFT | vref_source; + pdm_count = device_property_count_u32(adcx140->dev, + "ti,pdm-edge-select"); + if (pdm_count <= ADCX140_NUM_PDM_EDGES && pdm_count > 0) { + ret = device_property_read_u32_array(adcx140->dev, + "ti,pdm-edge-select", + pdm_edges, pdm_count); + if (ret) + return ret; + + for (i = 0; i < pdm_count; i++) + pdm_edge_val |= pdm_edges[i] << (ADCX140_PDM_EDGE_SHIFT - i); + + ret = regmap_write(adcx140->regmap, ADCX140_PDM_CFG, + pdm_edge_val); + if (ret) + return ret; + } + + gpi_count = device_property_count_u32(adcx140->dev, "ti,gpi-config"); + if (gpi_count <= ADCX140_NUM_GPI_PINS && gpi_count > 0) { + ret = device_property_read_u32_array(adcx140->dev, + "ti,gpi-config", + gpi_inputs, gpi_count); + if (ret) + return ret; + + gpi_input_val = gpi_inputs[ADCX140_GPI1_INDEX] << ADCX140_GPI_SHIFT | + gpi_inputs[ADCX140_GPI2_INDEX]; + + ret = regmap_write(adcx140->regmap, ADCX140_GPI_CFG0, + gpi_input_val); + if (ret) + return ret; + + gpi_input_val = gpi_inputs[ADCX140_GPI3_INDEX] << ADCX140_GPI_SHIFT | + gpi_inputs[ADCX140_GPI4_INDEX]; + + ret = regmap_write(adcx140->regmap, ADCX140_GPI_CFG1, + gpi_input_val); + if (ret) + return ret; + } + ret = adcx140_reset(adcx140); if (ret) goto out; diff --git a/sound/soc/codecs/tlv320adcx140.h b/sound/soc/codecs/tlv320adcx140.h index 69de52d473f4..39206bf1af12 100644 --- a/sound/soc/codecs/tlv320adcx140.h +++ b/sound/soc/codecs/tlv320adcx140.h @@ -129,4 +129,14 @@ #define ADCX140_TX_OFFSET_MASK GENMASK(4, 0) +#define ADCX140_NUM_PDM_EDGES 4 +#define ADCX140_PDM_EDGE_SHIFT 7 + +#define ADCX140_NUM_GPI_PINS 4 +#define ADCX140_GPI_SHIFT 4 +#define ADCX140_GPI1_INDEX 0 +#define ADCX140_GPI2_INDEX 1 +#define ADCX140_GPI3_INDEX 2 +#define ADCX140_GPI4_INDEX 3 + #endif /* _TLV320ADCX140_ */ diff --git a/sound/soc/codecs/tlv320aic23.c b/sound/soc/codecs/tlv320aic23.c index f8e2f4b74db3..9868fb22323c 100644 --- a/sound/soc/codecs/tlv320aic23.c +++ b/sound/soc/codecs/tlv320aic23.c @@ -394,7 +394,7 @@ static void tlv320aic23_shutdown(struct snd_pcm_substream *substream, struct aic23 *aic23 = snd_soc_component_get_drvdata(component); /* deactivate */ - if (!snd_soc_component_is_active(component)) { + if (!snd_soc_component_active(component)) { udelay(50); snd_soc_component_write(component, TLV320AIC23_ACTIVE, 0x0); } diff --git a/sound/soc/codecs/tlv320dac33.c b/sound/soc/codecs/tlv320dac33.c index 808654b10deb..d905e03aaec7 100644 --- a/sound/soc/codecs/tlv320dac33.c +++ b/sound/soc/codecs/tlv320dac33.c @@ -449,7 +449,7 @@ static int dac33_set_fifo_mode(struct snd_kcontrol *kcontrol, if (dac33->fifo_mode == ucontrol->value.enumerated.item[0]) return 0; /* Do not allow changes while stream is running*/ - if (snd_soc_component_is_active(component)) + if (snd_soc_component_active(component)) return -EPERM; if (ucontrol->value.enumerated.item[0] >= DAC33_FIFO_LAST_MODE) diff --git a/sound/soc/codecs/uda1380.c b/sound/soc/codecs/uda1380.c index 26b2ee428aee..89f2bfeeb70e 100644 --- a/sound/soc/codecs/uda1380.c +++ b/sound/soc/codecs/uda1380.c @@ -110,7 +110,7 @@ static int uda1380_write(struct snd_soc_component *component, unsigned int reg, /* the interpolator & decimator regs must only be written when the * codec DAI is active. */ - if (!snd_soc_component_is_active(component) && (reg >= UDA1380_MVOL)) + if (!snd_soc_component_active(component) && (reg >= UDA1380_MVOL)) return 0; pr_debug("uda1380: hw write %x val %x\n", reg, value); if (i2c_master_send(uda1380->i2c, data, 3) == 3) { diff --git a/sound/soc/codecs/wcd9335.c b/sound/soc/codecs/wcd9335.c index 700cc1212770..fb073f4dc7ed 100644 --- a/sound/soc/codecs/wcd9335.c +++ b/sound/soc/codecs/wcd9335.c @@ -1919,7 +1919,7 @@ static int wcd9335_hw_params(struct snd_pcm_substream *substream, __func__, params_rate(params)); return -EINVAL; - }; + } ret = wcd9335_set_decimator_rate(dai, tx_fs_rate, params_rate(params)); @@ -1935,13 +1935,13 @@ static int wcd9335_hw_params(struct snd_pcm_substream *substream, dev_err(wcd->dev, "%s: Invalid format 0x%x\n", __func__, params_width(params)); return -EINVAL; - }; + } break; default: dev_err(wcd->dev, "Invalid stream type %d\n", substream->stream); return -EINVAL; - }; + } wcd->dai[dai->id].sconfig.rate = params_rate(params); wcd9335_slim_set_hw_params(wcd, &wcd->dai[dai->id], substream->stream); @@ -2216,7 +2216,7 @@ static int wcd9335_set_compander(struct snd_kcontrol *kc, break; default: break; - }; + } return 0; } @@ -2565,7 +2565,7 @@ static int wcd9335_micbias_control(struct snd_soc_component *component, 0xC0, 0x00); } break; - }; + } return 0; } @@ -2603,7 +2603,7 @@ static int __wcd9335_codec_enable_micbias(struct snd_soc_dapm_widget *w, case SND_SOC_DAPM_POST_PMD: wcd9335_micbias_control(comp, micb_num, MICB_DISABLE, true); break; - }; + } return 0; } @@ -2846,7 +2846,7 @@ static int wcd9335_codec_enable_dec(struct snd_soc_dapm_widget *w, case SND_SOC_DAPM_POST_PMD: snd_soc_component_update_bits(comp, tx_vol_ctl_reg, 0x10, 0x00); break; - }; + } out: kfree(wname); return ret; @@ -2952,7 +2952,7 @@ static int wcd9335_codec_enable_dmic(struct snd_soc_dapm_widget *w, dev_err(comp->dev, "%s: Invalid DMIC Selection\n", __func__); return -EINVAL; - }; + } switch (event) { case SND_SOC_DAPM_PRE_PMU: @@ -2985,7 +2985,7 @@ static int wcd9335_codec_enable_dmic(struct snd_soc_dapm_widget *w, dmic_rate_val << dmic_rate_shift); } break; - }; + } return 0; } @@ -3076,7 +3076,7 @@ static int wcd9335_codec_enable_mix_path(struct snd_soc_dapm_widget *w, dev_err(comp->dev, "%s: No gain register avail for %s\n", __func__, w->name); return 0; - }; + } switch (event) { case SND_SOC_DAPM_POST_PMU: @@ -3086,7 +3086,7 @@ static int wcd9335_codec_enable_mix_path(struct snd_soc_dapm_widget *w, break; case SND_SOC_DAPM_POST_PMD: break; - }; + } return 0; } @@ -3141,7 +3141,7 @@ static u16 wcd9335_interp_get_primary_reg(u16 reg, u16 *ind) prim_int_reg = WCD9335_CDC_RX8_RX_PATH_CTL; *ind = 8; break; - }; + } return prim_int_reg; } @@ -3229,7 +3229,7 @@ static int wcd9335_codec_enable_prim_interpolator( wcd9335_codec_hd2_control(comp, prim_int_reg, event); } break; - }; + } return 0; } @@ -3352,7 +3352,7 @@ static int wcd9335_codec_enable_interpolator(struct snd_soc_dapm_widget *w, wcd9335_config_compander(comp, w->shift, event); wcd9335_codec_enable_prim_interpolator(comp, reg, event); break; - }; + } return 0; } @@ -3575,7 +3575,7 @@ static int wcd9335_codec_hphl_dac_event(struct snd_soc_dapm_widget *w, ((hph_mode == CLS_H_LOHIFI) ? CLS_H_HIFI : hph_mode)); break; - }; + } return 0; } @@ -3616,7 +3616,7 @@ static int wcd9335_codec_ear_dac_event(struct snd_soc_dapm_widget *w, wcd_clsh_ctrl_set_state(wcd->clsh_ctrl, WCD_CLSH_EVENT_POST_PA, WCD_CLSH_STATE_EAR, CLS_H_NORMAL); break; - }; + } return 0; } @@ -3725,7 +3725,7 @@ static int wcd9335_codec_hphr_dac_event(struct snd_soc_dapm_widget *w, WCD_CLSH_STATE_HPHR, ((hph_mode == CLS_H_LOHIFI) ? CLS_H_HIFI : hph_mode)); break; - }; + } return 0; } @@ -3773,7 +3773,7 @@ static int wcd9335_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w, */ usleep_range(5000, 5500); break; - }; + } return 0; } @@ -3829,7 +3829,7 @@ static int wcd9335_codec_enable_lineout_pa(struct snd_soc_dapm_widget *w, */ usleep_range(5000, 5500); break; - }; + } return 0; } @@ -3875,7 +3875,7 @@ static int wcd9335_codec_enable_rx_bias(struct snd_soc_dapm_widget *w, WCD9335_ANA_RX_BIAS_ENABLE_MASK, WCD9335_ANA_RX_BIAS_DISABLE); break; - }; + } return 0; } @@ -3921,7 +3921,7 @@ static int wcd9335_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w, */ usleep_range(5000, 5500); break; - }; + } return 0; } @@ -3957,7 +3957,7 @@ static int wcd9335_codec_enable_ear_pa(struct snd_soc_dapm_widget *w, usleep_range(5000, 5500); break; - }; + } return 0; } diff --git a/sound/soc/codecs/wcd934x.c b/sound/soc/codecs/wcd934x.c index 5269857e2746..531b8b79e55f 100644 --- a/sound/soc/codecs/wcd934x.c +++ b/sound/soc/codecs/wcd934x.c @@ -1787,7 +1787,7 @@ static int wcd934x_hw_params(struct snd_pcm_substream *substream, params_rate(params)); return -EINVAL; - }; + } ret = wcd934x_set_decimator_rate(dai, tx_fs_rate, params_rate(params)); @@ -1803,13 +1803,13 @@ static int wcd934x_hw_params(struct snd_pcm_substream *substream, dev_err(wcd->dev, "Invalid format 0x%x\n", params_width(params)); return -EINVAL; - }; + } break; default: dev_err(wcd->dev, "Invalid stream type %d\n", substream->stream); return -EINVAL; - }; + } wcd->dai[dai->id].sconfig.rate = params_rate(params); wcd934x_slim_set_hw_params(wcd, &wcd->dai[dai->id], substream->stream); @@ -2489,7 +2489,7 @@ static int wcd934x_compander_set(struct snd_kcontrol *kc, break; default: break; - }; + } return 0; } @@ -3539,7 +3539,7 @@ static int wcd934x_codec_enable_mix_path(struct snd_soc_dapm_widget *w, val += offset_val; snd_soc_component_write(comp, gain_reg, val); break; - }; + } return 0; } @@ -3593,7 +3593,7 @@ static int wcd934x_codec_enable_main_path(struct snd_soc_dapm_widget *w, snd_soc_component_write(comp, gain_reg, snd_soc_component_read32(comp, gain_reg)); break; - }; + } return 0; } @@ -3618,7 +3618,7 @@ static int wcd934x_codec_ear_dac_event(struct snd_soc_dapm_widget *w, wcd_clsh_ctrl_set_state(wcd->clsh_ctrl, WCD_CLSH_EVENT_POST_PA, WCD_CLSH_STATE_EAR, CLS_H_NORMAL); break; - }; + } return 0; } @@ -3670,7 +3670,7 @@ static int wcd934x_codec_hphl_dac_event(struct snd_soc_dapm_widget *w, break; default: break; - }; + } return 0; } @@ -3720,7 +3720,7 @@ static int wcd934x_codec_hphr_dac_event(struct snd_soc_dapm_widget *w, break; default: break; - }; + } return 0; } @@ -3801,7 +3801,7 @@ static int wcd934x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w, */ usleep_range(20000, 20100); break; - }; + } return 0; } @@ -3863,7 +3863,7 @@ static int wcd934x_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w, */ usleep_range(20000, 20100); break; - }; + } return 0; } @@ -3878,7 +3878,7 @@ static u32 wcd934x_get_dmic_sample_rate(struct snd_soc_component *comp, u16 adc_mux_ctl_reg, tx_fs_reg; u32 dmic_fs; - while (dec_found == 0 && adc_mux_index < WCD934X_MAX_VALID_ADC_MUX) { + while (!dec_found && adc_mux_index < WCD934X_MAX_VALID_ADC_MUX) { if (adc_mux_index < 4) { adc_mux_ctl_reg = WCD934X_CDC_TX_INP_MUX_ADC_MUX0_CFG0 + (adc_mux_index * 2); @@ -4015,7 +4015,7 @@ static int wcd934x_codec_enable_dmic(struct snd_soc_dapm_widget *w, dev_err(comp->dev, "%s: Invalid DMIC Selection\n", __func__); return -EINVAL; - }; + } switch (event) { case SND_SOC_DAPM_PRE_PMU: @@ -4040,7 +4040,7 @@ static int wcd934x_codec_enable_dmic(struct snd_soc_dapm_widget *w, snd_soc_component_update_bits(comp, dmic_clk_reg, dmic_clk_en, 0); break; - }; + } return 0; } @@ -4267,7 +4267,7 @@ static int wcd934x_codec_enable_dec(struct snd_soc_dapm_widget *w, WCD934X_DEC_PWR_LVL_MASK, WCD934X_DEC_PWR_LVL_DF); break; - }; + } out: kfree(wname); return ret; diff --git a/sound/soc/codecs/wl1273.c b/sound/soc/codecs/wl1273.c index b30bfcd6a125..c56b9329240f 100644 --- a/sound/soc/codecs/wl1273.c +++ b/sound/soc/codecs/wl1273.c @@ -183,7 +183,7 @@ static int snd_wl1273_set_audio_route(struct snd_kcontrol *kcontrol, return 0; /* Do not allow changes while stream is running */ - if (snd_soc_component_is_active(component)) + if (snd_soc_component_active(component)) return -EPERM; if (ucontrol->value.enumerated.item[0] >= ARRAY_SIZE(wl1273_audio_route)) diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index d6d4b4121369..2ed3fa67027d 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c @@ -1909,10 +1909,9 @@ static struct snd_soc_dai_driver wm5102_dai[] = { }, }; -static int wm5102_open(struct snd_compr_stream *stream) +static int wm5102_open(struct snd_soc_component *component, + struct snd_compr_stream *stream) { - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, DRV_NAME); struct wm5102_priv *priv = snd_soc_component_get_drvdata(component); return wm_adsp_compr_open(&priv->core.adsp[0], stream); @@ -1992,7 +1991,7 @@ static unsigned int wm5102_digital_vu[] = { ARIZONA_DAC_DIGITAL_VOLUME_5R, }; -static struct snd_compr_ops wm5102_compr_ops = { +static struct snd_compress_ops wm5102_compress_ops = { .open = wm5102_open, .free = wm_adsp_compr_free, .set_params = wm_adsp_compr_set_params, @@ -2008,7 +2007,7 @@ static const struct snd_soc_component_driver soc_component_dev_wm5102 = { .set_sysclk = arizona_set_sysclk, .set_pll = wm5102_set_fll, .name = DRV_NAME, - .compr_ops = &wm5102_compr_ops, + .compress_ops = &wm5102_compress_ops, .controls = wm5102_snd_controls, .num_controls = ARRAY_SIZE(wm5102_snd_controls), .dapm_widgets = wm5102_dapm_widgets, diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index 499e87d1dfcc..44de44bff423 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c @@ -2237,10 +2237,10 @@ static struct snd_soc_dai_driver wm5110_dai[] = { }, }; -static int wm5110_open(struct snd_compr_stream *stream) +static int wm5110_open(struct snd_soc_component *component, + struct snd_compr_stream *stream) { struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, DRV_NAME); struct wm5110_priv *priv = snd_soc_component_get_drvdata(component); struct arizona *arizona = priv->core.arizona; int n_adsp; @@ -2355,7 +2355,7 @@ static unsigned int wm5110_digital_vu[] = { ARIZONA_DAC_DIGITAL_VOLUME_6R, }; -static struct snd_compr_ops wm5110_compr_ops = { +static struct snd_compress_ops wm5110_compress_ops = { .open = wm5110_open, .free = wm_adsp_compr_free, .set_params = wm_adsp_compr_set_params, @@ -2371,7 +2371,7 @@ static const struct snd_soc_component_driver soc_component_dev_wm5110 = { .set_sysclk = arizona_set_sysclk, .set_pll = wm5110_set_fll, .name = DRV_NAME, - .compr_ops = &wm5110_compr_ops, + .compress_ops = &wm5110_compress_ops, .controls = wm5110_snd_controls, .num_controls = ARRAY_SIZE(wm5110_snd_controls), .dapm_widgets = wm5110_dapm_widgets, diff --git a/sound/soc/codecs/wm8524.c b/sound/soc/codecs/wm8524.c index 91e3d1570c45..4e9ab542f648 100644 --- a/sound/soc/codecs/wm8524.c +++ b/sound/soc/codecs/wm8524.c @@ -159,7 +159,9 @@ static int wm8524_mute_stream(struct snd_soc_dai *dai, int mute, int stream) #define WM8524_RATES SNDRV_PCM_RATE_8000_192000 -#define WM8524_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE) +#define WM8524_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\ + SNDRV_PCM_FMTBIT_S24_LE |\ + SNDRV_PCM_FMTBIT_S32_LE) static const struct snd_soc_dai_ops wm8524_dai_ops = { .startup = wm8524_startup, diff --git a/sound/soc/codecs/wm8711.c b/sound/soc/codecs/wm8711.c index 8036b18fdeb9..5ad905dd78b7 100644 --- a/sound/soc/codecs/wm8711.c +++ b/sound/soc/codecs/wm8711.c @@ -198,7 +198,7 @@ static void wm8711_shutdown(struct snd_pcm_substream *substream, struct snd_soc_component *component = dai->component; /* deactivate */ - if (!snd_soc_component_is_active(component)) { + if (!snd_soc_component_active(component)) { udelay(50); snd_soc_component_write(component, WM8711_ACTIVE, 0x0); } diff --git a/sound/soc/codecs/wm8753.c b/sound/soc/codecs/wm8753.c index 95a12718f3af..8753c55c73fa 100644 --- a/sound/soc/codecs/wm8753.c +++ b/sound/soc/codecs/wm8753.c @@ -241,7 +241,7 @@ static int wm8753_set_dai(struct snd_kcontrol *kcontrol, if (wm8753->dai_func == ucontrol->value.enumerated.item[0]) return 0; - if (snd_soc_component_is_active(component)) + if (snd_soc_component_active(component)) return -EBUSY; ioctl = snd_soc_component_read32(component, WM8753_IOCTL); @@ -1304,7 +1304,7 @@ static int wm8753_mute(struct snd_soc_dai *dai, int mute) /* the digital mute covers the HiFi and Voice DAC's on the WM8753. * make sure we check if they are not both active when we mute */ if (mute && wm8753->dai_func == 1) { - if (!snd_soc_component_is_active(component)) + if (!snd_soc_component_active(component)) snd_soc_component_write(component, WM8753_DAC, mute_reg | 0x8); } else { if (mute) diff --git a/sound/soc/codecs/wm8782.c b/sound/soc/codecs/wm8782.c index aa5577e364d0..f89855c616eb 100644 --- a/sound/soc/codecs/wm8782.c +++ b/sound/soc/codecs/wm8782.c @@ -7,7 +7,7 @@ * Author: Johannes Stezenbach <js@sig21.net> * * based on ad73311.c - * Copyright: Analog Device Inc. + * Copyright: Analog Devices Inc. * Author: Cliff Cai <cliff.cai@analog.com> */ diff --git a/sound/soc/codecs/wm8900.c b/sound/soc/codecs/wm8900.c index 271235a69c01..3e239fa9bc8d 100644 --- a/sound/soc/codecs/wm8900.c +++ b/sound/soc/codecs/wm8900.c @@ -443,12 +443,6 @@ SOC_SINGLE("LINEOUT2 LP -12dB", WM8900_REG_LOUTMIXCTL1, }; -static const struct snd_kcontrol_new wm8900_dapm_loutput2_control = -SOC_DAPM_SINGLE("LINEOUT2L Switch", WM8900_REG_POWER3, 6, 1, 0); - -static const struct snd_kcontrol_new wm8900_dapm_routput2_control = -SOC_DAPM_SINGLE("LINEOUT2R Switch", WM8900_REG_POWER3, 5, 1, 0); - static const struct snd_kcontrol_new wm8900_loutmix_controls[] = { SOC_DAPM_SINGLE("LINPUT3 Bypass Switch", WM8900_REG_LOUTMIXCTL1, 7, 1, 0), SOC_DAPM_SINGLE("AUX Bypass Switch", WM8900_REG_AUXOUT_CTL, 7, 1, 0), diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c index 08d19df8a700..1cc23a05ffe4 100644 --- a/sound/soc/codecs/wm8962.c +++ b/sound/soc/codecs/wm8962.c @@ -2880,6 +2880,7 @@ static int wm8962_set_fll(struct snd_soc_component *component, int fll_id, int s ret = pm_runtime_get_sync(component->dev); if (ret < 0) { + pm_runtime_put_noidle(component->dev); dev_err(component->dev, "Failed to resume device: %d\n", ret); return ret; } @@ -3012,6 +3013,7 @@ static irqreturn_t wm8962_irq(int irq, void *data) ret = pm_runtime_get_sync(dev); if (ret < 0) { + pm_runtime_put_noidle(dev); dev_err(dev, "Failed to resume: %d\n", ret); return IRQ_NONE; } diff --git a/sound/soc/codecs/wm8990.c b/sound/soc/codecs/wm8990.c index cfe7892696dd..499a29b47d5e 100644 --- a/sound/soc/codecs/wm8990.c +++ b/sound/soc/codecs/wm8990.c @@ -32,93 +32,14 @@ struct wm8990_priv { unsigned int pcmclk; }; -static bool wm8990_volatile_register(struct device *dev, unsigned int reg) -{ - switch (reg) { - case WM8990_RESET: - return true; - default: - return false; - } -} - -static const struct reg_default wm8990_reg_defaults[] = { - { 1, 0x0000 }, /* R1 - Power Management (1) */ - { 2, 0x6000 }, /* R2 - Power Management (2) */ - { 3, 0x0000 }, /* R3 - Power Management (3) */ - { 4, 0x4050 }, /* R4 - Audio Interface (1) */ - { 5, 0x4000 }, /* R5 - Audio Interface (2) */ - { 6, 0x01C8 }, /* R6 - Clocking (1) */ - { 7, 0x0000 }, /* R7 - Clocking (2) */ - { 8, 0x0040 }, /* R8 - Audio Interface (3) */ - { 9, 0x0040 }, /* R9 - Audio Interface (4) */ - { 10, 0x0004 }, /* R10 - DAC CTRL */ - { 11, 0x00C0 }, /* R11 - Left DAC Digital Volume */ - { 12, 0x00C0 }, /* R12 - Right DAC Digital Volume */ - { 13, 0x0000 }, /* R13 - Digital Side Tone */ - { 14, 0x0100 }, /* R14 - ADC CTRL */ - { 15, 0x00C0 }, /* R15 - Left ADC Digital Volume */ - { 16, 0x00C0 }, /* R16 - Right ADC Digital Volume */ - - { 18, 0x0000 }, /* R18 - GPIO CTRL 1 */ - { 19, 0x1000 }, /* R19 - GPIO1 & GPIO2 */ - { 20, 0x1010 }, /* R20 - GPIO3 & GPIO4 */ - { 21, 0x1010 }, /* R21 - GPIO5 & GPIO6 */ - { 22, 0x8000 }, /* R22 - GPIOCTRL 2 */ - { 23, 0x0800 }, /* R23 - GPIO_POL */ - { 24, 0x008B }, /* R24 - Left Line Input 1&2 Volume */ - { 25, 0x008B }, /* R25 - Left Line Input 3&4 Volume */ - { 26, 0x008B }, /* R26 - Right Line Input 1&2 Volume */ - { 27, 0x008B }, /* R27 - Right Line Input 3&4 Volume */ - { 28, 0x0000 }, /* R28 - Left Output Volume */ - { 29, 0x0000 }, /* R29 - Right Output Volume */ - { 30, 0x0066 }, /* R30 - Line Outputs Volume */ - { 31, 0x0022 }, /* R31 - Out3/4 Volume */ - { 32, 0x0079 }, /* R32 - Left OPGA Volume */ - { 33, 0x0079 }, /* R33 - Right OPGA Volume */ - { 34, 0x0003 }, /* R34 - Speaker Volume */ - { 35, 0x0003 }, /* R35 - ClassD1 */ - - { 37, 0x0100 }, /* R37 - ClassD3 */ - { 38, 0x0079 }, /* R38 - ClassD4 */ - { 39, 0x0000 }, /* R39 - Input Mixer1 */ - { 40, 0x0000 }, /* R40 - Input Mixer2 */ - { 41, 0x0000 }, /* R41 - Input Mixer3 */ - { 42, 0x0000 }, /* R42 - Input Mixer4 */ - { 43, 0x0000 }, /* R43 - Input Mixer5 */ - { 44, 0x0000 }, /* R44 - Input Mixer6 */ - { 45, 0x0000 }, /* R45 - Output Mixer1 */ - { 46, 0x0000 }, /* R46 - Output Mixer2 */ - { 47, 0x0000 }, /* R47 - Output Mixer3 */ - { 48, 0x0000 }, /* R48 - Output Mixer4 */ - { 49, 0x0000 }, /* R49 - Output Mixer5 */ - { 50, 0x0000 }, /* R50 - Output Mixer6 */ - { 51, 0x0180 }, /* R51 - Out3/4 Mixer */ - { 52, 0x0000 }, /* R52 - Line Mixer1 */ - { 53, 0x0000 }, /* R53 - Line Mixer2 */ - { 54, 0x0000 }, /* R54 - Speaker Mixer */ - { 55, 0x0000 }, /* R55 - Additional Control */ - { 56, 0x0000 }, /* R56 - AntiPOP1 */ - { 57, 0x0000 }, /* R57 - AntiPOP2 */ - { 58, 0x0000 }, /* R58 - MICBIAS */ - - { 60, 0x0008 }, /* R60 - PLL1 */ - { 61, 0x0031 }, /* R61 - PLL2 */ - { 62, 0x0026 }, /* R62 - PLL3 */ -}; - #define wm8990_reset(c) snd_soc_component_write(c, WM8990_RESET, 0) -static const DECLARE_TLV_DB_SCALE(rec_mix_tlv, -1500, 600, 0); - static const DECLARE_TLV_DB_SCALE(in_pga_tlv, -1650, 3000, 0); static const DECLARE_TLV_DB_SCALE(out_mix_tlv, 0, -2100, 0); static const DECLARE_TLV_DB_SCALE(out_pga_tlv, -7300, 600, 0); -static const DECLARE_TLV_DB_SCALE(out_omix_tlv, -600, 0, 0); - static const DECLARE_TLV_DB_SCALE(out_dac_tlv, -7163, 0, 0); static const DECLARE_TLV_DB_SCALE(in_adc_tlv, -7163, 1763, 0); @@ -486,14 +407,6 @@ static SOC_ENUM_SINGLE_DECL(wm8990_ainrmux_enum, static const struct snd_kcontrol_new wm8990_dapm_ainrmux_controls = SOC_DAPM_ENUM("Route", wm8990_ainrmux_enum); -/* RXVOICE */ -static const struct snd_kcontrol_new wm8990_dapm_rxvoice_controls[] = { -SOC_DAPM_SINGLE_TLV("LIN4/RXN", WM8990_INPUT_MIXER5, WM8990_LR4BVOL_SHIFT, - WM8990_LR4BVOL_MASK, 0, in_mix_tlv), -SOC_DAPM_SINGLE_TLV("RIN4/RXP", WM8990_INPUT_MIXER6, WM8990_RL4BVOL_SHIFT, - WM8990_RL4BVOL_MASK, 0, in_mix_tlv), -}; - /* LOMIX */ static const struct snd_kcontrol_new wm8990_dapm_lomix_controls[] = { SOC_DAPM_SINGLE("LOMIX Right ADC Bypass Switch", WM8990_OUTPUT_MIXER1, @@ -1306,17 +1219,6 @@ static const struct snd_soc_component_driver soc_component_dev_wm8990 = { .non_legacy_dai_naming = 1, }; -static const struct regmap_config wm8990_regmap = { - .reg_bits = 8, - .val_bits = 16, - - .max_register = WM8990_PLL3, - .volatile_reg = wm8990_volatile_register, - .reg_defaults = wm8990_reg_defaults, - .num_reg_defaults = ARRAY_SIZE(wm8990_reg_defaults), - .cache_type = REGCACHE_RBTREE, -}; - static int wm8990_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) { diff --git a/sound/soc/codecs/wm8991.c b/sound/soc/codecs/wm8991.c index 93c156782d59..f8375d67e901 100644 --- a/sound/soc/codecs/wm8991.c +++ b/sound/soc/codecs/wm8991.c @@ -476,14 +476,6 @@ static SOC_ENUM_SINGLE_DECL(wm8991_ainrmux_enum, static const struct snd_kcontrol_new wm8991_dapm_ainrmux_controls = SOC_DAPM_ENUM("Route", wm8991_ainrmux_enum); -/* RXVOICE */ -static const struct snd_kcontrol_new wm8991_dapm_rxvoice_controls[] = { - SOC_DAPM_SINGLE_TLV("LIN4RXN", WM8991_INPUT_MIXER5, WM8991_LR4BVOL_SHIFT, - WM8991_LR4BVOL_MASK, 0, in_mix_tlv), - SOC_DAPM_SINGLE_TLV("RIN4RXP", WM8991_INPUT_MIXER6, WM8991_RL4BVOL_SHIFT, - WM8991_RL4BVOL_MASK, 0, in_mix_tlv), -}; - /* LOMIX */ static const struct snd_kcontrol_new wm8991_dapm_lomix_controls[] = { SOC_DAPM_SINGLE("LOMIX Right ADC Bypass Switch", WM8991_OUTPUT_MIXER1, diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c index 15ce64a48a87..55d0b9be6ff0 100644 --- a/sound/soc/codecs/wm8994.c +++ b/sound/soc/codecs/wm8994.c @@ -285,7 +285,6 @@ static const DECLARE_TLV_DB_SCALE(st_tlv, -3600, 300, 0); static const DECLARE_TLV_DB_SCALE(wm8994_3d_tlv, -1600, 183, 0); static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); static const DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); -static const DECLARE_TLV_DB_SCALE(mixin_boost_tlv, 0, 900, 0); #define WM8994_DRC_SWITCH(xname, reg, shift) \ SOC_SINGLE_EXT(xname, reg, shift, 1, 0, \ @@ -733,13 +732,6 @@ SOC_SINGLE_TLV("AIF2DAC Noise Gate Threshold Volume", 7, 1, ng_tlv), }; -static const struct snd_kcontrol_new wm1811_snd_controls[] = { -SOC_SINGLE_TLV("MIXINL IN1LP Boost Volume", WM8994_INPUT_MIXER_1, 7, 1, 0, - mixin_boost_tlv), -SOC_SINGLE_TLV("MIXINL IN1RP Boost Volume", WM8994_INPUT_MIXER_1, 8, 1, 0, - mixin_boost_tlv), -}; - /* We run all mode setting through a function to enforce audio mode */ static void wm1811_jackdet_set_mode(struct snd_soc_component *component, u16 mode) { diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index 1ef69409ccd1..519ca2e69637 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c @@ -3509,7 +3509,8 @@ out: } EXPORT_SYMBOL_GPL(wm_adsp_compr_open); -int wm_adsp_compr_free(struct snd_compr_stream *stream) +int wm_adsp_compr_free(struct snd_soc_component *component, + struct snd_compr_stream *stream) { struct wm_adsp_compr *compr = stream->runtime->private_data; struct wm_adsp *dsp = compr->dsp; @@ -3583,7 +3584,8 @@ static inline unsigned int wm_adsp_compr_frag_words(struct wm_adsp_compr *compr) return compr->size.fragment_size / WM_ADSP_DATA_WORD_SIZE; } -int wm_adsp_compr_set_params(struct snd_compr_stream *stream, +int wm_adsp_compr_set_params(struct snd_soc_component *component, + struct snd_compr_stream *stream, struct snd_compr_params *params) { struct wm_adsp_compr *compr = stream->runtime->private_data; @@ -3610,7 +3612,8 @@ int wm_adsp_compr_set_params(struct snd_compr_stream *stream, } EXPORT_SYMBOL_GPL(wm_adsp_compr_set_params); -int wm_adsp_compr_get_caps(struct snd_compr_stream *stream, +int wm_adsp_compr_get_caps(struct snd_soc_component *component, + struct snd_compr_stream *stream, struct snd_compr_caps *caps) { struct wm_adsp_compr *compr = stream->runtime->private_data; @@ -3976,7 +3979,8 @@ static int wm_adsp_buffer_get_error(struct wm_adsp_compr_buf *buf) return 0; } -int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd) +int wm_adsp_compr_trigger(struct snd_soc_component *component, + struct snd_compr_stream *stream, int cmd) { struct wm_adsp_compr *compr = stream->runtime->private_data; struct wm_adsp *dsp = compr->dsp; @@ -4139,7 +4143,8 @@ static int wm_adsp_buffer_reenable_irq(struct wm_adsp_compr_buf *buf) buf->irq_count); } -int wm_adsp_compr_pointer(struct snd_compr_stream *stream, +int wm_adsp_compr_pointer(struct snd_soc_component *component, + struct snd_compr_stream *stream, struct snd_compr_tstamp *tstamp) { struct wm_adsp_compr *compr = stream->runtime->private_data; @@ -4297,7 +4302,8 @@ static int wm_adsp_compr_read(struct wm_adsp_compr *compr, return ntotal; } -int wm_adsp_compr_copy(struct snd_compr_stream *stream, char __user *buf, +int wm_adsp_compr_copy(struct snd_soc_component *component, + struct snd_compr_stream *stream, char __user *buf, size_t count) { struct wm_adsp_compr *compr = stream->runtime->private_data; diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 4c481cf20275..1996350b817e 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h @@ -190,16 +190,22 @@ int wm_adsp_fw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); int wm_adsp_compr_open(struct wm_adsp *dsp, struct snd_compr_stream *stream); -int wm_adsp_compr_free(struct snd_compr_stream *stream); -int wm_adsp_compr_set_params(struct snd_compr_stream *stream, +int wm_adsp_compr_free(struct snd_soc_component *component, + struct snd_compr_stream *stream); +int wm_adsp_compr_set_params(struct snd_soc_component *component, + struct snd_compr_stream *stream, struct snd_compr_params *params); -int wm_adsp_compr_get_caps(struct snd_compr_stream *stream, +int wm_adsp_compr_get_caps(struct snd_soc_component *component, + struct snd_compr_stream *stream, struct snd_compr_caps *caps); -int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd); +int wm_adsp_compr_trigger(struct snd_soc_component *component, + struct snd_compr_stream *stream, int cmd); int wm_adsp_compr_handle_irq(struct wm_adsp *dsp); -int wm_adsp_compr_pointer(struct snd_compr_stream *stream, +int wm_adsp_compr_pointer(struct snd_soc_component *component, + struct snd_compr_stream *stream, struct snd_compr_tstamp *tstamp); -int wm_adsp_compr_copy(struct snd_compr_stream *stream, +int wm_adsp_compr_copy(struct snd_soc_component *component, + struct snd_compr_stream *stream, char __user *buf, size_t count); int wm_adsp_write_ctl(struct wm_adsp *dsp, const char *name, int type, unsigned int alg, void *buf, size_t len); diff --git a/sound/soc/codecs/zl38060.c b/sound/soc/codecs/zl38060.c new file mode 100644 index 000000000000..42726dc0ba39 --- /dev/null +++ b/sound/soc/codecs/zl38060.c @@ -0,0 +1,638 @@ +// SPDX-License-Identifier: GPL-2.0-only +// +// Codec driver for Microsemi ZL38060 Connected Home Audio Processor. +// +// Copyright(c) 2020 Sven Van Asbroeck + +// The ZL38060 is very flexible and configurable. This driver implements only a +// tiny subset of the chip's possible configurations: +// +// - DSP block bypassed: DAI routed straight to DACs +// microphone routed straight to DAI +// - chip's internal clock is driven by a 12 MHz external crystal +// - chip's DAI connected to CPU is I2S, and bit + frame clock master +// - chip must be strapped for "host boot": in this mode, firmware will be +// provided by this driver. + +#include <linux/gpio/consumer.h> +#include <linux/gpio/driver.h> +#include <linux/property.h> +#include <linux/spi/spi.h> +#include <linux/regmap.h> +#include <linux/module.h> +#include <linux/ihex.h> + +#include <sound/pcm_params.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/soc.h> + +#define DRV_NAME "zl38060" + +#define ZL38_RATES (SNDRV_PCM_RATE_8000 |\ + SNDRV_PCM_RATE_16000 |\ + SNDRV_PCM_RATE_48000) +#define ZL38_FORMATS SNDRV_PCM_FMTBIT_S16_LE + +#define HBI_FIRMWARE_PAGE 0xFF +#define ZL38_MAX_RAW_XFER 0x100 + +#define REG_TDMA_CFG_CLK 0x0262 +#define CFG_CLK_PCLK_SHIFT 4 +#define CFG_CLK_PCLK_MASK (0x7ff << CFG_CLK_PCLK_SHIFT) +#define CFG_CLK_PCLK(bits) ((bits - 1) << CFG_CLK_PCLK_SHIFT) +#define CFG_CLK_MASTER BIT(15) +#define CFG_CLK_FSRATE_MASK 0x7 +#define CFG_CLK_FSRATE_8KHZ 0x1 +#define CFG_CLK_FSRATE_16KHZ 0x2 +#define CFG_CLK_FSRATE_48KHZ 0x6 + +#define REG_CLK_CFG 0x0016 +#define CLK_CFG_SOURCE_XTAL BIT(15) + +#define REG_CLK_STATUS 0x0014 +#define CLK_STATUS_HWRST BIT(0) + +#define REG_PARAM_RESULT 0x0034 +#define PARAM_RESULT_READY 0xD3D3 + +#define REG_PG255_BASE_HI 0x000C +#define REG_PG255_OFFS(addr) ((HBI_FIRMWARE_PAGE << 8) | (addr & 0xFF)) +#define REG_FWR_EXEC 0x012C + +#define REG_CMD 0x0032 +#define REG_HW_REV 0x0020 +#define REG_FW_PROD 0x0022 +#define REG_FW_REV 0x0024 + +#define REG_SEMA_FLAGS 0x0006 +#define SEMA_FLAGS_BOOT_CMD BIT(0) +#define SEMA_FLAGS_APP_REBOOT BIT(1) + +#define REG_HW_REV 0x0020 +#define REG_FW_PROD 0x0022 +#define REG_FW_REV 0x0024 +#define REG_GPIO_DIR 0x02DC +#define REG_GPIO_DAT 0x02DA + +#define BOOTCMD_LOAD_COMPLETE 0x000D +#define BOOTCMD_FW_GO 0x0008 + +#define FIRMWARE_MAJOR 2 +#define FIRMWARE_MINOR 2 + +struct zl38_codec_priv { + struct device *dev; + struct regmap *regmap; + bool is_stream_in_use[2]; + struct gpio_chip *gpio_chip; +}; + +static int zl38_fw_issue_command(struct regmap *regmap, u16 cmd) +{ + unsigned int val; + int err; + + err = regmap_read_poll_timeout(regmap, REG_SEMA_FLAGS, val, + !(val & SEMA_FLAGS_BOOT_CMD), 10000, + 10000 * 100); + if (err) + return err; + err = regmap_write(regmap, REG_CMD, cmd); + if (err) + return err; + err = regmap_update_bits(regmap, REG_SEMA_FLAGS, SEMA_FLAGS_BOOT_CMD, + SEMA_FLAGS_BOOT_CMD); + if (err) + return err; + + return regmap_read_poll_timeout(regmap, REG_CMD, val, !val, 10000, + 10000 * 100); +} + +static int zl38_fw_go(struct regmap *regmap) +{ + int err; + + err = zl38_fw_issue_command(regmap, BOOTCMD_LOAD_COMPLETE); + if (err) + return err; + + return zl38_fw_issue_command(regmap, BOOTCMD_FW_GO); +} + +static int zl38_fw_enter_boot_mode(struct regmap *regmap) +{ + unsigned int val; + int err; + + err = regmap_update_bits(regmap, REG_CLK_STATUS, CLK_STATUS_HWRST, + CLK_STATUS_HWRST); + if (err) + return err; + + return regmap_read_poll_timeout(regmap, REG_PARAM_RESULT, val, + val == PARAM_RESULT_READY, 1000, 50000); +} + +static int +zl38_fw_send_data(struct regmap *regmap, u32 addr, const void *data, u16 len) +{ + __be32 addr_base = cpu_to_be32(addr & ~0xFF); + int err; + + err = regmap_raw_write(regmap, REG_PG255_BASE_HI, &addr_base, + sizeof(addr_base)); + if (err) + return err; + return regmap_raw_write(regmap, REG_PG255_OFFS(addr), data, len); +} + +static int zl38_fw_send_xaddr(struct regmap *regmap, const void *data) +{ + /* execution address from ihex: 32-bit little endian. + * device register expects 32-bit big endian. + */ + u32 addr = le32_to_cpup(data); + __be32 baddr = cpu_to_be32(addr); + + return regmap_raw_write(regmap, REG_FWR_EXEC, &baddr, sizeof(baddr)); +} + +static int zl38_load_firmware(struct device *dev, struct regmap *regmap) +{ + const struct ihex_binrec *rec; + const struct firmware *fw; + u32 addr; + u16 len; + int err; + + /* how to get this firmware: + * 1. request and download chip firmware from Microsemi + * (provided by Microsemi in srec format) + * 2. convert downloaded firmware from srec to ihex. Simple tool: + * https://gitlab.com/TheSven73/s3-to-irec + * 3. convert ihex to binary (.fw) using ihex2fw tool which is included + * with the Linux kernel sources + */ + err = request_ihex_firmware(&fw, "zl38060.fw", dev); + if (err) + return err; + err = zl38_fw_enter_boot_mode(regmap); + if (err) + goto out; + rec = (const struct ihex_binrec *)fw->data; + while (rec) { + addr = be32_to_cpu(rec->addr); + len = be16_to_cpu(rec->len); + if (addr) { + /* regular data ihex record */ + err = zl38_fw_send_data(regmap, addr, rec->data, len); + } else if (len == 4) { + /* execution address ihex record */ + err = zl38_fw_send_xaddr(regmap, rec->data); + } else { + err = -EINVAL; + } + if (err) + goto out; + /* next ! */ + rec = ihex_next_binrec(rec); + } + err = zl38_fw_go(regmap); + +out: + release_firmware(fw); + return err; +} + + +static int zl38_software_reset(struct regmap *regmap) +{ + unsigned int val; + int err; + + err = regmap_update_bits(regmap, REG_SEMA_FLAGS, SEMA_FLAGS_APP_REBOOT, + SEMA_FLAGS_APP_REBOOT); + if (err) + return err; + + /* wait for host bus interface to settle. + * Not sure if this is required: Microsemi's vendor driver does this, + * but the firmware manual does not mention it. Leave it in, there's + * little downside, apart from a slower reset. + */ + msleep(50); + + return regmap_read_poll_timeout(regmap, REG_SEMA_FLAGS, val, + !(val & SEMA_FLAGS_APP_REBOOT), 10000, + 10000 * 100); +} + +static int zl38_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) +{ + struct zl38_codec_priv *priv = snd_soc_dai_get_drvdata(dai); + int err; + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + /* firmware default is normal i2s */ + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + /* firmware default is normal bitclock and frame */ + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + /* always 32 bits per frame (= 16 bits/channel, 2 channels) */ + err = regmap_update_bits(priv->regmap, REG_TDMA_CFG_CLK, + CFG_CLK_MASTER | CFG_CLK_PCLK_MASK, + CFG_CLK_MASTER | CFG_CLK_PCLK(32)); + if (err) + return err; + break; + default: + return -EINVAL; + } + + return 0; +} + +static int zl38_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct zl38_codec_priv *priv = snd_soc_dai_get_drvdata(dai); + bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; + unsigned int fsrate; + int err; + + /* We cannot change hw_params while the dai is already in use - the + * software reset will corrupt the audio. However, this is not required, + * as the chip's TDM buses are fully symmetric, which mandates identical + * rates, channels, and samplebits for record and playback. + */ + if (priv->is_stream_in_use[!tx]) + goto skip_setup; + + switch (params_rate(params)) { + case 8000: + fsrate = CFG_CLK_FSRATE_8KHZ; + break; + case 16000: + fsrate = CFG_CLK_FSRATE_16KHZ; + break; + case 48000: + fsrate = CFG_CLK_FSRATE_48KHZ; + break; + default: + return -EINVAL; + } + + err = regmap_update_bits(priv->regmap, REG_TDMA_CFG_CLK, + CFG_CLK_FSRATE_MASK, fsrate); + if (err) + return err; + + /* chip requires a software reset to apply audio register changes */ + err = zl38_software_reset(priv->regmap); + if (err) + return err; + +skip_setup: + priv->is_stream_in_use[tx] = true; + + return 0; +} + +static int zl38_hw_free(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct zl38_codec_priv *priv = snd_soc_dai_get_drvdata(dai); + bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; + + priv->is_stream_in_use[tx] = false; + + return 0; +} + +/* stereo bypass with no AEC */ +static const struct reg_sequence cp_config_stereo_bypass[] = { + /* interconnects must be programmed first */ + { 0x0210, 0x0005 }, /* DAC1 in <= I2S1-L */ + { 0x0212, 0x0006 }, /* DAC2 in <= I2S1-R */ + { 0x0214, 0x0001 }, /* I2S1-L in <= MIC1 */ + { 0x0216, 0x0001 }, /* I2S1-R in <= MIC1 */ + { 0x0224, 0x0000 }, /* AEC-S in <= n/a */ + { 0x0226, 0x0000 }, /* AEC-R in <= n/a */ + /* output enables must be programmed next */ + { 0x0202, 0x000F }, /* enable I2S1 + DAC */ +}; + +static const struct snd_soc_dai_ops zl38_dai_ops = { + .set_fmt = zl38_set_fmt, + .hw_params = zl38_hw_params, + .hw_free = zl38_hw_free, +}; + +static struct snd_soc_dai_driver zl38_dai = { + .name = "zl38060-tdma", + .playback = { + .stream_name = "Playback", + .channels_min = 2, + .channels_max = 2, + .rates = ZL38_RATES, + .formats = ZL38_FORMATS, + }, + .capture = { + .stream_name = "Capture", + .channels_min = 2, + .channels_max = 2, + .rates = ZL38_RATES, + .formats = ZL38_FORMATS, + }, + .ops = &zl38_dai_ops, + .symmetric_rates = 1, + .symmetric_samplebits = 1, + .symmetric_channels = 1, +}; + +static const struct snd_soc_dapm_widget zl38_dapm_widgets[] = { + SND_SOC_DAPM_OUTPUT("DAC1"), + SND_SOC_DAPM_OUTPUT("DAC2"), + + SND_SOC_DAPM_INPUT("DMICL"), +}; + +static const struct snd_soc_dapm_route zl38_dapm_routes[] = { + { "DAC1", NULL, "Playback" }, + { "DAC2", NULL, "Playback" }, + + { "Capture", NULL, "DMICL" }, +}; + +static const struct snd_soc_component_driver zl38_component_dev = { + .dapm_widgets = zl38_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(zl38_dapm_widgets), + .dapm_routes = zl38_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(zl38_dapm_routes), + .endianness = 1, + .non_legacy_dai_naming = 1, +}; + +static void chip_gpio_set(struct gpio_chip *c, unsigned int offset, int val) +{ + struct regmap *regmap = gpiochip_get_data(c); + unsigned int mask = BIT(offset); + + regmap_update_bits(regmap, REG_GPIO_DAT, mask, val ? mask : 0); +} + +static int chip_gpio_get(struct gpio_chip *c, unsigned int offset) +{ + struct regmap *regmap = gpiochip_get_data(c); + unsigned int mask = BIT(offset); + unsigned int val; + int err; + + err = regmap_read(regmap, REG_GPIO_DAT, &val); + if (err) + return err; + + return !!(val & mask); +} + +static int chip_direction_input(struct gpio_chip *c, unsigned int offset) +{ + struct regmap *regmap = gpiochip_get_data(c); + unsigned int mask = BIT(offset); + + return regmap_update_bits(regmap, REG_GPIO_DIR, mask, 0); +} + +static int +chip_direction_output(struct gpio_chip *c, unsigned int offset, int val) +{ + struct regmap *regmap = gpiochip_get_data(c); + unsigned int mask = BIT(offset); + + chip_gpio_set(c, offset, val); + return regmap_update_bits(regmap, REG_GPIO_DIR, mask, mask); +} + +static const struct gpio_chip template_chip = { + .owner = THIS_MODULE, + .label = DRV_NAME, + + .base = -1, + .ngpio = 14, + .direction_input = chip_direction_input, + .direction_output = chip_direction_output, + .get = chip_gpio_get, + .set = chip_gpio_set, + + .can_sleep = true, +}; + +static int zl38_check_revision(struct device *dev, struct regmap *regmap) +{ + unsigned int hwrev, fwprod, fwrev; + int fw_major, fw_minor, fw_micro; + int err; + + err = regmap_read(regmap, REG_HW_REV, &hwrev); + if (err) + return err; + err = regmap_read(regmap, REG_FW_PROD, &fwprod); + if (err) + return err; + err = regmap_read(regmap, REG_FW_REV, &fwrev); + if (err) + return err; + + fw_major = (fwrev >> 12) & 0xF; + fw_minor = (fwrev >> 8) & 0xF; + fw_micro = fwrev & 0xFF; + dev_info(dev, "hw rev 0x%x, fw product code %d, firmware rev %d.%d.%d", + hwrev & 0x1F, fwprod, fw_major, fw_minor, fw_micro); + + if (fw_major != FIRMWARE_MAJOR || fw_minor < FIRMWARE_MINOR) { + dev_err(dev, "unsupported firmware. driver supports %d.%d", + FIRMWARE_MAJOR, FIRMWARE_MINOR); + return -EINVAL; + } + + return 0; +} + +static int zl38_bus_read(void *context, + const void *reg_buf, size_t reg_size, + void *val_buf, size_t val_size) +{ + struct spi_device *spi = context; + const u8 *reg_buf8 = reg_buf; + size_t len = 0; + u8 offs, page; + u8 txbuf[4]; + + if (reg_size != 2 || val_size > ZL38_MAX_RAW_XFER) + return -EINVAL; + + offs = reg_buf8[1] >> 1; + page = reg_buf8[0]; + + if (page) { + txbuf[len++] = 0xFE; + txbuf[len++] = page == HBI_FIRMWARE_PAGE ? 0xFF : page - 1; + txbuf[len++] = offs; + txbuf[len++] = val_size / 2 - 1; + } else { + txbuf[len++] = offs | 0x80; + txbuf[len++] = val_size / 2 - 1; + } + + return spi_write_then_read(spi, txbuf, len, val_buf, val_size); +} + +static int zl38_bus_write(void *context, const void *data, size_t count) +{ + struct spi_device *spi = context; + u8 buf[4 + ZL38_MAX_RAW_XFER]; + size_t val_len, len = 0; + const u8 *data8 = data; + u8 offs, page; + + if (count > (2 + ZL38_MAX_RAW_XFER) || count < 4) + return -EINVAL; + val_len = count - 2; + offs = data8[1] >> 1; + page = data8[0]; + + if (page) { + buf[len++] = 0xFE; + buf[len++] = page == HBI_FIRMWARE_PAGE ? 0xFF : page - 1; + buf[len++] = offs; + buf[len++] = (val_len / 2 - 1) | 0x80; + } else { + buf[len++] = offs | 0x80; + buf[len++] = (val_len / 2 - 1) | 0x80; + } + memcpy(buf + len, data8 + 2, val_len); + len += val_len; + + return spi_write(spi, buf, len); +} + +static const struct regmap_bus zl38_regmap_bus = { + .read = zl38_bus_read, + .write = zl38_bus_write, + .max_raw_write = ZL38_MAX_RAW_XFER, + .max_raw_read = ZL38_MAX_RAW_XFER, +}; + +static const struct regmap_config zl38_regmap_conf = { + .reg_bits = 16, + .val_bits = 16, + .reg_stride = 2, + .use_single_read = true, + .use_single_write = true, +}; + +static int zl38_spi_probe(struct spi_device *spi) +{ + struct device *dev = &spi->dev; + struct zl38_codec_priv *priv; + struct gpio_desc *reset_gpio; + int err; + + /* get the chip to a known state by putting it in reset */ + reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); + if (IS_ERR(reset_gpio)) + return PTR_ERR(reset_gpio); + if (reset_gpio) { + /* datasheet: need > 10us for a digital + analog reset */ + usleep_range(15, 50); + /* take the chip out of reset */ + gpiod_set_value_cansleep(reset_gpio, 0); + /* datasheet: need > 3ms for digital section to become stable */ + usleep_range(3000, 10000); + } + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->dev = dev; + dev_set_drvdata(dev, priv); + priv->regmap = devm_regmap_init(dev, &zl38_regmap_bus, spi, + &zl38_regmap_conf); + if (IS_ERR(priv->regmap)) + return PTR_ERR(priv->regmap); + + err = zl38_load_firmware(dev, priv->regmap); + if (err) + return err; + + err = zl38_check_revision(dev, priv->regmap); + if (err) + return err; + + priv->gpio_chip = devm_kmemdup(dev, &template_chip, + sizeof(template_chip), GFP_KERNEL); + if (!priv->gpio_chip) + return -ENOMEM; +#ifdef CONFIG_OF_GPIO + priv->gpio_chip->of_node = dev->of_node; +#endif + err = devm_gpiochip_add_data(dev, priv->gpio_chip, priv->regmap); + if (err) + return err; + + /* setup the cross-point switch for stereo bypass */ + err = regmap_multi_reg_write(priv->regmap, cp_config_stereo_bypass, + ARRAY_SIZE(cp_config_stereo_bypass)); + if (err) + return err; + /* setup for 12MHz crystal connected to the chip */ + err = regmap_update_bits(priv->regmap, REG_CLK_CFG, CLK_CFG_SOURCE_XTAL, + CLK_CFG_SOURCE_XTAL); + if (err) + return err; + + return devm_snd_soc_register_component(dev, &zl38_component_dev, + &zl38_dai, 1); +} + +static const struct of_device_id zl38_dt_ids[] = { + { .compatible = "mscc,zl38060", }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, zl38_dt_ids); + +static const struct spi_device_id zl38_spi_ids[] = { + { "zl38060", 0 }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(spi, zl38_spi_ids); + +static struct spi_driver zl38060_spi_driver = { + .driver = { + .name = DRV_NAME, + .of_match_table = of_match_ptr(zl38_dt_ids), + }, + .probe = zl38_spi_probe, + .id_table = zl38_spi_ids, +}; +module_spi_driver(zl38060_spi_driver); + +MODULE_DESCRIPTION("ASoC ZL38060 driver"); +MODULE_AUTHOR("Sven Van Asbroeck <TheSven73@gmail.com>"); +MODULE_LICENSE("GPL v2"); |