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authorYang Yingliang <yangyingliang@huawei.com>2023-11-29 16:11:47 +0800
committerMark Brown <broonie@kernel.org>2023-12-04 12:38:39 +0000
commit5cb475174cce1bfedf1025b6e235e2c43d81144f (patch)
treefdbba39216ce863ff95558d857c2f1d0a4f5682f /scripts/mksysmap
parent06891af2709b5dfa4081ff1f07b9f4c2743834b7 (diff)
spi: cadence-quadspi: add missing clk_disable_unprepare() in cqspi_probe()
cqspi_jh7110_clk_init() is called after clk_prepare_enable(cqspi->clk), if it fails, it should goto label 'probe_reset_failed' to disable cqspi->clk. In the error path after calling cqspi_jh7110_clk_init(), cqspi_jh7110_disable_clk() need be called. Fixes: 33f1ef6d4eb6 ("spi: cadence-quadspi: Add clock configuration for StarFive JH7110 QSPI") Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20231129081147.628004-1-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'scripts/mksysmap')
0 files changed, 0 insertions, 0 deletions