diff options
author | Dave Airlie <airlied@redhat.com> | 2016-07-15 13:50:58 +1000 |
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committer | Dave Airlie <airlied@redhat.com> | 2016-07-15 13:50:58 +1000 |
commit | ff37c05a996bb96eccc21f4fb1b32ba0e24f3443 (patch) | |
tree | c09b09b37521f2f8f3f7a9bb3b0a33a2b3bde1a1 /include | |
parent | 6c181c82106e12dced317e93a7a396cbb8c64f75 (diff) | |
parent | 0b2c0582f1570bfc95aa9ac1cd340a215d8e8335 (diff) |
Merge tag 'drm-intel-next-2016-07-11' of git://anongit.freedesktop.org/drm-intel into drm-next
- select igt testing depencies for CONFIG_DRM_I915_DEBUG (Chris)
- track outputs in crtc state and clean up all our ad-hoc connector/encoder
walking in modest code (Ville)
- demidlayer drm_device/drm_i915_private (Chris Wilson)
- thundering herd fix from Chris Wilson, with lots of help from Tvrtko Ursulin
- piles of assorted clean and fallout from the thundering herd fix
- documentation and more tuning for waitboosting (Chris)
- pooled EU support on bxt (Arun Siluvery)
- bxt support is no longer considered prelimary!
- ring/engine vfunc cleanup from Tvrtko
- introduce intel_wait_for_register helper (Chris)
- opregion updates (Jani Nukla)
- tuning and fixes for wait_for macros (Tvrkto&Imre)
- more kabylake pci ids (Rodrigo)
- pps cleanup and fixes for bxt (Imre)
- move sink crc support over to atomic state (Maarten)
- fix up async fbdev init ordering (Chris)
- fbc fixes from Paulo and Chris
* tag 'drm-intel-next-2016-07-11' of git://anongit.freedesktop.org/drm-intel: (223 commits)
drm/i915: Update DRIVER_DATE to 20160711
drm/i915: Select DRM_VGEM for igt
drm/i915: Select X86_MSR for igt
drm/i915: Fill unused GGTT with scratch pages for VT-d
drm/i915: Introduce Kabypoint PCH for Kabylake H/DT.
drm/i915:gen9: implement WaMediaPoolStateCmdInWABB
drm/i915: Check for invalid cloning earlier during modeset
drm/i915: Simplify hdmi_12bpc_possible()
drm/i915: Kill has_dsi_encoder
drm/i915: s/INTEL_OUTPUT_DISPLAYPORT/INTEL_OUTPUT_DP/
drm/i915: Replace some open coded intel_crtc_has_dp_encoder()s
drm/i915: Kill has_dp_encoder from pipe_config
drm/i915: Replace manual lvds and sdvo/hdmi counting with intel_crtc_has_type()
drm/i915: Unify intel_pipe_has_type() and intel_pipe_will_have_type()
drm/i915: Add output_types bitmask into the crtc state
drm/i915: Remove encoder type checks from MST suspend/resume
drm/i915: Don't mark eDP encoders as MST capable
drm/i915: avoid wait_for_atomic() in non-atomic host2guc_action()
drm/i915: Group the irq breadcrumb variables into the same cacheline
drm/i915: Wake up the bottom-half if we steal their interrupt
...
Diffstat (limited to 'include')
-rw-r--r-- | include/drm/i915_pciids.h | 10 | ||||
-rw-r--r-- | include/uapi/drm/i915_drm.h | 3 |
2 files changed, 7 insertions, 6 deletions
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index 9094599a1150..33466bfc6440 100644 --- a/include/drm/i915_pciids.h +++ b/include/drm/i915_pciids.h @@ -309,6 +309,7 @@ INTEL_VGA_DEVICE(0x5906, info), /* ULT GT1 */ \ INTEL_VGA_DEVICE(0x590E, info), /* ULX GT1 */ \ INTEL_VGA_DEVICE(0x5902, info), /* DT GT1 */ \ + INTEL_VGA_DEVICE(0x5908, info), /* Halo GT1 */ \ INTEL_VGA_DEVICE(0x590B, info), /* Halo GT1 */ \ INTEL_VGA_DEVICE(0x590A, info) /* SRV GT1 */ @@ -322,15 +323,12 @@ INTEL_VGA_DEVICE(0x591D, info) /* WKS GT2 */ #define INTEL_KBL_GT3_IDS(info) \ + INTEL_VGA_DEVICE(0x5923, info), /* ULT GT3 */ \ INTEL_VGA_DEVICE(0x5926, info), /* ULT GT3 */ \ - INTEL_VGA_DEVICE(0x592B, info), /* Halo GT3 */ \ - INTEL_VGA_DEVICE(0x592A, info) /* SRV GT3 */ + INTEL_VGA_DEVICE(0x5927, info) /* ULT GT3 */ #define INTEL_KBL_GT4_IDS(info) \ - INTEL_VGA_DEVICE(0x5932, info), /* DT GT4 */ \ - INTEL_VGA_DEVICE(0x593B, info), /* Halo GT4 */ \ - INTEL_VGA_DEVICE(0x593A, info), /* SRV GT4 */ \ - INTEL_VGA_DEVICE(0x593D, info) /* WKS GT4 */ + INTEL_VGA_DEVICE(0x593B, info) /* Halo GT4 */ #define INTEL_KBL_IDS(info) \ INTEL_KBL_GT1_IDS(info), \ diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index c17d63d8b543..d7e81a3886fd 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -361,6 +361,8 @@ typedef struct drm_i915_irq_wait { #define I915_PARAM_HAS_GPU_RESET 35 #define I915_PARAM_HAS_RESOURCE_STREAMER 36 #define I915_PARAM_HAS_EXEC_SOFTPIN 37 +#define I915_PARAM_HAS_POOLED_EU 38 +#define I915_PARAM_MIN_EU_IN_POOL 39 typedef struct drm_i915_getparam { __s32 param; @@ -1171,6 +1173,7 @@ struct drm_i915_gem_context_param { #define I915_CONTEXT_PARAM_BAN_PERIOD 0x1 #define I915_CONTEXT_PARAM_NO_ZEROMAP 0x2 #define I915_CONTEXT_PARAM_GTT_SIZE 0x3 +#define I915_CONTEXT_PARAM_NO_ERROR_CAPTURE 0x4 __u64 value; }; |