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authorJianguo Sun <sunjianguo1@huawei.com>2018-01-24 19:48:27 +0800
committerShawn Guo <shawnguo@kernel.org>2018-02-27 09:19:12 +0800
commit80f8ce589517c478abdae07a758b37b362886cb2 (patch)
treeef60a3ff5b9330f5350777f1885fbc7cfccf3abc /include/dt-bindings/clock/histb-clock.h
parenta44d1f531a39da8cd6497372e713f5998b2d67af (diff)
clk: hi3798cv200: add COMBPHY0 clock support
The clock COMBPHY1 has already been supported by hi3798cv200 driver, but COMBPHY0 is missing. It adds COMBPHY0 clock support. Since the mux table is being shared by COMBPHY0 and COMBPHY1, it renames comphy1_mux_p and comphy1_mux_table a bit to drop instance number '1' from there. Signed-off-by: Jianguo Sun <sunjianguo1@huawei.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'include/dt-bindings/clock/histb-clock.h')
-rw-r--r--include/dt-bindings/clock/histb-clock.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/histb-clock.h b/include/dt-bindings/clock/histb-clock.h
index eba850ff0017..fab30b3f78b2 100644
--- a/include/dt-bindings/clock/histb-clock.h
+++ b/include/dt-bindings/clock/histb-clock.h
@@ -61,6 +61,7 @@
#define HISTB_USB2_OTG_UTMI_CLK 39
#define HISTB_USB2_PHY1_REF_CLK 40
#define HISTB_USB2_PHY2_REF_CLK 41
+#define HISTB_COMBPHY0_CLK 42
/* clocks provided by mcu CRG */
#define HISTB_MCE_CLK 1