diff options
author | Hamza Mahfooz <hamza.mahfooz@amd.com> | 2022-10-21 16:37:34 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2022-10-27 15:12:09 -0400 |
commit | aa193f7eff8ff753577351140b8af13b76cdc7c2 (patch) | |
tree | 40490dd315605295659c7c072f41f52054b665a3 /include/drm/drm_connector.h | |
parent | c9bdc6c3cf39df6db9c611d05fc512b1276b1cc8 (diff) |
drm/edid: add a quirk for two LG monitors to get them to work on 10bpc
The LG 27GP950 and LG 27GN950 have visible display corruption when
trying to use 10bpc modes. So, to fix this, cap their maximum DSC
target bitrate to 15bpp.
Suggested-by: Roman Li <roman.li@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include/drm/drm_connector.h')
-rw-r--r-- | include/drm/drm_connector.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h index 56aee949c6fa..4d830fc55a3d 100644 --- a/include/drm/drm_connector.h +++ b/include/drm/drm_connector.h @@ -656,6 +656,12 @@ struct drm_display_info { * @mso_pixel_overlap: eDP MSO segment pixel overlap, 0-8 pixels. */ u8 mso_pixel_overlap; + + /** + * @max_dsc_bpp: Maximum DSC target bitrate, if it is set to 0 the + * monitor's default value is used instead. + */ + u32 max_dsc_bpp; }; int drm_display_info_set_bus_formats(struct drm_display_info *info, |