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author | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2018-04-17 16:29:54 +0200 |
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committer | Mark Brown <broonie@kernel.org> | 2018-04-18 12:37:33 +0100 |
commit | 0af7af7da6510f12595b81ba98bb15dd7ffed1f3 (patch) | |
tree | 84101deb60b650cd3cfa07d5daac5940111a82f5 /drivers/spi/spi-cadence.c | |
parent | f6364e66c66135f40709635849620411f3f8a2ff (diff) |
spi: spi-s3c64xx: Allow higher transfer lengths in polling IO mode
Some variants of the SPI controller have no DMA support, in such case
SPI transfers longer than the FIFO length are not currently properly
handled by the driver. Fix it by doing multiple transfers in the
s3c64xx_spi_transfer_one() function if the SPI transfer length exceeds
the FIFO size.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Andi Shyti <andi@etezian.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-cadence.c')
0 files changed, 0 insertions, 0 deletions