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authorTomi Valkeinen <tomi.valkeinen@ideasonboard.com>2023-11-09 09:37:57 +0200
committerTomi Valkeinen <tomi.valkeinen@ideasonboard.com>2023-12-01 12:04:42 +0200
commit36d1e0852680aa038e2428d450673390111b165c (patch)
treeaaaf912f9d48b8cc16447fadc686427b7dcbc771 /drivers/gpu/drm/tidss
parentc2746e4d278be8f71ef0dbcd00fcc8ba46c678ef (diff)
drm/tidss: Move reset to the end of dispc_init()
We do a DSS reset in the middle of the dispc_init(). While that happens to work now, we should really make sure that e..g the fclk, which is acquired only later in the function, is enabled when doing a reset. This will be handled in a later patch, but for now, let's move the dispc_softreset() call to the end of dispc_init(), which is a sensible place for it anyway. Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Aradhya Bhatia <a-bhatia1@ti.com> Link: https://lore.kernel.org/r/20231109-tidss-probe-v2-4-ac91b5ea35c0@ideasonboard.com Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Diffstat (limited to 'drivers/gpu/drm/tidss')
-rw-r--r--drivers/gpu/drm/tidss/tidss_dispc.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c
index 1dfd95a54e64..bce5432d26f3 100644
--- a/drivers/gpu/drm/tidss/tidss_dispc.c
+++ b/drivers/gpu/drm/tidss/tidss_dispc.c
@@ -2836,10 +2836,6 @@ int dispc_init(struct tidss_device *tidss)
return r;
}
- /* K2G display controller does not support soft reset */
- if (feat->subrev != DISPC_K2G)
- dispc_softreset(dispc);
-
for (i = 0; i < dispc->feat->num_vps; i++) {
u32 gamma_size = dispc->feat->vp_feat.color.gamma_size;
u32 *gamma_table;
@@ -2888,6 +2884,10 @@ int dispc_init(struct tidss_device *tidss)
of_property_read_u32(dispc->dev->of_node, "max-memory-bandwidth",
&dispc->memory_bandwidth_limit);
+ /* K2G display controller does not support soft reset */
+ if (feat->subrev != DISPC_K2G)
+ dispc_softreset(dispc);
+
tidss->dispc = dispc;
return 0;