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authorJani Nikula <jani.nikula@intel.com>2024-06-04 18:25:33 +0300
committerJani Nikula <jani.nikula@intel.com>2024-06-07 11:13:17 +0300
commit62148804b6e2ff49d19f58b34f247d2974061dc8 (patch)
tree60a278e5b427bc6e3b7f14fbd14c21aae86084e1 /drivers/gpu/drm/i915/i915_reg.h
parent201008c44fd745e44f1fc6d7bbc235012a8995af (diff)
drm/i915: pass dev_priv explicitly to PFIT_CONTROL
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the PFIT_CONTROL register macro. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/fad44d3d987d914c83844cdf172adaa19772e035.1717514638.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 710078a6bf3f..ca3d43e5061a 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1507,7 +1507,7 @@
#define VIDEO_DIP_ENABLE_AS_ADL REG_BIT(23)
/* Panel fitting */
-#define PFIT_CONTROL _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x61230)
+#define PFIT_CONTROL(dev_priv) _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x61230)
#define PFIT_ENABLE REG_BIT(31)
#define PFIT_PIPE_MASK REG_GENMASK(30, 29) /* 965+ */
#define PFIT_PIPE(pipe) REG_FIELD_PREP(PFIT_PIPE_MASK, (pipe))