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authorJouni Högander <jouni.hogander@intel.com>2024-06-18 08:30:21 +0300
committerJouni Högander <jouni.hogander@intel.com>2024-06-19 07:42:09 +0300
commitb445130c35e5bfe7917e44140e259b2babeec87f (patch)
tree37b8da7234500fbfad684861218106a8e0cfa2e5 /drivers/gpu/drm/i915/display
parent22f3a60558da4509c0c3fa49b82a5d7e6f677cf5 (diff)
drm/i915/psr: Disable Panel Replay if PSR mode is set via module parameter
If user is specifically limiting PSR mode to PSR1 or PSR2: disable Panel Replay. With default value -1 all modes are allowed including Panel Replay. Disabling PSR using value 0 disables Panel Replay as well. Also own compute config helper is added for Panel Replay. This makes sense because number of Panel Replay specific checks are increasing. v2: Squash adding Panel Replay compute config helper Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-5-jouni.hogander@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display')
-rw-r--r--drivers/gpu/drm/i915/display/intel_display_params.c3
-rw-r--r--drivers/gpu/drm/i915/display/intel_psr.c27
2 files changed, 26 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index aebdb7b59dbf..79107607a6ff 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -106,8 +106,7 @@ intel_display_param_named_unsafe(enable_fbc, int, 0400,
intel_display_param_named_unsafe(enable_psr, int, 0400,
"Enable PSR "
- "(0=disabled, 1=enable up to PSR1 and Panel Replay full frame update, "
- "2=enable up to PSR2 and Panel Replay Selective Update) "
+ "(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
"Default: -1 (use per-chip default)");
intel_display_param_named(psr_safest_params, bool, 0400,
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 2a33e35ceeff..cfce0fe05d92 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -235,6 +235,15 @@ static bool psr2_global_enabled(struct intel_dp *intel_dp)
}
}
+static bool panel_replay_global_enabled(struct intel_dp *intel_dp)
+{
+ struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+
+ if (i915->display.params.enable_psr != -1)
+ return false;
+ return true;
+}
+
static u32 psr_irq_psr_error_bit_get(struct intel_dp *intel_dp)
{
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
@@ -1455,6 +1464,21 @@ static bool _psr_compute_config(struct intel_dp *intel_dp,
return true;
}
+static bool _panel_replay_compute_config(struct intel_dp *intel_dp)
+{
+ struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+
+ if (!CAN_PANEL_REPLAY(intel_dp))
+ return false;
+
+ if (!panel_replay_global_enabled(intel_dp)) {
+ drm_dbg_kms(&i915->drm, "Panel Replay disabled by flag\n");
+ return false;
+ }
+
+ return true;
+}
+
void intel_psr_compute_config(struct intel_dp *intel_dp,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
@@ -1490,8 +1514,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
return;
}
- if (CAN_PANEL_REPLAY(intel_dp))
- crtc_state->has_panel_replay = true;
+ crtc_state->has_panel_replay = _panel_replay_compute_config(intel_dp);
crtc_state->has_psr = crtc_state->has_panel_replay ? true :
_psr_compute_config(intel_dp, crtc_state);