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authorVinod Koul <vinod.koul@intel.com>2016-07-16 20:10:03 +0530
committerVinod Koul <vinod.koul@intel.com>2016-07-16 20:10:03 +0530
commit5debef8a4543663881692588449df46c94e7343c (patch)
tree3fd541f26aed2c0db998b20b4bee91799f7f829f /drivers/dma
parent3cf3b64c0fab11861eb52ab09182806fb1e73842 (diff)
parent2e4ed0879eb15230cb58c3915ac51620480375c3 (diff)
Merge branch 'topic/edma' into for-linus
Diffstat (limited to 'drivers/dma')
-rw-r--r--drivers/dma/edma.c15
1 files changed, 9 insertions, 6 deletions
diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
index 3c84cd8215f7..b95ef7482c52 100644
--- a/drivers/dma/edma.c
+++ b/drivers/dma/edma.c
@@ -1112,14 +1112,17 @@ static struct dma_async_tx_descriptor *edma_prep_slave_sg(
edesc->absync = ret;
edesc->residue += sg_dma_len(sg);
- /* If this is the last in a current SG set of transactions,
- enable interrupts so that next set is processed */
- if (!((i+1) % MAX_NR_SG))
- edesc->pset[i].param.opt |= TCINTEN;
-
- /* If this is the last set, enable completion interrupt flag */
if (i == sg_len - 1)
+ /* Enable completion interrupt */
edesc->pset[i].param.opt |= TCINTEN;
+ else if (!((i+1) % MAX_NR_SG))
+ /*
+ * Enable early completion interrupt for the
+ * intermediateset. In this case the driver will be
+ * notified when the paRAM set is submitted to TC. This
+ * will allow more time to set up the next set of slots.
+ */
+ edesc->pset[i].param.opt |= (TCINTEN | TCCMODE);
}
edesc->residue_stat = edesc->residue;