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authorDave Jiang <dave.jiang@intel.com>2022-04-11 15:11:16 -0700
committerVinod Koul <vkoul@kernel.org>2022-04-20 17:17:33 +0530
commit23084545dbb0ac0d1f0acad915bdeed7bd5f48cd (patch)
treed8890a26513f1f8927a97b3a07cc2800caf8d0f6 /drivers/dma
parent4e5a4eb20393b851590b4465f1197a8041c2076b (diff)
dmaengine: idxd: set max_xfer and max_batch for RO device
Load the max_xfer_size and max_batch_size values from the values read from registers to the shadow variables. This will allow the read-only device to display the correct values for the sysfs attributes. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/164971507673.2201761.11244446608988838897.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/dma')
-rw-r--r--drivers/dma/idxd/device.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/dma/idxd/device.c b/drivers/dma/idxd/device.c
index 2903f8bb30e1..4f5c2367ec93 100644
--- a/drivers/dma/idxd/device.c
+++ b/drivers/dma/idxd/device.c
@@ -1031,6 +1031,9 @@ static int idxd_wq_load_config(struct idxd_wq *wq)
wq->priority = wq->wqcfg->priority;
+ wq->max_xfer_bytes = 1ULL << wq->wqcfg->max_xfer_shift;
+ wq->max_batch_size = 1ULL << wq->wqcfg->max_batch_shift;
+
for (i = 0; i < WQCFG_STRIDES(idxd); i++) {
wqcfg_offset = WQCFG_OFFSET(idxd, wq->id, i);
dev_dbg(dev, "WQ[%d][%d][%#x]: %#x\n", wq->id, i, wqcfg_offset, wq->wqcfg->bits[i]);