diff options
author | Geert Uytterhoeven <geert+renesas@glider.be> | 2014-03-25 12:16:24 +0100 |
---|---|---|
committer | Mike Turquette <mturquette@linaro.org> | 2014-05-23 14:10:59 -0700 |
commit | fb8abb7aefe8454e3b478ef11da78ea25b891ad4 (patch) | |
tree | ac1417753c25cf241ce3a08dfcac340c159f49f6 /drivers/clk/versatile | |
parent | 79c6ab509558f9871175c7e4411f857de12cf33b (diff) |
clk: Neaten clk_summary output
- Limit ruler to 80 characters (was: 81),
- Widen rate column by 1 for nicer spacing,
- Right-align numbers and their column headers,
- Move a newline to reduce the number of seq_printf() calls,
- Use set_puts() for fixed strings.
Before:
clock enable_cnt prepare_cnt rate accuracy
---------------------------------------------------------------------------------
extal 2 2 20000000 0
thermal 1 1 20000000 0
cp 0 0 10000000 0
tpu0 0 0 10000000 0
tmu0 0 0 10000000 0
main 1 1 20000000 0
pll3 0 0 1600000000 0
ddr 0 0 200000000 0
zb3d2 0 0 200000000 0
zb3 0 0 400000000 0
pll1 4 4 1560000000 0
oscclk 0 0 126953 0
rclk 1 1 31738 0
cmt1 0 0 31738 0
cmt0 1 1 31738 0
imp 0 0 390000000 0
After:
clock enable_cnt prepare_cnt rate accuracy
--------------------------------------------------------------------------------
extal 2 2 20000000 0
thermal 1 1 20000000 0
cp 0 0 10000000 0
tpu0 0 0 10000000 0
tmu0 0 0 10000000 0
main 1 1 20000000 0
pll3 0 0 1600000000 0
ddr 0 0 200000000 0
zb3d2 0 0 200000000 0
zb3 0 0 400000000 0
pll1 4 4 1560000000 0
oscclk 0 0 126953 0
rclk 1 1 31738 0
cmt1 0 0 31738 0
cmt0 1 1 31738 0
imp 0 0 390000000 0
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/versatile')
0 files changed, 0 insertions, 0 deletions