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| author | Weiyi Lu <weiyi.lu@mediatek.com> | 2018-12-14 10:04:17 +0800 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2019-02-05 13:28:04 -0800 |
| commit | 51ff86dd1069a9ea52672efb20b89dbaff6dffe1 (patch) | |
| tree | b2d353b0726ed3d5c80f417a1a48269248f58750 /drivers/clk/samsung | |
| parent | c3424f59a0cb994a098c3701bf14617580a18290 (diff) | |
clk: mediatek: update clock driver of MT2712
According to 3rd ECO design change,
1. Add new fixed factor clock of audio.
2. Add the parent clocks for audio clock mux.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/samsung')
0 files changed, 0 insertions, 0 deletions