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| author | Arnd Bergmann <arnd@arndb.de> | 2011-07-21 16:53:43 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2011-07-21 16:53:43 +0200 |
| commit | 1d9e5a2bdaafee792fb68cd4381a292e9e340783 (patch) | |
| tree | 33e4a0fea0b2d4a08e1776c83c9f0a29d7fc1f90 /arch | |
| parent | e8885cb68dbdaa0a292bf1defc98addd0aed9b04 (diff) | |
| parent | 41ff445cdb8b3d618425f8a16e2b873046bbe536 (diff) | |
Merge branch 'msm/fixes' into next/fixes
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-msm/platsmp.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c index 2034098cf015..5ba77d00361c 100644 --- a/arch/arm/mach-msm/platsmp.c +++ b/arch/arm/mach-msm/platsmp.c @@ -18,6 +18,7 @@ #include <asm/hardware/gic.h> #include <asm/cacheflush.h> +#include <asm/cputype.h> #include <asm/mach-types.h> #include <mach/msm_iomap.h> @@ -40,6 +41,12 @@ volatile int pen_release = -1; static DEFINE_SPINLOCK(boot_lock); +static inline int get_core_count(void) +{ + /* 1 + the PART[1:0] field of MIDR */ + return ((read_cpuid_id() >> 4) & 3) + 1; +} + void __cpuinit platform_secondary_init(unsigned int cpu) { /* Configure edge-triggered PPIs */ @@ -147,9 +154,9 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) */ void __init smp_init_cpus(void) { - unsigned int i; + unsigned int i, ncores = get_core_count(); - for (i = 0; i < NR_CPUS; i++) + for (i = 0; i < ncores; i++) set_cpu_possible(i, true); set_smp_cross_call(gic_raise_softirq); |