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authorYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>2011-03-07 21:59:45 +0000
committerDavid S. Miller <davem@davemloft.net>2011-03-14 14:10:15 -0700
commite47c90523484518aac30498150e427d824ace705 (patch)
tree04a57da9305eca9a5202fd5f16627930b922e4a1 /arch/sh
parentc5ed53687b39c195b4730de8c0355c1b78054ba6 (diff)
net: sh_eth: modify the PHY_INTERFACE_MODE
The previous code had hardcoded the PHY_INTERFACE_MODE_MII of phy_connect. So some Gigabit PHYs will not behave correctly. The patch adds the phy_interface in sh_eth_plat_data, so we can select the phy interface. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sh')
-rw-r--r--arch/sh/include/asm/sh_eth.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/sh/include/asm/sh_eth.h b/arch/sh/include/asm/sh_eth.h
index 155769601065..e86c880b7e4c 100644
--- a/arch/sh/include/asm/sh_eth.h
+++ b/arch/sh/include/asm/sh_eth.h
@@ -1,6 +1,8 @@
#ifndef __ASM_SH_ETH_H__
#define __ASM_SH_ETH_H__
+#include <linux/phy.h>
+
enum {EDMAC_LITTLE_ENDIAN, EDMAC_BIG_ENDIAN};
enum {
SH_ETH_REG_GIGABIT,
@@ -12,6 +14,7 @@ struct sh_eth_plat_data {
int phy;
int edmac_endian;
int register_type;
+ phy_interface_t phy_interface;
unsigned char mac_addr[6];
unsigned no_ether_link:1;