diff options
| author | Conor Dooley <conor.dooley@microchip.com> | 2022-10-25 20:56:44 +0100 |
|---|---|---|
| committer | Conor Dooley <conor.dooley@microchip.com> | 2022-10-31 19:47:07 +0000 |
| commit | d6105a8b7c160a73ae04054c8921eba80a294146 (patch) | |
| tree | 10ebcfff25b3d8e2408728f3dda38674bc7fd9f8 /arch/riscv | |
| parent | 0d814000ad3589bf4f69c9cb25a3b77bbd55ffec (diff) | |
riscv: dts: microchip: fix memory node unit address for icicle
Evidently I forgot to update the unit address for the 38-bit cached
memory node when I changed the address in the reg property..
Update it to match.
Fixes: 6c1193301791 ("riscv: dts: microchip: update memory configuration for v2022.10")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'arch/riscv')
| -rw-r--r-- | arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts index b04e3ff044b0..90b261114763 100644 --- a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts +++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts @@ -67,7 +67,7 @@ status = "okay"; }; - ddrc_cache_hi: memory@1000000000 { + ddrc_cache_hi: memory@1040000000 { device_type = "memory"; reg = <0x10 0x40000000 0x0 0x40000000>; status = "okay"; |