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authorJordan Niethe <jniethe5@gmail.com>2023-12-01 18:56:10 +0530
committerMichael Ellerman <mpe@ellerman.id.au>2023-12-07 23:33:07 +1100
commitec0f6639fa8853cf6bfdfc3588aada7eeb7e5e37 (patch)
treef37001db1c36d29fc39fa2f43fbe2884418ad0d9 /arch/powerpc/kvm
parente678748a8dca5b57041a84a66577f6168587b3f7 (diff)
KVM: PPC: Book3S HV nestedv2: Ensure LPCR_MER bit is passed to the L0
LPCR_MER is conditionally set during entry to a guest if there is a pending external interrupt. In the nestedv2 case, this change is not being communicated to the L0, which means it is not being set in the L2. Ensure the updated LPCR value is passed to the L0. Signed-off-by: Jordan Niethe <jniethe5@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20231201132618.555031-6-vaibhav@linux.ibm.com
Diffstat (limited to 'arch/powerpc/kvm')
-rw-r--r--arch/powerpc/kvm/book3s_hv.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 069c336b6f3c..6d1f0bca27aa 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -4084,6 +4084,8 @@ static int kvmhv_vcpu_entry_nestedv2(struct kvm_vcpu *vcpu, u64 time_limit,
if (rc < 0)
return -EINVAL;
+ kvmppc_gse_put_u64(io->vcpu_run_input, KVMPPC_GSID_LPCR, lpcr);
+
accumulate_time(vcpu, &vcpu->arch.in_guest);
rc = plpar_guest_run_vcpu(0, vcpu->kvm->arch.lpid, vcpu->vcpu_id,
&trap, &i);