diff options
author | Nicholas Piggin <npiggin@gmail.com> | 2018-11-07 10:21:02 +0800 |
---|---|---|
committer | Ley Foon Tan <ley.foon.tan@intel.com> | 2019-03-07 05:29:35 +0800 |
commit | 737a3fa20f2e195d94d9501ab5d76c29194d8176 (patch) | |
tree | 76cde8285db6e6e3f24450bce8a3b8ea593f282d /arch/nios2 | |
parent | c6b1d363f883996e62bdb8655e472890d7dfd7ca (diff) |
nios2: flush_tlb_all use TLBMISC way auto-increment feature
Writes to TLBACC cause TLBMISC way to be incremented, which can be
used to iterate over ways in a set, then wrap back to zero ready for
the next set. This reduces register writes significantly.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'arch/nios2')
-rw-r--r-- | arch/nios2/mm/tlb.c | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/arch/nios2/mm/tlb.c b/arch/nios2/mm/tlb.c index 58c16d35f501..2469f88ef7f3 100644 --- a/arch/nios2/mm/tlb.c +++ b/arch/nios2/mm/tlb.c @@ -242,21 +242,20 @@ void flush_tlb_all(void) unsigned long addr = 0; unsigned int line; unsigned int way; - unsigned long org_misc, pid_misc, tlbmisc; + unsigned long org_misc, pid_misc; /* remember pid/way until we return */ get_misc_and_pid(&org_misc, &pid_misc); + /* Start at way 0, way is auto-incremented after each TLBACC write */ + WRCTL(CTL_TLBMISC, TLBMISC_WE); + /* Map each TLB entry to physcal address 0 with no-access and a bad ptbase */ for (line = 0; line < cpuinfo.tlb_num_lines; line++) { WRCTL(CTL_PTEADDR, pteaddr_invalid(addr)); - - for (way = 0; way < cpuinfo.tlb_num_ways; way++) { - tlbmisc = TLBMISC_WE | (way << TLBMISC_WAY_SHIFT); - WRCTL(CTL_TLBMISC, tlbmisc); + for (way = 0; way < cpuinfo.tlb_num_ways; way++) WRCTL(CTL_TLBACC, 0); - } addr += PAGE_SIZE; } |