diff options
| author | David Daney <ddaney@caviumnetworks.com> | 2008-12-11 15:33:34 -0800 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2009-01-11 09:57:24 +0000 |
| commit | 126336f065e5d80bd2f4c3199df8a573eb0abcf7 (patch) | |
| tree | 7f3674d7491979a2ed82f55e7ee11453ad85a576 /arch/mips/kernel/branch.c | |
| parent | 2a219b0eaa7bb9f1a7dae4e8ac5b1bf68adab289 (diff) | |
MIPS: Compute branch returns for Cavium OCTEON specific branch instructions.
For Cavium OCTEON, compute the return epc value for OCTEON specific
branch instructions.
Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/branch.c')
| -rw-r--r-- | arch/mips/kernel/branch.c | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c index 6b5df8bfab85..0176ed015c89 100644 --- a/arch/mips/kernel/branch.c +++ b/arch/mips/kernel/branch.c @@ -205,6 +205,39 @@ int __compute_return_epc(struct pt_regs *regs) break; } break; +#ifdef CONFIG_CPU_CAVIUM_OCTEON + case lwc2_op: /* This is bbit0 on Octeon */ + if ((regs->regs[insn.i_format.rs] & (1ull<<insn.i_format.rt)) + == 0) + epc = epc + 4 + (insn.i_format.simmediate << 2); + else + epc += 8; + regs->cp0_epc = epc; + break; + case ldc2_op: /* This is bbit032 on Octeon */ + if ((regs->regs[insn.i_format.rs] & + (1ull<<(insn.i_format.rt+32))) == 0) + epc = epc + 4 + (insn.i_format.simmediate << 2); + else + epc += 8; + regs->cp0_epc = epc; + break; + case swc2_op: /* This is bbit1 on Octeon */ + if (regs->regs[insn.i_format.rs] & (1ull<<insn.i_format.rt)) + epc = epc + 4 + (insn.i_format.simmediate << 2); + else + epc += 8; + regs->cp0_epc = epc; + break; + case sdc2_op: /* This is bbit132 on Octeon */ + if (regs->regs[insn.i_format.rs] & + (1ull<<(insn.i_format.rt+32))) + epc = epc + 4 + (insn.i_format.simmediate << 2); + else + epc += 8; + regs->cp0_epc = epc; + break; +#endif } return 0; |