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authorMarc Zyngier <maz@kernel.org>2024-07-03 16:47:43 +0100
committerOliver Upton <oliver.upton@linux.dev>2024-07-03 22:46:14 +0000
commit3cfde36df7aba306e31209ec882a9e015f2d5963 (patch)
tree24e860a7137c2a57e2543b7fa036866c9cfc9b28 /arch/arm64/kvm/nested.c
parent0feec7769a63ef15401a9820c2039e26f0391825 (diff)
KVM: arm64: nv: Truely enable nXS TLBI operations
Although we now have support for nXS-flavoured TLBI instructions, we still don't expose the feature to the guest thanks to a mixture of misleading comment and use of a bunch of magic values. Fix the comment and correctly express the masking of LS64, which is enough to expose nXS to the world. Not that anyone cares... Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20240703154743.824824-1-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
Diffstat (limited to 'arch/arm64/kvm/nested.c')
-rw-r--r--arch/arm64/kvm/nested.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c
index 451926cb6c5d..4b51d7a59c2d 100644
--- a/arch/arm64/kvm/nested.c
+++ b/arch/arm64/kvm/nested.c
@@ -810,8 +810,8 @@ static u64 limit_nv_id_reg(u32 id, u64 val)
break;
case SYS_ID_AA64ISAR1_EL1:
- /* Support everything but Spec Invalidation */
- val &= ~(GENMASK_ULL(63, 56) |
+ /* Support everything but Spec Invalidation and LS64 */
+ val &= ~(NV_FTR(ISAR1, LS64) |
NV_FTR(ISAR1, SPECRES));
break;