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authorAndre Przywara <andre.przywara@arm.com>2020-05-13 11:30:12 +0100
committerSudeep Holla <sudeep.holla@arm.com>2020-05-18 17:08:54 +0100
commit36d48981d6adf2d3a1d9713df7c145b6f4b4ef22 (patch)
tree2aa87c19049878c363789764bd6a1f21da7c45d4 /arch/arm64/boot/dts/arm
parent9d0a36ddcc523e8c64781ac4b38cae8410736c56 (diff)
arm64: dts: juno: Fix GPU interrupt order
The Mali binding insists on the GPU interrupts to be in ordered as: job, mmu, gpu. Sort the GPU interrupts and interrupt-names properties accordingly. Link: https://lore.kernel.org/r/20200513103016.130417-17-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Diffstat (limited to 'arch/arm64/boot/dts/arm')
-rw-r--r--arch/arm64/boot/dts/arm/juno-base.dtsi8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index bd4e0b15f9c8..9228d1b60358 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -501,10 +501,10 @@
gpu: gpu@2d000000 {
compatible = "arm,juno-mali", "arm,mali-t624";
reg = <0 0x2d000000 0 0x10000>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "gpu", "job", "mmu";
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "job", "mmu", "gpu";
clocks = <&scpi_dvfs 2>;
power-domains = <&scpi_devpd 1>;
dma-coherent;