diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2016-05-20 09:10:00 +0200 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2016-05-30 09:37:11 +0900 |
| commit | 1178814b0fc3649a9c586554e8f6d4f161a97c1f (patch) | |
| tree | e40d07c462c39e6d8b2862b26330fde4f0b50890 /arch/arm/boot/dts/sh73a0.dtsi | |
| parent | 34ea4b4a827b4ee76295501b7df61fc904ab8ae3 (diff) | |
ARM: dts: sh73a0: Fix W=1 dtc warnings
Warning (unit_address_vs_reg): Node /cache-controller has a reg or ranges property, but no unit name
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/sh73a0.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sh73a0.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi index c4f434cdec60..032fe2f14b16 100644 --- a/arch/arm/boot/dts/sh73a0.dtsi +++ b/arch/arm/boot/dts/sh73a0.dtsi @@ -55,7 +55,7 @@ <0xf0000100 0x100>; }; - L2: cache-controller { + L2: cache-controller@f0100000 { compatible = "arm,pl310-cache"; reg = <0xf0100000 0x1000>; interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; |