diff options
author | Luca Weiss <luca@z3ntu.xyz> | 2023-11-30 21:35:20 +0100 |
---|---|---|
committer | Bjorn Andersson <andersson@kernel.org> | 2023-12-08 19:31:29 -0800 |
commit | fc209f869310776c437daba478246df64d82c38b (patch) | |
tree | bc5d9158678775e81912d4bdcd2e9aace2fa47e1 /arch/arm/boot/dts/qcom | |
parent | c9c8179d0ccdf024ce467b4c9cf5de8821bc02cb (diff) |
ARM: dts: qcom: msm8226: Add GPU
The msm8226 SoC contains an Adreno 305B. Add a node to configure it.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20231130-msm8226-gpu-v1-3-6bb2f1b29e49@z3ntu.xyz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/qcom')
-rw-r--r-- | arch/arm/boot/dts/qcom/qcom-msm8226.dtsi | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi index b9686e75fe1d..b492c95e5d30 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi @@ -1006,6 +1006,46 @@ "ref"; }; }; + + gpu: adreno@fdb00000 { + compatible = "qcom,adreno-305.18", "qcom,adreno"; + reg = <0xfdb00000 0x10000>; + reg-names = "kgsl_3d0_reg_memory"; + + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "kgsl_3d0_irq"; + + clocks = <&mmcc OXILI_GFX3D_CLK>, + <&mmcc OXILICX_AHB_CLK>, + <&mmcc OXILICX_AXI_CLK>; + clock-names = "core", "iface", "mem_iface"; + + sram = <&gmu_sram>; + power-domains = <&mmcc OXILICX_GDSC>; + operating-points-v2 = <&gpu_opp_table>; + + status = "disabled"; + + gpu_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-450000000 { + opp-hz = /bits/ 64 <450000000>; + }; + + opp-320000000 { + opp-hz = /bits/ 64 <320000000>; + }; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + }; + + opp-19000000 { + opp-hz = /bits/ 64 <19000000>; + }; + }; + }; }; thermal-zones { |