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authorLi Yang <leoyang.li@nxp.com>2021-11-08 18:10:18 -0600
committerLi Yang <leoyang.li@nxp.com>2022-02-18 17:11:16 -0600
commit6b4266b8deb857ce2dc2a9b769b242865b9a0bce (patch)
treede864df9f9d6a0bee6cf1dc44d95ab5f14fd8e12 /Documentation
parentefd12405f1801ef0458d908a844317fb1388c3bf (diff)
dt-bindings: fsl,layerscape-dcfg: add missing compatible for lx2160a
The compatible string is already in use, fix the chip list in binding to include it. Signed-off-by: Li Yang <leoyang.li@nxp.com> Acked-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt2
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt
index b5cb374dc47d..10a91cc8b997 100644
--- a/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt
+++ b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt
@@ -8,7 +8,7 @@ Required properties:
- compatible: Should contain a chip-specific compatible string,
Chip-specific strings are of the form "fsl,<chip>-dcfg",
The following <chip>s are known to be supported:
- ls1012a, ls1021a, ls1043a, ls1046a, ls2080a.
+ ls1012a, ls1021a, ls1043a, ls1046a, ls2080a, lx2160a
- reg : should contain base address and length of DCFG memory-mapped registers