diff options
| author | David Bauer <mail@david-bauer.net> | 2021-05-22 09:44:53 +0200 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2021-05-24 09:51:38 +0100 |
| commit | ab053f48f9264ed5c714d0427b3115f121d4c476 (patch) | |
| tree | 900673a2d3364524774e758fc8f0414c763367d4 | |
| parent | 42a7dfa26fc6df1624d7c2955200e5053dd0b818 (diff) | |
spi: ath79: set number of chipselect lines
All chipsets from AR7100 up to QCA9563 have three dedicated chipselect
lines for the integrated SPI controller. Set the number of chipselect
lines available on the controller to this value.
Signed-off-by: David Bauer <mail@david-bauer.net>
Link: https://lore.kernel.org/r/20210522074453.39299-2-mail@david-bauer.net
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | drivers/spi/spi-ath79.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/spi/spi-ath79.c b/drivers/spi/spi-ath79.c index 497d5c028496..d1e287d2d9cd 100644 --- a/drivers/spi/spi-ath79.c +++ b/drivers/spi/spi-ath79.c @@ -153,6 +153,7 @@ static int ath79_spi_probe(struct platform_device *pdev) master->use_gpio_descriptors = true; master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); master->flags = SPI_MASTER_GPIO_SS; + master->num_chipselect = 3; sp->bitbang.master = master; sp->bitbang.chipselect = ath79_spi_chipselect; |