diff options
author | Christophe Leroy <christophe.leroy@csgroup.eu> | 2023-06-21 12:40:50 +0200 |
---|---|---|
committer | Michael Ellerman <mpe@ellerman.id.au> | 2023-08-16 23:54:48 +1000 |
commit | 6039fcd3fba99451ea9d013c4d3a65a40b2feff0 (patch) | |
tree | c987967dd9bf556ea9f21a73b439061144e5e670 | |
parent | 0d5769f9503d9a88661b82fee6a320e711f8b01a (diff) |
powerpc/reg: Remove #ifdef around mtspr macro
That ifdef was introduced by commit 1458dd951f7c ("powerpc/8xx:
Handle CPU6 ERRATA directly in mtspr() macro") and left over by
commit 2a45addd21de ("powerpc/8xx: Remove CPU6 ERRATA Workaround")
Remove it.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/cf652e47ea9e453e89813611b6f76d0939a12063.1687344017.git.christophe.leroy@csgroup.eu
-rw-r--r-- | arch/powerpc/include/asm/reg.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index bb0121222ee3..4ae4ab9090a2 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -1414,11 +1414,9 @@ static inline void mtmsr_isync(unsigned long val) #define mfspr(rn) ({unsigned long rval; \ asm volatile("mfspr %0," __stringify(rn) \ : "=r" (rval)); rval;}) -#ifndef mtspr #define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : \ : "r" ((unsigned long)(v)) \ : "memory") -#endif #define wrtspr(rn) asm volatile("mtspr " __stringify(rn) ",2" : : : "memory") static inline void wrtee(unsigned long val) |