blob: 0ee53d3ecd54250bfc72a5a5d98e2a66ffcd227d (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
*/
/include/ "nspire.dtsi"
&lcd {
port {
clcd_pads: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
&fast_timer {
/* compatible = "lsi,zevio-timer"; */
reg = <0x90010000 0x1000>, <0x900a0010 0x8>;
};
&uart {
compatible = "ns16550";
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&apb_pclk>;
no-loopback-test;
};
&timer0 {
/* compatible = "lsi,zevio-timer"; */
reg = <0x900c0000 0x1000>, <0x900a0018 0x8>;
};
&timer1 {
compatible = "lsi,zevio-timer";
reg = <0x900d0000 0x1000>, <0x900a0020 0x8>;
};
&keypad {
active-low;
};
&base_clk {
compatible = "lsi,nspire-classic-clock";
};
&ahb_clk {
compatible = "lsi,nspire-classic-ahb-divider";
};
&vbus_reg {
gpio = <&gpio 5 0>;
};
/ {
memory@10000000 {
device_type = "memory";
reg = <0x10000000 0x2000000>; /* 32 MB */
};
ahb {
#address-cells = <1>;
#size-cells = <1>;
intc: interrupt-controller@dc000000 {
compatible = "lsi,zevio-intc";
interrupt-controller;
reg = <0xdc000000 0x1000>;
#interrupt-cells = <1>;
};
};
panel {
compatible = "ti,nspire-classic-lcd-panel";
port {
panel_in: endpoint {
remote-endpoint = <&clcd_pads>;
};
};
};
chosen {
bootargs = "debug earlyprintk console=tty0 console=ttyS0,115200n8 root=/dev/ram0";
};
};
|
