blob: fa03cdd68e700303ac816879c0bfa7b1ac73f977 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
|
# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/spi/brcm,bcm63xx-spi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Broadcom BCM6348/BCM6358 SPI controller
maintainers:
- Jonas Gorski <jonas.gorski@gmail.com>
description: |
Broadcom "Low Speed" SPI controller found in many older MIPS based Broadband
SoCs.
This controller has a limitation that can not keep the chip select line active
between the SPI transfers within the same SPI message. This can terminate the
transaction to some SPI devices prematurely. The issue can be worked around by
the controller's prepend mode.
allOf:
- $ref: spi-controller.yaml#
properties:
compatible:
oneOf:
- items:
- enum:
- brcm,bcm6368-spi
- brcm,bcm6362-spi
- brcm,bcm63268-spi
- const: brcm,bcm6358-spi
- enum:
- brcm,bcm6348-spi
- brcm,bcm6358-spi
reg:
maxItems: 1
clocks:
items:
- description: SPI master reference clock
clock-names:
items:
- const: spi
interrupts:
maxItems: 1
required:
- compatible
- reg
- clocks
- clock-names
- interrupts
unevaluatedProperties: false
examples:
- |
spi@10000800 {
compatible = "brcm,bcm6368-spi", "brcm,bcm6358-spi";
reg = <0x10000800 0x70c>;
interrupts = <1>;
clocks = <&clkctl 9>;
clock-names = "spi";
num-cs = <5>;
#address-cells = <1>;
#size-cells = <0>;
};
|