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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/fsl,fman-mdio.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale Frame Manager MDIO Device
maintainers:
- Frank Li <Frank.Li@nxp.com>
description: FMan MDIO Node.
The MDIO is a bus to which the PHY devices are connected.
properties:
compatible:
enum:
- fsl,fman-mdio
- fsl,fman-xmdio
- fsl,fman-memac-mdio
description:
Must include "fsl,fman-mdio" for 1 Gb/s MDIO from FMan v2.
Must include "fsl,fman-xmdio" for 10 Gb/s MDIO from FMan v2.
Must include "fsl,fman-memac-mdio" for 1/10 Gb/s MDIO from
FMan v3.
reg:
maxItems: 1
clocks:
items:
- description: A reference to the input clock of the controller
from which the MDC frequency is derived.
interrupts:
maxItems: 1
fsl,fman-internal-mdio:
$ref: /schemas/types.yaml#/definitions/flag
description:
Fman has internal MDIO for internal PCS(Physical
Coding Sublayer) PHYs and external MDIO for external PHYs.
The settings and programming routines for internal/external
MDIO are different. Must be included for internal MDIO.
fsl,erratum-a009885:
$ref: /schemas/types.yaml#/definitions/flag
description: Indicates the presence of the A009885
erratum describing that the contents of MDIO_DATA may
become corrupt unless it is read within 16 MDC cycles
of MDIO_CFG[BSY] being cleared, when performing an
MDIO read operation.
fsl,erratum-a011043:
$ref: /schemas/types.yaml#/definitions/flag
description:
Indicates the presence of the A011043 erratum
describing that the MDIO_CFG[MDIO_RD_ER] bit may be falsely
set when reading internal PCS registers. MDIO reads to
internal PCS registers may result in having the
MDIO_CFG[MDIO_RD_ER] bit set, even when there is no error and
read data (MDIO_DATA[MDIO_DATA]) is correct.
Software may get false read error when reading internal
PCS registers through MDIO. As a workaround, all internal
MDIO accesses should ignore the MDIO_CFG[MDIO_RD_ER] bit.
For internal PHY device on internal mdio bus, a PHY node should be created.
See the definition of the PHY node in booting-without-of.txt for an
example of how to define a PHY (Internal PHY has no interrupt line).
- For "fsl,fman-mdio" compatible internal mdio bus, the PHY is TBI PHY.
- For "fsl,fman-memac-mdio" compatible internal mdio bus, the PHY is PCS PHY.
The PCS PHY address should correspond to the value of the appropriate
MDEV_PORT.
little-endian:
$ref: /schemas/types.yaml#/definitions/flag
description:
IP block is little-endian mode. The default endian mode is big-endian.
required:
- compatible
- reg
allOf:
- $ref: mdio.yaml#
unevaluatedProperties: false
examples:
- |
mdio@f1000 {
compatible = "fsl,fman-xmdio";
reg = <0xf1000 0x1000>;
interrupts = <101 2 0 0>;
};
- |
mdio@e3120 {
compatible = "fsl,fman-mdio";
reg = <0xe3120 0xee0>;
fsl,fman-internal-mdio;
#address-cells = <1>;
#size-cells = <0>;
tbi-phy@8 {
reg = <0x8>;
device_type = "tbi-phy";
};
};
- |
mdio@f1000 {
compatible = "fsl,fman-memac-mdio";
reg = <0xf1000 0x1000>;
fsl,fman-internal-mdio;
#address-cells = <1>;
#size-cells = <0>;
pcsphy6: ethernet-phy@0 {
reg = <0x0>;
};
};
|
