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path: root/drivers/pci/controller
AgeCommit message (Expand)Author
2020-10-02Merge tag 'pci-v5.9-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git...Linus Torvalds
2020-09-08PCI: rockchip: Fix bus checks in rockchip_pcie_valid_device()Lorenzo Pieralisi
2020-08-23treewide: Use fallthrough pseudo-keywordGustavo A. R. Silva
2020-08-07Merge tag 'pci-v5.9-changes' of git://git.kernel.org/pub/scm/linux/kernel/git...Linus Torvalds
2020-08-05Merge branch 'pci/irq-error'Bjorn Helgaas
2020-08-05Merge branch 'pci/doc'Bjorn Helgaas
2020-08-05Merge branch 'pci/host-probe-refactor'Bjorn Helgaas
2020-08-05Merge branch 'pci/xilinx-cpm'Bjorn Helgaas
2020-08-05Merge branch 'remotes/lorenzo/pci/vmd'Bjorn Helgaas
2020-08-05Merge branch 'remotes/lorenzo/pci/tegra'Bjorn Helgaas
2020-08-05Merge branch 'remotes/lorenzo/pci/runtime-pm'Bjorn Helgaas
2020-08-05Merge branch 'remotes/lorenzo/pci/mvebu'Bjorn Helgaas
2020-08-05Merge branch 'remotes/lorenzo/pci/loongson'Bjorn Helgaas
2020-08-05Merge branch 'remotes/lorenzo/pci/hv'Bjorn Helgaas
2020-08-05Merge branch 'remotes/lorenzo/pci/dwc'Bjorn Helgaas
2020-08-05Merge branch 'remotes/lorenzo/pci/cadence'Bjorn Helgaas
2020-08-05Merge branch 'remotes/lorenzo/pci/aardvark'Bjorn Helgaas
2020-08-05PCI: Fix kerneldoc warningsKrzysztof Kozlowski
2020-08-05PCI: xilinx-cpm: Add Versal CPM Root Port driverBharat Kumar Gogada
2020-08-04PCI: Set bridge map_irq and swizzle_irq to default functionsRob Herring
2020-08-04PCI: Move DT resource setup into devm_pci_alloc_host_bridge()Rob Herring
2020-08-04PCI: rcar-gen2: Convert to use modern host bridge probe functionsRob Herring
2020-08-03PCI: Remove dev_err() when handing an error from platform_get_irq()Krzysztof WilczyƄski
2020-08-03PCI: j721e: Add TI J721E PCIe driverKishon Vijay Abraham I
2020-07-28PCI: cadence: Add MSI-X support to Endpoint driverAlan Douglas
2020-07-28PCI: hv: Make some functions staticWei Yongjun
2020-07-28PCI: tegra: Remove PLL power suppliesThierry Reding
2020-07-27PCI: dwc: hisi: Remove non-ECAM HiSilicon hip05/hip06 driverRob Herring
2020-07-27PCI: cadence: Fix updating Vendor ID and Subsystem Vendor ID registerKishon Vijay Abraham I
2020-07-27PCI: cadence: Add new *ops* for CPU addr fixupKishon Vijay Abraham I
2020-07-27PCI: cadence: Allow pci_host_bridge to have custom pci_opsKishon Vijay Abraham I
2020-07-27PCI: cadence: Add support to start link and verify link statusKishon Vijay Abraham I
2020-07-27PCI: cadence: Convert all r/w accessors to perform only 32-bit accessesKishon Vijay Abraham I
2020-07-27PCI: cadence: Fix cdns_pcie_{host|ep}_setup() error pathKishon Vijay Abraham I
2020-07-27PCI: cadence: Use "dma-ranges" instead of "cdns,no-bar-match-nbits" propertyKishon Vijay Abraham I
2020-07-27PCI: hv: Fix a timing issue which causes kdump to fail occasionallyWei Hu
2020-07-23PCI: rcar: Use struct pci_host_bridge.windows list directlyRob Herring
2020-07-23PCI: rcar: Use devm_pci_alloc_host_bridge()Rob Herring
2020-07-23PCI: cadence: Remove private bus number and range storageRob Herring
2020-07-23PCI: cadence: Use bridge resources for outbound window setupRob Herring
2020-07-23PCI: Move setting pci_host_bridge.busnr out of host driversRob Herring
2020-07-23PCI: rcar: Use pci_is_root_bus() to check if bus is root busRob Herring
2020-07-23PCI: rockchip: Use pci_is_root_bus() to check if bus is root busRob Herring
2020-07-23PCI: xilinx: Use pci_is_root_bus() to check if bus is root busRob Herring
2020-07-23PCI: xilinx-nwl: Use pci_is_root_bus() to check if bus is root busRob Herring
2020-07-23PCI: mobiveil: Use pci_is_root_bus() to check if bus is root busRob Herring
2020-07-23PCI: designware: Use pci_is_root_bus() to check if bus is root busRob Herring
2020-07-23PCI: aardvark: Use pci_is_root_bus() to check if bus is root busRob Herring
2020-07-23PCI: Drop unnecessary zeroing of bridge fieldsRob Herring
2020-07-23PCI: Set default bridge parent deviceRob Herring