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path: root/drivers/cxl
AgeCommit message (Expand)Author
2021-05-26cxl: Rename mem to pciBen Widawsky
2021-05-14cxl/core: Refactor CXL register lookup for bridge reuseDan Williams
2021-05-14cxl/core: Rename bus.c to core.cDan Williams
2021-05-14cxl/mem: Introduce 'struct cxl_regs' for "composable" CXL devicesDan Williams
2021-05-14cxl/mem: Move some definitions to mem.hDan Williams
2021-04-16cxl/mem: Fix memory device capacity probingDan Williams
2021-04-15cxl/mem: Fix register block offset calculationBen Widawsky
2021-04-06cxl/mem: Force array size of mem_commands[] to CXL_MEM_COMMAND_ID_MAXRobert Richter
2021-04-06cxl/mem: Disable cxl device power managementDan Williams
2021-04-06cxl/mem: Do not rely on device_add() side effects for dev_set_name() failuresDan Williams
2021-04-06cxl/mem: Fix synchronization mechanism for device removal vs ioctl operationsDan Williams
2021-04-06cxl/mem: Use sysfs_emit() for attribute show routinesDan Williams
2021-02-22cxl/mem: Fix potential memory leakBen Widawsky
2021-02-19cxl/mem: Return -EFAULT if copy_to_user() failsDan Carpenter
2021-02-16cxl/mem: Add set of informational commandsBen Widawsky
2021-02-16cxl/mem: Enable commands via CELBen Widawsky
2021-02-16cxl/mem: Add a "RAW" send commandBen Widawsky
2021-02-16cxl/mem: Add basic IOCTL interfaceBen Widawsky
2021-02-16cxl/mem: Register CXL memX devicesDan Williams
2021-02-16cxl/mem: Find device capabilitiesBen Widawsky
2021-02-16cxl/mem: Introduce a driver for CXL-2.0-Type-3 endpointsDan Williams
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