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2024-07-16Merge tag 'pm-6.11-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull power management updates from Rafael Wysocki: "These add a new cpufreq driver for Loongson-3, add support for new features in the intel_pstate (Lunar Lake and Arrow Lake platforms, OOB mode for Emerald Rapids, highest performance change interrupt), amd-pstate (fast CPPC) and sun50i (Allwinner H700 speed bin) cpufreq drivers, simplify the cpufreq driver interface, simplify the teo cpuidle governor, adjust the pm-graph utility for a new version of Python, address issues and clean up code. Specifics: - Add Loongson-3 CPUFreq driver support (Huacai Chen) - Add support for the Arrow Lake and Lunar Lake platforms and the out-of-band (OOB) mode on Emerald Rapids to the intel_pstate cpufreq driver, make it support the highest performance change interrupt and clean it up (Srinivas Pandruvada) - Switch cpufreq to new Intel CPU model defines (Tony Luck) - Simplify the cpufreq driver interface by switching the .exit() driver callback to the void return data type (Lizhe, Viresh Kumar) - Make cpufreq_boost_enabled() return bool (Dhruva Gole) - Add fast CPPC support to the amd-pstate cpufreq driver, address multiple assorted issues in it and clean it up (Perry Yuan, Mario Limonciello, Dhananjay Ugwekar, Meng Li, Xiaojian Du) - Add Allwinner H700 speed bin to the sun50i cpufreq driver (Ryan Walklin) - Fix memory leaks and of_node_put() usage in the sun50i and qcom-nvmem cpufreq drivers (Javier Carrasco) - Clean up the sti and dt-platdev cpufreq drivers (Jeff Johnson, Raphael Gallais-Pou) - Fix deferred probe handling in the TI cpufreq driver and wrong return values of ti_opp_supply_probe(), and add OPP tables for the AM62Ax and AM62Px SoCs to it (Bryan Brattlof, Primoz Fiser) - Avoid overflow of target_freq in .fast_switch() in the SCMI cpufreq driver (Jagadeesh Kona) - Use dev_err_probe() in every error path in probe in the Mediatek cpufreq driver (Nícolas Prado) - Fix kernel-doc param for longhaul_setstate in the longhaul cpufreq driver (Yang Li) - Fix system resume handling in the CPPC cpufreq driver (Riwen Lu) - Improve the teo cpuidle governor and clean up leftover comments from the menu cpuidle governor (Christian Loehle) - Clean up a comment typo in the teo cpuidle governor (Atul Kumar Pant) - Add missing MODULE_DESCRIPTION() macro to cpuidle haltpoll (Jeff Johnson) - Switch the intel_idle driver to new Intel CPU model defines (Tony Luck) - Switch the Intel RAPL driver new Intel CPU model defines (Tony Luck) - Simplify if condition in the idle_inject driver (Thorsten Blum) - Fix missing cleanup on error in _opp_attach_genpd() (Viresh Kumar) - Introduce an OF helper function to inform if required-opps is used and drop a redundant in-parameter to _set_opp_level() (Ulf Hansson) - Update pm-graph to v5.12 which includes fixes and major code revamp for python3.12 (Todd Brandt) - Address several assorted issues in the cpupower utility (Roman Storozhenko)" * tag 'pm-6.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (77 commits) cpufreq: sti: fix build warning cpufreq: mediatek: Use dev_err_probe in every error path in probe cpufreq: Add Loongson-3 CPUFreq driver support cpufreq: Make cpufreq_driver->exit() return void cpufreq/amd-pstate: Fix the scaling_max_freq setting on shared memory CPPC systems cpufreq/amd-pstate-ut: Convert nominal_freq to khz during comparisons cpufreq: pcc: Remove empty exit() callback cpufreq: loongson2: Remove empty exit() callback cpufreq: nforce2: Remove empty exit() callback cpupower: fix lib default installation path cpufreq: docs: Add missing scaling_available_frequencies description cpuidle: teo: Don't count non-existent intercepts cpupower: Disable direct build of the 'bench' subproject cpuidle: teo: Remove recent intercepts metric Revert: "cpuidle: teo: Introduce util-awareness" cpufreq: make cpufreq_boost_enabled() return bool cpufreq: intel_pstate: Support highest performance change interrupt x86/cpufeatures: Add HWP highest perf change feature flag Documentation: cpufreq: amd-pstate: update doc for Per CPU boost control method cpufreq: amd-pstate: Cap the CPPC.max_perf to nominal_perf if CPB is off ...
2024-07-16Merge tag 'soc-drivers-6.11' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC driver updates from Arnd Bergmann: "The updates to the mediatek, allwinner, ti, tegra, microchip, stm32, samsung, imx, zynq and amlogic platoforms are fairly small maintenance changes, either addressing minor mistakes or enabling additional hardware. The qualcomm platform changes add a number of features and are larger than the other ones combined, introducing the use of linux/cleanup.h across several drivers, adding support for Snapdragon X1E and other SoCs in platform drivers, a new "protection domain mapper" driver, and a "shared memory bridge" driver. The cznic "turris omnia" router based on Marvell Armada gets a platform driver that talks to the board specific microcontroller. The reset and cache subsystems get a few minor updates to SoC specific drivers, while the ff-a, scmi and optee firmware drivers get some code refactoring and new features" * tag 'soc-drivers-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (122 commits) firmware: turris-mox-rwtm: Initialize completion before mailbox firmware: turris-mox-rwtm: Fix checking return value of wait_for_completion_timeout() firmware: turris-mox-rwtm: Do not complete if there are no waiters MAINTAINERS: drop riscv list from cache controllers platform: cznic: turris-omnia-mcu: fix Kconfig dependencies bus: sunxi-rsb: Constify struct regmap_bus soc: sunxi: sram: Constify struct regmap_config platform: cznic: turris-omnia-mcu: Depend on WATCHDOG platform: cznic: turris-omnia-mcu: Depend on OF soc: samsung: exynos-pmu: add support for PMU_ALIVE non atomic registers arm64: stm32: enable scmi regulator for stm32 firmware: qcom: tzmem: blacklist more platforms for SHM Bridge soc: qcom: wcnss: simplify with cleanup.h soc: qcom: pdr: simplify with cleanup.h soc: qcom: ocmem: simplify with cleanup.h soc: qcom: mdt_loader: simplify with cleanup.h soc: qcom: llcc: simplify with cleanup.h firmware: qcom: tzmem: simplify returning pointer without cleanup soc: qcom: socinfo: Add PM6350 PMIC arm64: dts: renesas: rz-smarc: Replace fixed regulator for USB VBUS ...
2024-07-10Merge back cpufreq material for 6.11.Rafael J. Wysocki
2024-07-09Merge tag 'cpufreq-arm-updates-6.11' of ↵Rafael J. Wysocki
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/vireshk/pm Merge ARM cpufreq updates for 6.11 from Viresh Kumar: "- cpufreq: Add Loongson-3 CPUFreq driver support (Huacai Chen). - Make exit() callback return void (Lizhe and Viresh Kumar). - Minor cleanups and fixes in several drivers (Bryan Brattlof, Javier Carrasco, Jagadeesh Kona, Jeff Johnson, Nícolas F. R. A. Prado, Primoz Fiser, Raphael Gallais-Pou, and Riwen Lu)." * tag 'cpufreq-arm-updates-6.11' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/vireshk/pm: (21 commits) cpufreq: sti: fix build warning cpufreq: mediatek: Use dev_err_probe in every error path in probe cpufreq: Add Loongson-3 CPUFreq driver support cpufreq: Make cpufreq_driver->exit() return void cpufreq: pcc: Remove empty exit() callback cpufreq: loongson2: Remove empty exit() callback cpufreq: nforce2: Remove empty exit() callback cpufreq: sti: add missing MODULE_DEVICE_TABLE entry for stih418 cpufreq: ti: update OPP table for AM62Px SoCs cpufreq: ti: update OPP table for AM62Ax SoCs cpufreq: sun50i: add Allwinner H700 speed bin cpufreq/cppc: Don't compare desired_perf in target() OPP: ti: Fix ti_opp_supply_probe wrong return values cpufreq: ti-cpufreq: Handle deferred probe with dev_err_probe() cpufreq: dt-platdev: add missing MODULE_DESCRIPTION() macro cpufreq: longhaul: Fix kernel-doc param for longhaul_setstate cpufreq: qcom-nvmem: eliminate uses of of_node_put() cpufreq: qcom-nvmem: fix memory leaks in probe error paths cpufreq: scmi: Avoid overflow of target_freq in fast switch cpufreq: sun50i: replace of_node_put() with automatic cleanup handler ...
2024-07-09Merge tag 'qcom-drivers-for-6.11' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers Qualcomm driver updates for v6.11 Support for Shared Memory (shm) Bridge is added, which provides a stricter interface for handling of buffers passed to TrustZone. The X1Elite platform is added to uefisecapp allow list, to instantiate the efivars implementation. A new in-kernel implementation of the pd-mapper (or servreg) service is introduced, to replace the userspace dependency for USB Type-C and battery management. Support for sharing interrupts across multiple bwmon instances is added, and a refcount imbalance issue is corrected. The LLCC support for recent platforms is corrected, and SA8775P support is added. A new interface is added to SMEM, to expose "feature codes". One example of the usecase for this is to indicate to the GPU driver which frequencies are available on the given device. The interrupt consumer and provider side of SMP2P is updated to provide more useful names in interrupt stats. Support for using the mailbox binding and driver for outgoing IPC interrupt in the SMSM driver is introduced. socinfo driver learns about SDM670 and IPQ5321, as well as get some updates to the X1E PMICs. pmic_glink is bumped to now support managing 3 USB Type-C ports. * tag 'qcom-drivers-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (48 commits) soc: qcom: smp2p: Use devname for interrupt descriptions soc: qcom: smsm: Add missing mailbox dependency to Kconfig soc: qcom: add missing pd-mapper dependencies soc: qcom: icc-bwmon: Allow for interrupts to be shared across instances dt-bindings: interconnect: qcom,msm8998-bwmon: Add X1E80100 BWMON instances dt-bindings: interconnect: qcom,msm8998-bwmon: Remove opp-table from the required list firmware: qcom: tzmem: export devm_qcom_tzmem_pool_new() soc: qcom: add pd-mapper implementation soc: qcom: pdr: extract PDR message marshalling data soc: qcom: pdr: fix parsing of domains lists soc: qcom: pdr: protect locator_addr with the main mutex firmware: qcom: scm: clarify the comment in qcom_scm_pas_init_image() firmware: qcom: scm: add support for SHM bridge memory carveout firmware: qcom: tzmem: enable SHM Bridge support firmware: qcom: scm: add support for SHM bridge operations firmware: qcom: qseecom: convert to using the TZ allocator firmware: qcom: scm: make qcom_scm_qseecom_app_get_id() use the TZ allocator firmware: qcom: scm: make qcom_scm_lmh_dcvsh() use the TZ allocator firmware: qcom: scm: make qcom_scm_ice_set_key() use the TZ allocator firmware: qcom: scm: make qcom_scm_assign_mem() use the TZ allocator ... Link: https://lore.kernel.org/r/20240705034410.13968-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-07-09cpufreq: sti: fix build warningRaphael Gallais-Pou
Building this driver yields the following: .../drivers/cpufreq/sti-cpufreq.c:215:50: warning: ‘%d’ directive output may be truncated writing between 1 and 10 bytes into a region of size 2 [-Wformat-truncation=] 215 | snprintf(name, MAX_PCODE_NAME_LEN, pcode%d, pcode); | ^~ .../drivers/cpufreq/sti-cpufreq.c:215:44: note: directive argument in the range [0, 2147483647] 215 | snprintf(name, MAX_PCODE_NAME_LEN, pcode%d, pcode); | ^~~~~~~~~ .../drivers/cpufreq/sti-cpufreq.c:215:9: note: ‘snprintf’ output between 7 and 16 bytes into a destination of size 7 215 | snprintf(name, MAX_PCODE_NAME_LEN, pcode%d, pcode); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Fix the buffer size to avoid the warning at build time. Signed-off-by: Raphael Gallais-Pou <rgallaispou@gmail.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-07-09cpufreq: mediatek: Use dev_err_probe in every error path in probeNícolas F. R. A. Prado
Use the dev_err_probe() helper to log the errors on every error path in the probe function and its sub-functions. This includes * adding error messages where there was none * converting over dev_err/dev_warn * removing the top-level error message after mtk_cpu_dvfs_info_init() is called, since every error path inside that function already logs the error reason. This gets rid of the misleading error message when probe is deferred: mtk-cpufreq mtk-cpufreq: failed to initialize dvfs info for cpu0 Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-07-09cpufreq: Add Loongson-3 CPUFreq driver supportHuacai Chen
Some of LoongArch processors (Loongson-3 series) support DVFS, their IOCSR.FEATURES has IOCSRF_FREQSCALE set. And they has a micro-core in the package called SMC (System Management Controller), which can be used to detect temperature, control fans, scale frequency and voltage, etc. The Loongson-3 CPUFreq driver is very simple now, it communicate with SMC, get DVFS info, set target frequency from CPUFreq core, and so on. There is a command list to interact with SMC, widely-used commands in the CPUFreq driver include: CMD_GET_VERSION: Get SMC firmware version. CMD_GET_FEATURE: Get enabled SMC features. CMD_SET_FEATURE: Enable SMC features, such as basic DVFS, BOOST. CMD_GET_FREQ_LEVEL_NUM: Get the number of all frequency levels. CMD_GET_FREQ_BOOST_LEVEL: Get the first boost frequency level. CMD_GET_FREQ_LEVEL_INFO: Get the detail info of a frequency level. CMD_GET_FREQ_INFO: Get the current frequency. CMD_SET_FREQ_INFO: Set the target frequency. In future we will add automatic frequency scaling, which is similar to Intel's HWP (HardWare P-State). Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> [ Viresh: Minor formatting cleanups, change return type of exit() to void and use devm_mutex_init() ] Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-07-09cpufreq: Make cpufreq_driver->exit() return voidLizhe
The cpufreq core doesn't check the return type of the exit() callback and there is not much the core can do on failures at that point. Just drop the returned value and make it return void. Signed-off-by: Lizhe <sensor1010@163.com> [ Viresh: Reworked the patches to fix all missing changes together. ] Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> # Mediatek Acked-by: Sudeep Holla <sudeep.holla@arm.com> # scpi, scmi, vexpress Acked-by: Mario Limonciello <mario.limonciello@amd.com> # amd Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> # bmips Acked-by: Rafael J. Wysocki <rafael@kernel.org> Acked-by: Kevin Hilman <khilman@baylibre.com> # omap
2024-07-08Merge tag 'amd-pstate-v6.11-2024-07-07' of ↵Rafael J. Wysocki
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/superm1/linux Merge more amd-pstate changes for 6.11 from Mario Liminciello: "This adds fixes for setting scaling max frequency on systems without a dedicated MSR for setting CPPC requests." * tag 'amd-pstate-v6.11-2024-07-07' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/superm1/linux: cpufreq/amd-pstate: Fix the scaling_max_freq setting on shared memory CPPC systems cpufreq/amd-pstate-ut: Convert nominal_freq to khz during comparisons
2024-07-07cpufreq/amd-pstate: Fix the scaling_max_freq setting on shared memory CPPC ↵Dhananjay Ugwekar
systems On shared memory CPPC systems, with amd_pstate=active mode, the change in scaling_max_freq doesn't get written to the shared memory region. Due to this, the writes to the scaling_max_freq sysfs file don't take effect. Fix this by propagating the scaling_max_freq changes to the shared memory region. Fixes: ffa5096a7c33 ("cpufreq: amd-pstate: implement Pstate EPP support for the AMD processors") Reported-by: David Arcari <darcari@redhat.com> Signed-off-by: Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://lore.kernel.org/r/20240702081413.5688-3-Dhananjay.Ugwekar@amd.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
2024-07-07cpufreq/amd-pstate-ut: Convert nominal_freq to khz during comparisonsDhananjay Ugwekar
cpudata->nominal_freq being in MHz whereas other frequencies being in KHz breaks the amd-pstate-ut frequency sanity check. This fixes it. Fixes: e4731baaf294 ("cpufreq: amd-pstate: Fix the inconsistency in max frequency units") Reported-by: David Arcari <darcari@redhat.com> Signed-off-by: Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Link: https://lore.kernel.org/r/20240702081413.5688-2-Dhananjay.Ugwekar@amd.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
2024-07-05cpufreq: pcc: Remove empty exit() callbackViresh Kumar
The exit() callback is optional, remove the empty one. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Rafael J. Wysocki <rafael@kernel.org>
2024-07-05cpufreq: loongson2: Remove empty exit() callbackViresh Kumar
The exit() callback is optional, remove the empty one. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Huacai Chen <chenhuacai@loongson.cn> Acked-by: Rafael J. Wysocki <rafael@kernel.org>
2024-07-05cpufreq: nforce2: Remove empty exit() callbackViresh Kumar
The exit() callback is optional, remove the empty one. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Rafael J. Wysocki <rafael@kernel.org>
2024-07-01cpufreq: ACPI: Mark boost policy as enabled when setting boostMario Limonciello
When boost is set for CPUs using acpi-cpufreq, the policy is not updated which can cause boost to be incorrectly not reported. Fixes: 218a06a79d9a ("cpufreq: Support per-policy performance boost") Link: https://patch.msgid.link/20240626204723.6237-2-mario.limonciello@amd.com Suggested-by: Viresh Kumar <viresh.kumar@linaro.org> Suggested-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Cc: All applicable <stable@vger.kernel.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-07-01cpufreq: Allow drivers to advertise boost enabledMario Limonciello
The behavior introduced in commit f37a4d6b4a2c ("cpufreq: Fix per-policy boost behavior on SoCs using cpufreq_boost_set_sw()") sets up the boost policy incorrectly when boost has been enabled by the platform firmware initially even if a driver sets the policy up. This is because policy_has_boost_freq() assumes that there is a frequency table set up by the driver and that the boost frequencies are advertised in that table. This assumption doesn't work for acpi-cpufreq or amd-pstate. Only use this check to enable boost if it's not already enabled instead of also disabling it if alreayd enabled. Fixes: f37a4d6b4a2c ("cpufreq: Fix per-policy boost behavior on SoCs using cpufreq_boost_set_sw()") Link: https://patch.msgid.link/20240626204723.6237-1-mario.limonciello@amd.com Reviewed-by: Sibi Sankar <quic_sibis@quicinc.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Suggested-by: Viresh Kumar <viresh.kumar@linaro.org> Suggested-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Cc: All applicable <stable@vger.kernel.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-06-28cpufreq: make cpufreq_boost_enabled() return boolDhruva Gole
Since this function is supposed to return boost_enabled which is anyway a bool type make sure that it's return value is also marked as bool. This helps maintain better consistency in data types being used. Signed-off-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://patch.msgid.link/20240627060117.1809477-1-d-gole@ti.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-06-28cpufreq: intel_pstate: Support highest performance change interruptSrinivas Pandruvada
On some systems, the HWP (Hardware P-states) highest performance level can change from the value set at boot-up. This behavior can lead to two issues: - The 'cpuinfo_max_freq' within the 'cpufreq' sysfs will not reflect the CPU's highest achievable performance. - Even if the CPU's highest performance level is increased after booting, the CPU may not reach the full expected performance. The availability of this feature is indicated by the CPUID instruction: if CPUID[6].EAX[15] is set to 1, the feature is supported. When supported, setting bit 2 of the MSR_HWP_INTERRUPT register enables notifications of the highest performance level changes. Therefore, as part of enabling the HWP interrupt, bit 2 of the MSR_HWP_INTERRUPT should also be set when this feature is supported. Upon a change in the highest performance level, a new HWP interrupt is generated, with bit 3 of the MSR_HWP_STATUS register set, and the MSR_HWP_CAPABILITIES register is updated with the new highest performance limit. The processing of the interrupt is the same as the guaranteed performance change. Notify change to cpufreq core and update MSR_HWP_REQUEST with new performance limits. The current driver implementation already takes care of the highest performance change as part of: commit dfeeedc1bf57 ("cpufreq: intel_pstate: Update cpuinfo.max_freq on HWP_CAP changes") For example: Before highest performance change interrupt: cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_max_freq 3700000 cat /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_max_freq 3700000 After highest performance changes interrupt: cat /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_max_freq 3900000 cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_max_freq 3900000 Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://patch.msgid.link/20240624161109.1427640-3-srinivas.pandruvada@linux.intel.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-06-27Merge tag 'amd-pstate-v6.11-2024-06-26' of ↵Rafael J. Wysocki
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/superm1/linux Merge more amd-pstate driver updates for 6.11 from Mario Limonciello: "Add support for amd-pstate core performance boost support which allows controlling which CPU cores can operate above nominal frequencies for short periods of time." * tag 'amd-pstate-v6.11-2024-06-26' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/superm1/linux: Documentation: cpufreq: amd-pstate: update doc for Per CPU boost control method cpufreq: amd-pstate: Cap the CPPC.max_perf to nominal_perf if CPB is off cpufreq: amd-pstate: initialize core precision boost state cpufreq: acpi: move MSR_K7_HWCR_CPB_DIS_BIT into msr-index.h
2024-06-27Merge back cpufreq material for v6.11.Rafael J. Wysocki
2024-06-26cpufreq: amd-pstate: Cap the CPPC.max_perf to nominal_perf if CPB is offPerry Yuan
When Core Performance Boost is disabled by the user, the CPPC_REQ.max_perf should not exceed the nominal_perf since by definition the frequencies between nominal_perf and the highest_perf are in the boost range. Fix this in amd_pstate_update() Acked-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> Link: https://lore.kernel.org/r/66f55232be01092c423f0523f68b82b80c293943.1718988436.git.perry.yuan@amd.com Link: https://lore.kernel.org/r/20240626042733.3747-4-mario.limonciello@amd.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
2024-06-26cpufreq: amd-pstate: initialize core precision boost statePerry Yuan
The "Core Performance Boost (CPB) feature, when enabled in the BIOS, allows the OS to control the highest performance for each individual core. The active, passive and the guided modes of the amd-pstate driver do support controlling the core frequency boost when this BIOS feature is enabled. Additionally, the amd-pstate driver provides a sysfs interface allowing the user to activate/deactivate this core performance boost feature at runtime. Add support for the set_boost callback in the active mode driver to enable boost control via the cpufreq core. This ensures a consistent boost control interface across all pstate modes, including passive mode, guided mode, and active mode. With this addition, all three pstate modes can support the same boost control interface with unique interface and global CPB control. Each CPU also supports individual boost control, allowing global CPB to change all cores' boost states simultaneously. Specific CPUs can update their boost states separately, ensuring all cores' boost states are synchronized. Cc: Oleksandr Natalenko <oleksandr@natalenko.name> Closes: https://bugzilla.kernel.org/show_bug.cgi?id=217931 Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> Co-developed-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Link: https://lore.kernel.org/r/20240626042733.3747-3-mario.limonciello@amd.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
2024-06-26cpufreq: acpi: move MSR_K7_HWCR_CPB_DIS_BIT into msr-index.hPerry Yuan
There are some other drivers also need to use the MSR_K7_HWCR_CPB_DIS_BIT for CPB control bit, so it makes sense to move the definition to a common header file to allow other driver to use it. No intentional functional impact. Suggested-by: Gautham Ranjal Shenoy <gautham.shenoy@amd.com> Signed-off-by: Perry Yuan <perry.yuan@amd.com> Acked-by: Rafael J. Wysocki <rafael@kernel.org> Acked-by: Huang Rui <ray.huang@amd.com> Link: https://lore.kernel.org/r/78b6c75e6cffddce3e950dd543af6ae9f8eeccc3.1718988436.git.perry.yuan@amd.com Link: https://lore.kernel.org/r/20240626042733.3747-2-mario.limonciello@amd.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
2024-06-26cpufreq: sti: add missing MODULE_DEVICE_TABLE entry for stih418Raphael Gallais-Pou
'st,stih418' is missing in the compatible list. Add it in order to use the driver with stih418 platform. Signed-off-by: Raphael Gallais-Pou <rgallaispou@gmail.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-06-25cpufreq: intel_pstate: Replace boot_cpu_has()Srinivas Pandruvada
Replace boot_cpu_has() with cpu_feature_enabled(). Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://patch.msgid.link/20240624162714.1431182-1-srinivas.pandruvada@linux.intel.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-06-25Merge tag 'amd-pstate-v6.11-2024-06-24' of ↵Rafael J. Wysocki
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/superm1/linux Merge the second round of changes for amd-pstate in 6.11 from Mario Limonciello: "* Enables amd-pstate by default in "shared memory" designs without a dedicated MSR. * Adds extra infrastructure for debugging problems. * Bug fixes found for init/unload failure." * tag 'amd-pstate-v6.11-2024-06-24' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/superm1/linux: cpufreq: simplify boolean parsing with kstrtobool in store function cpufreq: amd-pstate: Don't create attributes when registration fails cpufreq: amd-pstate: Make amd-pstate unit tests depend on amd-pstate cpufreq/amd-pstate: fix setting policy current frequency value cpufreq: amd-pstate: auto-load pstate driver by default cpufreq: amd-pstate: enable shared memory type CPPC by default cpufreq: amd-pstate: switch boot_cpu_has() to cpu_feature_enabled() Documentation: PM: amd-pstate: add guided mode to the Operation mode cpufreq: amd-pstate: add debug message while CPPC is supported and disabled by SBIOS cpufreq: amd-pstate: show CPPC debug message if CPPC is not supported cpufreq: amd-pstate: remove unused variable nominal_freq cpufreq: amd-pstate: optimize the initial frequency values verification cpufreq: amd-pstate: Allow users to write 'default' EPP string
2024-06-25cpufreq: ti: update OPP table for AM62Px SoCsBryan Brattlof
More speed grades for the AM62Px SoC family have been defined which unfortunately no longer align with the AM62x table. So create a new table with these new speed grades defined for the AM62Px Reviewed-by: Dhruva Gole <d-gole@ti.com> Signed-off-by: Bryan Brattlof <bb@ti.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-06-25cpufreq: ti: update OPP table for AM62Ax SoCsBryan Brattlof
As the AM62Ax SoC family matures more speed grades are being defined. These new grades unfortunately no longer align with the AM62x SoC family. Define a new table with new OPP speed grade limits for the AM62Ax Reviewed-by: Dhruva Gole <d-gole@ti.com> Signed-off-by: Bryan Brattlof <bb@ti.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-06-24cpufreq: simplify boolean parsing with kstrtobool in store functionPerry Yuan
Update the cpufreq store function to use kstrtobool for parsing boolean values. This simplifies the code and improves readability by using a standard kernel function for boolean string conversion. Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Signed-off-by: Perry Yuan <perry.yuan@amd.com> Link: https://lore.kernel.org/r/d392eba3bad1231776124c321cef8c184ce1482d.1718988436.git.perry.yuan@amd.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
2024-06-24cpufreq: intel_pstate: Use HWP to initialize ITMT if CPPC is missingRafael J. Wysocki
It is reported that single-thread performance on some hybrid systems dropped significantly after commit 7feec7430edd ("ACPI: CPPC: Only probe for _CPC if CPPC v2 is acked") which prevented _CPC from being used if the support for it had not been confirmed by the platform firmware. The problem is that if the platform firmware does not confirm CPPC v2 support, cppc_get_perf_caps() returns an error which prevents the intel_pstate driver from enabling ITMT. Consequently, the scheduler does not get any hints on CPU performance differences, so in a hybrid system some tasks may run on CPUs with lower capacity even though they should be running on high-capacity CPUs. To address this, modify intel_pstate to use the information from MSR_HWP_CAPABILITIES to enable ITMT if CPPC is not available (which is done already if the highest performance number coming from CPPC is not realistic). Fixes: 7feec7430edd ("ACPI: CPPC: Only probe for _CPC if CPPC v2 is acked") Closes: https://lore.kernel.org/linux-acpi/d01b0a1f-bd33-47fe-ab41-43843d8a374f@kfocus.org Link: https://lore.kernel.org/linux-acpi/ZnD22b3Br1ng7alf@kf-XE Reported-by: Aaron Rainbolt <arainbolt@kfocus.org> Tested-by: Aaron Rainbolt <arainbolt@kfocus.org> Cc: 5.19+ <stable@vger.kernel.org> # 5.19+ Link: https://patch.msgid.link/12460110.O9o76ZdvQC@rjwysocki.net Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
2024-06-24cpufreq: amd-pstate: Don't create attributes when registration failsMario Limonciello
If driver registration fails then immediately return the failure instead of continuing to register attributes. This fixes issues of falling back from amd-pstate to other drivers when cpufreq init has failed for any reason. Reported-by: alex.s.cochran@proton.me Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Reviewed-by: Perry Yuan <Perry.Yuan@amd.com> Link: https://lore.kernel.org/r/20240623200918.52104-1-mario.limonciello@amd.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
2024-06-24cpufreq: amd-pstate: Make amd-pstate unit tests depend on amd-pstateMario Limonciello
As the unit tests use a symbol from the driver an explicit dependency is required. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202406222016.R4A2TMs8-lkp@intel.com/ Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Reviewed-by: Perry Yuan <Perry.Yuan@amd.com> Link: https://lore.kernel.org/r/20240622215219.47911-1-mario.limonciello@amd.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
2024-06-20cpufreq/amd-pstate: fix setting policy current frequency valueMeng Li
When scaling min/max freq values were being setted, the value of policy->cur need to update. Signed-off-by: Meng Li <li.meng@amd.com> Acked-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://lore.kernel.org/r/20240227071133.3405003-1-li.meng@amd.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
2024-06-20cpufreq: amd-pstate: auto-load pstate driver by defaultPerry Yuan
If the `amd-pstate` driver is not loaded automatically by default, it is because the kernel command line parameter has not been added. To resolve this issue, it is necessary to call the `amd_pstate_set_driver()` function to enable the desired mode (passive/active/guided) before registering the driver instance. This ensures that the driver is loaded correctly without relying on the kernel command line parameter. When there is no parameter added to command line, Kernel config will provide the default mode to load. Meanwhile, user can add driver mode in command line which will override the kernel config default option. Reported-by: Andrei Amuraritei <andamu@posteo.net> Closes: https://bugzilla.kernel.org/show_bug.cgi?id=218705 Signed-off-by: Perry Yuan <perry.yuan@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://lore.kernel.org/r/83301c4cea4f92fb19e14b23f2bac7facfd8bdbb.1718811234.git.perry.yuan@amd.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
2024-06-20cpufreq: amd-pstate: enable shared memory type CPPC by defaultPerry Yuan
The amd-pstate-epp driver has been implemented and resolves the performance drop issue seen in passive mode for shared memory type CPPC systems. Users who enable the active mode driver will not experience a performance drop compared to the passive mode driver. Therefore, the EPP driver should be loaded by default for shared memory type CPPC system to get better performance. Signed-off-by: Perry Yuan <perry.yuan@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://lore.kernel.org/r/c705507cf3ee790e544251cfd897ed11e8e57712.1718811234.git.perry.yuan@amd.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
2024-06-20cpufreq: amd-pstate: switch boot_cpu_has() to cpu_feature_enabled()Perry Yuan
replace the usage of the deprecated boot_cpu_has() function with the modern cpu_feature_enabled() function. The switch to cpu_feature_enabled() ensures compatibility with the latest CPU feature detection mechanisms and improves code maintainability. Acked-by: Mario Limonciello <mario.limonciello@amd.com> Suggested-by: Borislav Petkov (AMD) <bp@alien8.de> Signed-off-by: Perry Yuan <perry.yuan@amd.com> Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Link: https://lore.kernel.org/r/f1567593ac5e1d38343067e9c681a8c4b0707038.1718811234.git.perry.yuan@amd.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
2024-06-20cpufreq: amd-pstate: add debug message while CPPC is supported and disabled ↵Perry Yuan
by SBIOS If CPPC feature is supported by the CPU however the CPUID flag bit is not set by SBIOS, the `amd_pstate` will be failed to load while system booting. So adding one more debug message to inform user to check the SBIOS setting, The change also can help maintainers to debug why amd_pstate driver failed to be loaded at system booting if the processor support CPPC. Closes: https://bugzilla.kernel.org/show_bug.cgi?id=218686 Signed-off-by: Perry Yuan <perry.yuan@amd.com> Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Acked-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://lore.kernel.org/r/42c953616ac121bd1e5c329e83d015a02e6b32c7.1718811234.git.perry.yuan@amd.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
2024-06-20cpufreq: amd-pstate: show CPPC debug message if CPPC is not supportedPerry Yuan
Add CPU ID checking in case the driver attempt to load on systems where CPPC functionality is unavailable. And the warning message will not be shown if CPPC is not supported. It will also print debug message if the CPU has no CPPC support that helps to debug the driver loading failure issue. Reported-by: Paul Menzel <pmenzel@molgen.mpg.de> Closes: https://lore.kernel.org/linux-pm/CYYPR12MB8655D32EA18574C9497E888A9C122@CYYPR12MB8655.namprd12.prod.outlook.com/T/#t Signed-off-by: Perry Yuan <perry.yuan@amd.com> Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Acked-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://lore.kernel.org/r/437dbd581a4119465581330081d9b1e289482ba2.1718811234.git.perry.yuan@amd.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
2024-06-20cpufreq: amd-pstate: remove unused variable nominal_freqPerry Yuan
removed the unused variable `nominal_freq` for build warning. This variable was defined and assigned a value in the previous code, but it was not used in the subsequent code. Closes: https://lore.kernel.org/oe-kbuild-all/202405080431.BPU6Yg9s-lkp@intel.com/ Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Perry Yuan <perry.yuan@amd.com> Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Acked-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://lore.kernel.org/r/b7ef41557f71d40d098393ddb27f0fe1f23648ae.1718811234.git.perry.yuan@amd.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
2024-06-20cpufreq: amd-pstate: optimize the initial frequency values verificationPerry Yuan
To enhance the debugging capability of the driver loading failure for broken CPPC ACPI tables, it can optimize the expression by moving the verification of `min_freq`, `nominal_freq`, and other dependency values to the `amd_pstate_init_freq()` function where they are initialized. If any of these values are incorrect, the `amd-pstate` driver will not be registered. By ensuring that these values are correct before they are used, it will facilitate the debugging process when encountering driver loading failures due to faulty CPPC ACPI tables from BIOS Signed-off-by: Perry Yuan <perry.yuan@amd.com> Acked-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Acked-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://lore.kernel.org/r/f9793f8451c1832e34cc9dc35f89c653b39cfe38.1718811234.git.perry.yuan@amd.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
2024-06-20cpufreq: amd-pstate: Allow users to write 'default' EPP stringMario Limonciello
The EPP string for 'default' represents what the firmware had configured as the default EPP value but once a user changes EPP to another string they can't reset it back to 'default'. Cache the firmware EPP value and allow the user to write 'default' using this value. Reported-by: Artem S. Tashkinov <aros@gmx.com> Closes: https://bugzilla.kernel.org/show_bug.cgi?id=217931#c61 Reviewed-by: Perry Yuan <perry.yuan@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
2024-06-20cpufreq: update to sysfs_emit() for safer buffer handlingPerry Yuan
Replace sprintf() and scnprintf() with sysfs_emit() and sysfs_emit_at() in the cpufreq core. This ensures safer buffer handling and consistency with sysfs interfaces. Update show_scaling_available_governors() and related functions for compliance with the new API. Signed-off-by: Perry Yuan <perry.yuan@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://patch.msgid.link/20240619081520.259971-1-perry.yuan@amd.com [ rjw: Changelog edits ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-06-19cpufreq: intel_pstate: Update Lunar Lake hybrid scaling factorSrinivas Pandruvada
Change hybrid scaling factor for Lunar Lake. Scaling factor is 1.15 for P-cores compared to E-cores. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://patch.msgid.link/20240618055221.446108-2-srinivas.pandruvada@linux.intel.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-06-19cpufreq: intel_pstate: Update Arrow Lake hybrid scaling factorSrinivas Pandruvada
Arrow Lake uses the same scaling factor as Meteor Lake, so reuse the same scaling factor. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://patch.msgid.link/20240618055221.446108-1-srinivas.pandruvada@linux.intel.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-06-19cpufreq: sun50i: add Allwinner H700 speed binRyan Walklin
Support for the Allwinner H618, H618 and H700 was added to the sun50i cpufreq-nvmem driver recently [1] however at the time some operating points supported by the H700 (1.008, 1.032 and 1.512 GHz) and in use by vendor BSPs were found to be unstable during testing, so the H700 speed bin and the 1.032 GHz OPP were not included in the mainline driver. Retesting with kernel 6.10rc2 (which carries additional fixes for the driver) now shows stable operation with these points. Add the H700 speed bin to the driver. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Ryan Walklin <ryan@testtoast.com> -- [1] https://lore.kernel.org/linux-sunxi/20240418154408.1740047-1-andre.przywara@arm.com Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-06-14Merge tag 'amd-pstate-v6.11-2024-06-11' of ↵Rafael J. Wysocki
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/superm1/linux Merge amd-pstate driver updates for v6.11 from Mario Mario Limonciello: "Add support for "Fast CPPC" which allows some CPUs to operate a tighter loop for passive mode." * tag 'amd-pstate-v6.11-2024-06-11' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/superm1/linux: cpufreq: amd-pstate: change cpu freq transition delay for some models x86/cpufeatures: Add AMD FAST CPPC feature flag
2024-06-14Merge back new cpufreq material for v6.11.Rafael J. Wysocki
2024-06-13cpufreq/cppc: Don't compare desired_perf in target()Riwen Lu
There is a corner case where the desired_perf is exactly same as the old perf, but the actual current freq is not. This happens during S3 while the cpufreq governor is set to powersave. During cpufreq resume process, the booting CPU's new_freq obtained via .get() is the highest frequency, while the policy->cur and cpu->perf_ctrls.desired_perf are set to the lowest level (powersave governor). This causes the warning: "CPU frequency out of sync:", and the cpufreq core sets policy->cur to new_freq. Then the governor->limits() calls cppc_cpufreq_set_target() to configures the CPU frequency and returns directly because the desired_perf converted from target_freq is same as the cpu->perf_ctrls.desired_perf and both are the lowest_perf. Since target_freq and policy->cur have been already compared in __cpufreq_driver_target(), there's no need to compare them again here. Drop the comparison. Signed-off-by: Riwen Lu <luriwen@kylinos.cn> [ Viresh: Updated commit message / subject ] Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-06-12cpufreq: intel_pstate: Check turbo_is_disabled() in store_no_turbo()Rafael J. Wysocki
After recent changes in intel_pstate, global.turbo_disabled is only set at the initialization time and never changed. However, it turns out that on some systems the "turbo disabled" bit in MSR_IA32_MISC_ENABLE, the initial state of which is reflected by global.turbo_disabled, can be flipped later and there should be a way to take that into account (other than checking that MSR every time the driver runs which is costly and useless overhead on the vast majority of systems). For this purpose, notice that before the changes in question, store_no_turbo() contained a turbo_is_disabled() check that was used for updating global.turbo_disabled if the "turbo disabled" bit in MSR_IA32_MISC_ENABLE had been flipped and that functionality can be restored. Then, users will be able to reset global.turbo_disabled by writing 0 to no_turbo which used to work before on systems with flipping "turbo disabled" bit. This guarantees the driver state to remain in sync, but READ_ONCE() annotations need to be added in two places where global.turbo_disabled is accessed locklessly, so modify the driver to make that happen. Fixes: 0940f1a8011f ("cpufreq: intel_pstate: Do not update global.turbo_disabled after initialization") Closes: https://lore.kernel.org/linux-pm/bf3ebf1571a4788e97daf861eb493c12d42639a3.camel@xry111.site Suggested-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reported-by: Xi Ruoyao <xry111@xry111.site> Tested-by: Xi Ruoyao <xry111@xry111.site> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>