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path: root/drivers/clk/socfpga
AgeCommit message (Expand)Author
2020-05-26clk: socfpga: agilex: add clock driver for the Agilex platformDinh Nguyen
2020-05-26clk: socfpga: add const to _ops data structuresDinh Nguyen
2020-05-26clk: socfpga: remove clk_ops enable/disable methodsDinh Nguyen
2020-05-26clk: socfpga: stratix10: use new parent data schemeDinh Nguyen
2020-02-12clk: socfpga: stratix10: simplify parameter passingDinh Nguyen
2020-02-12clk: stratix10: use do_div() for 64-bit calculationDinh Nguyen
2019-09-20Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds
2019-08-16clk: socfpga: deindent code to proper indentationStephen Boyd
2019-08-16clk: socfpga: Don't reference clk_init_data after registrationStephen Boyd
2019-08-14clk: socfpga: stratix10: fix rate caclulationg for cnt_clksDinh Nguyen
2019-07-17Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds
2019-06-28Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds
2019-06-25clk: socfpga: stratix10: fix divider entry for the emac clocksDinh Nguyen
2019-06-25clk: socfpga: stratix10: add additional clocks needed for the NAND IPDinh Nguyen
2019-06-25clk: socfpga: stratix10: fix divider entry for the emac clocksDinh Nguyen
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288Thomas Gleixner
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201Thomas Gleixner
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157Thomas Gleixner
2019-05-21treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 13Thomas Gleixner
2019-05-15clk: Remove io.h from clk-provider.hStephen Boyd
2019-03-08Merge branches 'clk-of-refcount', 'clk-mmio-fixed-clock', 'clk-remove-clps', ...Stephen Boyd
2019-01-24clk: socfpga: Don't have get_parent for single parent opsStephen Boyd
2019-01-15clk: socfpga: stratix10: fix naming convention for the fixed-clocksDinh Nguyen
2019-01-11clk: socfpga: stratix10: fix rate calculation for pll clocksDinh Nguyen
2018-12-28clk: socfpga: fix refcount leakYangtao Li
2018-07-06clk: socfpga: stratix10: fix the sdmmc_free_clk muxDinh Nguyen
2018-07-06clk: socfpga: stratix10: fix the parents of mpu_free_clkDinh Nguyen
2018-05-15clk: socfpga: stratix10: suppress unbinding platform's clock driverDinh Nguyen
2018-05-15clk: socfpga: stratix10: use platform driver APIsDinh Nguyen
2018-04-06clk: socfpga: stratix10: add clock driver for Stratix10 platformDinh Nguyen
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman
2017-06-19clk: socfpga: Fix the smplsel on Arria10 and Stratix10Dinh Nguyen
2016-02-22clk: socfpga: allow for multiple parents on Arria10 periph clocksDinh Nguyen
2016-02-08clk: socfpga: fix __init annotationArnd Bergmann
2015-08-24clk: socfpga: Add a second parent option for the dbg_base_clkDinh Nguyen
2015-07-28clk: socfpga: switch to GENMASK()Andy Shevchenko
2015-07-20clk: socfpga: Remove clk.h and clkdev.h includesStephen Boyd
2015-06-09clk: socfpga: remove a stray tabDan Carpenter
2015-06-05clk: socfpga: make use of of_clk_parent_fill helper functionDinh Nguyen
2015-05-21clk: socfpga: add a clock driver for the Arria 10 platformDinh Nguyen
2015-05-21clk: socfpga: update clk.h so for Arria10 platform to useDinh Nguyen
2015-05-14clk: socfpga: Silence sparse warningStephen Boyd
2015-05-14clk: socfpga: Silence sparse warningStephen Boyd
2014-05-12Merge tag 'socfpga-clk-update-for-v3.16' of git://git.rocketboards.org/linux-...Mike Turquette
2014-05-12clk: socfpga: add divider registers to the main pll outputsDinh Nguyen
2014-04-30clk: socfpga: fix clock driver for 3.15Dinh Nguyen
2014-03-18clk: socfpga: Fix section mismatch warningDinh Nguyen
2014-02-26clk: socfpga: Support multiple parents for the pll clocksDinh Nguyen
2014-02-26clk: socfpga: Fix integer overflow in clock calculationDinh Nguyen
2014-02-18clk: socfpga: Add a clk-phase property to the "altr,socfpga-gate-clk"Dinh Nguyen
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