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Author
2023-01-19
riscv: fix -Wundef warning for CONFIG_RISCV_BOOT_SPINWAIT
Masahiro Yamada
2022-06-01
riscv: Initialize thread pointer before calling C functions
Alexandre Ghiti
2022-05-25
RISC-V: Split out the XIP fixups into their own file
Palmer Dabbelt
2022-03-10
RISC-V: Add arch functions for non-retentive suspend entry/exit
Anup Patel
2022-03-10
RISC-V: Rename relocate() and make it global
Anup Patel
2022-01-20
RISC-V: Move spinwait booting method to its own config
Atish Patra
2022-01-20
RISC-V: Move the entire hart selection via lottery to SMP
Atish Patra
2022-01-20
RISC-V: Use __cpu_up_stack/task_pointer only for spinwait method
Atish Patra
2022-01-20
RISC-V: Avoid using per cpu array for ordered booting
Atish Patra
2022-01-19
RISC-V: Introduce sv48 support without relocatable kernel
Palmer Dabbelt
2022-01-19
riscv: Implement sv48 support
Alexandre Ghiti
2022-01-09
riscv: head: remove useless __PAGE_ALIGNED_BSS and .balign
Jisheng Zhang
2022-01-09
riscv: head: make secondary_start_common() static
Jisheng Zhang
2022-01-07
riscv/head: fix misspelling of guaranteed
hasheddan
2021-11-13
Merge tag 'riscv-for-linus-5.16-mw1' of git://git.kernel.org/pub/scm/linux/ke...
Linus Torvalds
2021-11-01
Merge tag 'cpu-to-thread_info-v5.16-rc1' of git://git.kernel.org/pub/scm/linu...
Linus Torvalds
2021-10-27
riscv: fix misalgned trap vector base address
Chen Lu
2021-10-26
riscv: remove .text section size limitation for XIP
Vitaly Wool
2021-09-30
riscv: rely on core code to keep thread_info::cpu updated
Ard Biesheuvel
2021-07-05
riscv: Introduce structure that group all variables regarding kernel mapping
Alexandre Ghiti
2021-04-26
RISC-V: enable XIP
Vitaly Wool
2021-04-26
riscv: Move kernel mapping outside of linear mapping
Alexandre Ghiti
2021-02-18
riscv: add BUILTIN_DTB support for MMU-enabled targets
Vitaly Wool
2020-12-18
Merge tag 'riscv-for-linus-5.11-mw0' of git://git.kernel.org/pub/scm/linux/ke...
Linus Torvalds
2020-11-25
riscv: Enable ARCH_STACKWALK
Kefeng Wang
2020-11-05
riscv: Set text_offset correctly for M-Mode
Sean Anderson
2020-10-02
RISC-V: Add PE/COFF header for EFI stub
Atish Patra
2020-10-02
RISC-V: Move DT mapping outof fixmap
Anup Patel
2020-09-15
RISC-V: Fix duplicate included thread_info.h
Tian Tao
2020-08-14
riscv: Setup exception vector for nommu platform
Qiu Wenbo
2020-07-30
RISC-V: Setup exception vector early
Atish Patra
2020-05-18
RISC-V: Skip setting up PMPs on traps
Palmer Dabbelt
2020-04-03
riscv: Add SOC early init support
Damien Le Moal
2020-03-31
RISC-V: Add supported for ordered booting method using HSM
Atish Patra
2020-03-31
RISC-V: Move relocate and few other functions out of __init
Atish Patra
2020-02-18
riscv: set pmp configuration if kernel is running in M-mode
Greentime Hu
2020-01-22
riscv: Add KASAN support
Nick Hu
2020-01-15
riscv: make sure the cores stay looping in .Lsecondary_park
Greentime Hu
2020-01-12
riscv: Fixup obvious bug for fp-regs reset
Guo Ren
2019-12-20
riscv: fix scratch register clearing in M-mode.
Greentime Hu
2019-11-17
riscv: add nommu support
Christoph Hellwig
2019-11-17
riscv: clear the instruction cache and all registers when booting
Christoph Hellwig
2019-11-17
riscv: read the hart ID from mhartid on boot
Damien Le Moal
2019-11-05
riscv: abstract out CSR names for supervisor vs machine mode
Christoph Hellwig
2019-09-20
arch/riscv: disable excess harts before picking main boot hart
Xiang Wang
2019-09-16
Merge tag 'riscv/for-v5.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/g...
Linus Torvalds
2019-09-13
riscv: modify the Image header to improve compatibility with the ARM64 header
Paul Walmsley
2019-08-30
riscv: Using CSR numbers to access CSRs
Bin Meng
2019-07-11
RISC-V: Add an Image header that boot loader can parse.
Atish Patra
2019-07-09
RISC-V: Setup initial page tables in two stages
Anup Patel
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