| Age | Commit message (Expand) | Author |
|---|---|---|
| 2021-09-02 | MIPS: Malta: fix alignment of the devicetree buffer | Oleksij Rempel |
| 2020-01-06 | remove ioremap_nocache and devm_ioremap_nocache | Christoph Hellwig |
| 2019-05-30 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 | Thomas Gleixner |
| 2017-11-03 | Update MIPS email addresses | Paul Burton |
| 2017-08-30 | MIPS: CPS: Have asm/mips-cps.h include CM & CPC headers | Paul Burton |
| 2017-08-29 | MIPS: CM: Use BIT/GENMASK for register fields, order & drop shifts | Paul Burton |
| 2016-10-06 | MIPS: Malta: Probe interrupt controllers via DT | Paul Burton |
| 2016-10-06 | MIPS: Malta: Use all available DDR by default | Paul Burton |
| 2016-08-04 | tree-wide: replace config_enabled() with IS_ENABLED() | Masahiro Yamada |
| 2015-11-11 | MIPS: Malta: Setup RAM regions via DT | Paul Burton |
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index : linux.git | |
| dakr's fork of kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git |
| summaryrefslogtreecommitdiff |