diff options
Diffstat (limited to 'tools/perf/pmu-events/arch/x86/broadwellde/pipeline.json')
| -rw-r--r-- | tools/perf/pmu-events/arch/x86/broadwellde/pipeline.json | 79 |
1 files changed, 43 insertions, 36 deletions
diff --git a/tools/perf/pmu-events/arch/x86/broadwellde/pipeline.json b/tools/perf/pmu-events/arch/x86/broadwellde/pipeline.json index 9e7d66b07f01..9a902d2160e6 100644 --- a/tools/perf/pmu-events/arch/x86/broadwellde/pipeline.json +++ b/tools/perf/pmu-events/arch/x86/broadwellde/pipeline.json @@ -129,11 +129,11 @@ "UMask": "0x4" }, { - "BriefDescription": "Conditional branch instructions retired. (Precise Event - PEBS)", + "BriefDescription": "Conditional branch instructions retired.", "EventCode": "0xC4", "EventName": "BR_INST_RETIRED.CONDITIONAL", "PEBS": "1", - "PublicDescription": "This is a precise version (that is, uses PEBS) of the event that counts conditional branch instructions retired.", + "PublicDescription": "This event counts conditional branch instructions retired.", "SampleAfterValue": "400009", "UMask": "0x1" }, @@ -147,38 +147,38 @@ "UMask": "0x40" }, { - "BriefDescription": "Direct and indirect near call instructions retired. (Precise Event - PEBS)", + "BriefDescription": "Direct and indirect near call instructions retired.", "EventCode": "0xC4", "EventName": "BR_INST_RETIRED.NEAR_CALL", "PEBS": "1", - "PublicDescription": "This is a precise version (that is, uses PEBS) of the event that counts both direct and indirect near call instructions retired.", + "PublicDescription": "This event counts both direct and indirect near call instructions retired.", "SampleAfterValue": "100007", "UMask": "0x2" }, { - "BriefDescription": "Direct and indirect macro near call instructions retired (captured in ring 3). (Precise Event - PEBS)", + "BriefDescription": "Direct and indirect macro near call instructions retired (captured in ring 3).", "EventCode": "0xC4", "EventName": "BR_INST_RETIRED.NEAR_CALL_R3", "PEBS": "1", - "PublicDescription": "This is a precise version (that is, uses PEBS) of the event that counts both direct and indirect macro near call instructions retired (captured in ring 3).", + "PublicDescription": "This event counts both direct and indirect macro near call instructions retired (captured in ring 3).", "SampleAfterValue": "100007", "UMask": "0x2" }, { - "BriefDescription": "Return instructions retired. (Precise Event - PEBS)", + "BriefDescription": "Return instructions retired.", "EventCode": "0xC4", "EventName": "BR_INST_RETIRED.NEAR_RETURN", "PEBS": "1", - "PublicDescription": "This is a precise version (that is, uses PEBS) of the event that counts return instructions retired.", + "PublicDescription": "This event counts return instructions retired.", "SampleAfterValue": "100007", "UMask": "0x8" }, { - "BriefDescription": "Taken branch instructions retired. (Precise Event - PEBS)", + "BriefDescription": "Taken branch instructions retired.", "EventCode": "0xC4", "EventName": "BR_INST_RETIRED.NEAR_TAKEN", "PEBS": "1", - "PublicDescription": "This is a precise version (that is, uses PEBS) of the event that counts taken branch instructions retired.", + "PublicDescription": "This event counts taken branch instructions retired.", "SampleAfterValue": "400009", "UMask": "0x20" }, @@ -215,6 +215,14 @@ "UMask": "0xc4" }, { + "BriefDescription": "Speculative mispredicted indirect branches", + "EventCode": "0x89", + "EventName": "BR_MISP_EXEC.INDIRECT", + "PublicDescription": "Counts speculatively miss-predicted indirect branches at execution time. Counts for indirect near CALL or JMP instructions (RET excluded).", + "SampleAfterValue": "200003", + "UMask": "0xe4" + }, + { "BriefDescription": "Not taken speculative and retired mispredicted macro conditional branches", "EventCode": "0x89", "EventName": "BR_MISP_EXEC.NONTAKEN_CONDITIONAL", @@ -270,29 +278,29 @@ "UMask": "0x4" }, { - "BriefDescription": "Mispredicted conditional branch instructions retired. (Precise Event - PEBS)", + "BriefDescription": "Mispredicted conditional branch instructions retired.", "EventCode": "0xC5", "EventName": "BR_MISP_RETIRED.CONDITIONAL", "PEBS": "1", - "PublicDescription": "This is a precise version (that is, uses PEBS) of the event that counts mispredicted conditional branch instructions retired.", + "PublicDescription": "This event counts mispredicted conditional branch instructions retired.", "SampleAfterValue": "400009", "UMask": "0x1" }, { - "BriefDescription": "number of near branch instructions retired that were mispredicted and taken. (Precise Event - PEBS).", + "BriefDescription": "number of near branch instructions retired that were mispredicted and taken.", "EventCode": "0xC5", "EventName": "BR_MISP_RETIRED.NEAR_TAKEN", "PEBS": "1", - "PublicDescription": "Number of near branch instructions retired that were mispredicted and taken. (Precise Event - PEBS).", + "PublicDescription": "Number of near branch instructions retired that were mispredicted and taken.", "SampleAfterValue": "400009", "UMask": "0x20" }, { - "BriefDescription": "This event counts the number of mispredicted ret instructions retired.(Precise Event)", + "BriefDescription": "This event counts the number of mispredicted ret instructions retired. Non PEBS", "EventCode": "0xC5", "EventName": "BR_MISP_RETIRED.RET", "PEBS": "1", - "PublicDescription": "This is a precise version (that is, uses PEBS) of the event that counts mispredicted return instructions retired.", + "PublicDescription": "This event counts mispredicted return instructions retired.", "SampleAfterValue": "100007", "UMask": "0x8" }, @@ -300,7 +308,7 @@ "BriefDescription": "Count XClk pulses when this thread is unhalted and the other thread is halted.", "EventCode": "0x3c", "EventName": "CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE", - "SampleAfterValue": "2000003", + "SampleAfterValue": "100003", "UMask": "0x2" }, { @@ -308,7 +316,7 @@ "EventCode": "0x3C", "EventName": "CPU_CLK_THREAD_UNHALTED.REF_XCLK", "PublicDescription": "This is a fixed-frequency event programmed to general counters. It counts when the core is unhalted at 100 Mhz.", - "SampleAfterValue": "2000003", + "SampleAfterValue": "100003", "UMask": "0x1" }, { @@ -316,14 +324,14 @@ "BriefDescription": "Reference cycles when the at least one thread on the physical core is unhalted (counts at 100 MHz rate).", "EventCode": "0x3C", "EventName": "CPU_CLK_THREAD_UNHALTED.REF_XCLK_ANY", - "SampleAfterValue": "2000003", + "SampleAfterValue": "100003", "UMask": "0x1" }, { "BriefDescription": "Count XClk pulses when this thread is unhalted and the other thread is halted.", "EventCode": "0x3C", "EventName": "CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE", - "SampleAfterValue": "2000003", + "SampleAfterValue": "100003", "UMask": "0x2" }, { @@ -338,7 +346,7 @@ "EventCode": "0x3C", "EventName": "CPU_CLK_UNHALTED.REF_XCLK", "PublicDescription": "Reference cycles when the thread is unhalted (counts at 100 MHz rate).", - "SampleAfterValue": "2000003", + "SampleAfterValue": "100003", "UMask": "0x1" }, { @@ -346,7 +354,7 @@ "BriefDescription": "Reference cycles when the at least one thread on the physical core is unhalted (counts at 100 MHz rate).", "EventCode": "0x3C", "EventName": "CPU_CLK_UNHALTED.REF_XCLK_ANY", - "SampleAfterValue": "2000003", + "SampleAfterValue": "100003", "UMask": "0x1" }, { @@ -500,7 +508,7 @@ "BriefDescription": "Stalls caused by changing prefix length of the instruction.", "EventCode": "0x87", "EventName": "ILD_STALL.LCP", - "PublicDescription": "This event counts stalls occured due to changing prefix length (66, 67 or REX.W when they change the length of the decoded instruction). Occurrences counting is proportional to the number of prefixes in a 16B-line. This may result in the following penalties: three-cycle penalty for each LCP in a 16-byte chunk.", + "PublicDescription": "This event counts stalls occurred due to changing prefix length (66, 67 or REX.W when they change the length of the decoded instruction). Occurrences counting is proportional to the number of prefixes in a 16B-line. This may result in the following penalties: three-cycle penalty for each LCP in a 16-byte chunk.", "SampleAfterValue": "2000003", "UMask": "0x1" }, @@ -681,9 +689,9 @@ }, { "BriefDescription": "Resource-related stall cycles", - "EventCode": "0xA2", + "EventCode": "0xa2", "EventName": "RESOURCE_STALLS.ANY", - "PublicDescription": "This event counts resource-related stall cycles. Reasons for stalls can be as follows:\n - *any* u-arch structure got full (LB, SB, RS, ROB, BOB, LM, Physical Register Reclaim Table (PRRT), or Physical History Table (PHT) slots)\n - *any* u-arch structure got empty (like INT/SIMD FreeLists)\n - FPU control word (FPCW), MXCSR\nand others. This counts cycles that the pipeline backend blocked uop delivery from the front end.", + "PublicDescription": "This event counts resource-related stall cycles.", "SampleAfterValue": "2000003", "UMask": "0x1" }, @@ -909,7 +917,7 @@ }, { "AnyThread": "1", - "BriefDescription": "Cycles per core when uops are exectuted in port 0.", + "BriefDescription": "Cycles per core when uops are executed in port 0.", "EventCode": "0xA1", "EventName": "UOPS_EXECUTED_PORT.PORT_0_CORE", "SampleAfterValue": "2000003", @@ -925,7 +933,7 @@ }, { "AnyThread": "1", - "BriefDescription": "Cycles per core when uops are exectuted in port 1.", + "BriefDescription": "Cycles per core when uops are executed in port 1.", "EventCode": "0xA1", "EventName": "UOPS_EXECUTED_PORT.PORT_1_CORE", "SampleAfterValue": "2000003", @@ -973,7 +981,7 @@ }, { "AnyThread": "1", - "BriefDescription": "Cycles per core when uops are exectuted in port 4.", + "BriefDescription": "Cycles per core when uops are executed in port 4.", "EventCode": "0xA1", "EventName": "UOPS_EXECUTED_PORT.PORT_4_CORE", "SampleAfterValue": "2000003", @@ -989,7 +997,7 @@ }, { "AnyThread": "1", - "BriefDescription": "Cycles per core when uops are exectuted in port 5.", + "BriefDescription": "Cycles per core when uops are executed in port 5.", "EventCode": "0xA1", "EventName": "UOPS_EXECUTED_PORT.PORT_5_CORE", "SampleAfterValue": "2000003", @@ -1005,7 +1013,7 @@ }, { "AnyThread": "1", - "BriefDescription": "Cycles per core when uops are exectuted in port 6.", + "BriefDescription": "Cycles per core when uops are executed in port 6.", "EventCode": "0xA1", "EventName": "UOPS_EXECUTED_PORT.PORT_6_CORE", "SampleAfterValue": "2000003", @@ -1068,21 +1076,20 @@ "UMask": "0x1" }, { - "BriefDescription": "Actually retired uops. (Precise Event - PEBS)", - "Data_LA": "1", + "BriefDescription": "Actually retired uops.", "EventCode": "0xC2", "EventName": "UOPS_RETIRED.ALL", "PEBS": "1", - "PublicDescription": "This is a precise version (that is, uses PEBS) of the event that counts all actually retired uops. Counting increments by two for micro-fused uops, and by one for macro-fused and other uops. Maximal increment value for one cycle is eight.", + "PublicDescription": "This event counts all actually retired uops. Counting increments by two for micro-fused uops, and by one for macro-fused and other uops. Maximal increment value for one cycle is eight.", "SampleAfterValue": "2000003", "UMask": "0x1" }, { - "BriefDescription": "Retirement slots used. (Precise Event - PEBS)", + "BriefDescription": "Retirement slots used.", "EventCode": "0xC2", "EventName": "UOPS_RETIRED.RETIRE_SLOTS", "PEBS": "1", - "PublicDescription": "This is a precise version (that is, uses PEBS) of the event that counts the number of retirement slots used.", + "PublicDescription": "This event counts the number of retirement slots used.", "SampleAfterValue": "2000003", "UMask": "0x2" }, @@ -1098,7 +1105,7 @@ }, { "BriefDescription": "Cycles with less than 10 actually retired uops.", - "CounterMask": "10", + "CounterMask": "16", "EventCode": "0xC2", "EventName": "UOPS_RETIRED.TOTAL_CYCLES", "Invert": "1", |