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-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c3
-rw-r--r--drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c22
-rw-r--r--drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h1
3 files changed, 16 insertions, 10 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c
index 2fa876d9e1f7..e2f3ddb3f225 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c
@@ -2078,7 +2078,8 @@ static bool dcn35_resource_construct(
dc->dml2_options.callbacks.build_scaling_params = &resource_build_scaling_params;
dc->dml2_options.callbacks.can_support_mclk_switch_using_fw_based_vblank_stretch = &dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch;
dc->dml2_options.callbacks.acquire_secondary_pipe_for_mpc_odm = &dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy;
- dc->dml2_options.max_segments_per_hubp = 18;
+ dc->dml2_options.max_segments_per_hubp = 24;
+
dc->dml2_options.det_segment_size = DCN3_2_DET_SEG_SIZE;/*todo*/
if (dc->config.sdpif_request_limit_words_per_umc == 0)
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c b/drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c
index 946a98af0020..4c3661fbecbc 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c
@@ -414,17 +414,21 @@ void dml2_apply_det_buffer_allocation_policy(struct dml2_context *in_ctx, struct
for (plane_index = 0; plane_index < dml_dispcfg->num_surfaces; plane_index++) {
- dml_dispcfg->plane.DETSizeOverride[plane_index] = ((max_det_size / num_of_streams) / num_of_planes_per_stream[stream_index] / in_ctx->det_helper_scratch.dpps_per_surface[plane_index]);
+ if (in_ctx->config.override_det_buffer_size_kbytes)
+ dml_dispcfg->plane.DETSizeOverride[plane_index] = max_det_size / in_ctx->config.dcn_pipe_count;
+ else {
+ dml_dispcfg->plane.DETSizeOverride[plane_index] = ((max_det_size / num_of_streams) / num_of_planes_per_stream[stream_index] / in_ctx->det_helper_scratch.dpps_per_surface[plane_index]);
+
+ /* If the override size is not divisible by det_segment_size then round off to nearest number divisible by det_segment_size as
+ * this is a requirement.
+ */
+ if (dml_dispcfg->plane.DETSizeOverride[plane_index] % in_ctx->config.det_segment_size != 0) {
+ dml_dispcfg->plane.DETSizeOverride[plane_index] = dml_dispcfg->plane.DETSizeOverride[plane_index] & ~0x3F;
+ }
- /* If the override size is not divisible by det_segment_size then round off to nearest number divisible by det_segment_size as
- * this is a requirement.
- */
- if (dml_dispcfg->plane.DETSizeOverride[plane_index] % in_ctx->config.det_segment_size != 0) {
- dml_dispcfg->plane.DETSizeOverride[plane_index] = dml_dispcfg->plane.DETSizeOverride[plane_index] & ~0x3F;
+ if (plane_index + 1 < dml_dispcfg->num_surfaces && dml_dispcfg->plane.BlendingAndTiming[plane_index] != dml_dispcfg->plane.BlendingAndTiming[plane_index + 1])
+ stream_index++;
}
-
- if (plane_index + 1 < dml_dispcfg->num_surfaces && dml_dispcfg->plane.BlendingAndTiming[plane_index] != dml_dispcfg->plane.BlendingAndTiming[plane_index + 1])
- stream_index++;
}
}
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h b/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h
index 4d0377354bdd..f3b85b0891d3 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h
@@ -137,6 +137,7 @@ struct dml2_configuration_options {
bool skip_hw_state_mapping;
bool optimize_odm_4to1;
bool minimize_dispclk_using_odm;
+ bool override_det_buffer_size_kbytes;
struct dml2_dc_callbacks callbacks;
struct {
bool force_disable_subvp;