diff options
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 56 |
1 files changed, 28 insertions, 28 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi index 96055593204a..26c7ca31e22e 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi @@ -449,7 +449,7 @@ }; thermal-zones { - cluster6-7 { + cluster6-7-thermal { polling-delay-passive = <1000>; polling-delay = <5000>; thermal-sensors = <&tmu 0>; @@ -492,7 +492,7 @@ }; }; - ddr-cluster5 { + ddr-cluster5-thermal { polling-delay-passive = <1000>; polling-delay = <5000>; thermal-sensors = <&tmu 1>; @@ -512,7 +512,7 @@ }; }; - wriop { + wriop-thermal { polling-delay-passive = <1000>; polling-delay = <5000>; thermal-sensors = <&tmu 2>; @@ -532,7 +532,7 @@ }; }; - dce-qbman-hsio2 { + dce-thermal { polling-delay-passive = <1000>; polling-delay = <5000>; thermal-sensors = <&tmu 3>; @@ -552,7 +552,7 @@ }; }; - ccn-dpaa-tbu { + ccn-thermal { polling-delay-passive = <1000>; polling-delay = <5000>; thermal-sensors = <&tmu 4>; @@ -572,7 +572,7 @@ }; }; - cluster4-hsio3 { + cluster4-thermal { polling-delay-passive = <1000>; polling-delay = <5000>; thermal-sensors = <&tmu 5>; @@ -592,7 +592,7 @@ }; }; - cluster2-3 { + cluster2-3-thermal { polling-delay-passive = <1000>; polling-delay = <5000>; thermal-sensors = <&tmu 6>; @@ -745,7 +745,7 @@ #size-cells = <0>; reg = <0x0 0x2000000 0x0 0x10000>; interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; - clock-names = "i2c"; + clock-names = "ipg"; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(16)>; pinctrl-names = "default", "gpio"; @@ -761,7 +761,7 @@ #size-cells = <0>; reg = <0x0 0x2010000 0x0 0x10000>; interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; - clock-names = "i2c"; + clock-names = "ipg"; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(16)>; pinctrl-names = "default", "gpio"; @@ -777,7 +777,7 @@ #size-cells = <0>; reg = <0x0 0x2020000 0x0 0x10000>; interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; - clock-names = "i2c"; + clock-names = "ipg"; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(16)>; pinctrl-names = "default", "gpio"; @@ -793,7 +793,7 @@ #size-cells = <0>; reg = <0x0 0x2030000 0x0 0x10000>; interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; - clock-names = "i2c"; + clock-names = "ipg"; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(16)>; pinctrl-names = "default", "gpio"; @@ -809,7 +809,7 @@ #size-cells = <0>; reg = <0x0 0x2040000 0x0 0x10000>; interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; - clock-names = "i2c"; + clock-names = "ipg"; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(16)>; pinctrl-names = "default", "gpio"; @@ -825,7 +825,7 @@ #size-cells = <0>; reg = <0x0 0x2050000 0x0 0x10000>; interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; - clock-names = "i2c"; + clock-names = "ipg"; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(16)>; pinctrl-names = "default", "gpio"; @@ -841,7 +841,7 @@ #size-cells = <0>; reg = <0x0 0x2060000 0x0 0x10000>; interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; - clock-names = "i2c"; + clock-names = "ipg"; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(16)>; pinctrl-names = "default", "gpio"; @@ -857,7 +857,7 @@ #size-cells = <0>; reg = <0x0 0x2070000 0x0 0x10000>; interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; - clock-names = "i2c"; + clock-names = "ipg"; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(16)>; pinctrl-names = "default", "gpio"; @@ -925,10 +925,10 @@ status = "disabled"; }; - esdhc0: esdhc@2140000 { - compatible = "fsl,esdhc"; + esdhc0: mmc@2140000 { + compatible = "fsl,ls2080a-esdhc", "fsl,esdhc"; reg = <0x0 0x2140000 0x0 0x10000>; - interrupts = <0 28 0x4>; /* Level high type */ + interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(2)>; dma-coherent; @@ -939,10 +939,10 @@ status = "disabled"; }; - esdhc1: esdhc@2150000 { - compatible = "fsl,esdhc"; + esdhc1: mmc@2150000 { + compatible = "fsl,ls2080a-esdhc", "fsl,esdhc"; reg = <0x0 0x2150000 0x0 0x10000>; - interrupts = <0 63 0x4>; /* Level high type */ + interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(2)>; dma-coherent; @@ -1027,7 +1027,7 @@ }; gpio0: gpio@2300000 { - compatible = "fsl,qoriq-gpio"; + compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio"; reg = <0x0 0x2300000 0x0 0x10000>; interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; gpio-controller; @@ -1038,7 +1038,7 @@ }; gpio1: gpio@2310000 { - compatible = "fsl,qoriq-gpio"; + compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio"; reg = <0x0 0x2310000 0x0 0x10000>; interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; gpio-controller; @@ -1049,7 +1049,7 @@ }; gpio2: gpio@2320000 { - compatible = "fsl,qoriq-gpio"; + compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio"; reg = <0x0 0x2320000 0x0 0x10000>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; gpio-controller; @@ -1060,7 +1060,7 @@ }; gpio3: gpio@2330000 { - compatible = "fsl,qoriq-gpio"; + compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio"; reg = <0x0 0x2330000 0x0 0x10000>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; gpio-controller; @@ -1085,7 +1085,7 @@ little-endian; }; - ftm_alarm0: timer@2800000 { + ftm_alarm0: rtc@2800000 { compatible = "fsl,lx2160a-ftm-alarm"; reg = <0x0 0x2800000 0x0 0x10000>; fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0 0x0>; @@ -1702,8 +1702,8 @@ pinmux_i2crv: pinmux@70010012c { compatible = "pinctrl-single"; reg = <0x00000007 0x0010012c 0x0 0xc>; - #address-cells = <2>; - #size-cells = <2>; + #address-cells = <1>; + #size-cells = <0>; pinctrl-single,bit-per-mux; pinctrl-single,register-width = <32>; pinctrl-single,function-mask = <0x7>; |