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author | Linus Torvalds <torvalds@linux-foundation.org> | 2022-07-24 09:55:53 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2022-07-24 09:55:53 -0700 |
commit | af2c9ac24019ece9281e606662e5c78fa67f5930 (patch) | |
tree | eeb6f5dfb4a602e75b77be0dd167cfe4b08fdf53 /tools/counter | |
parent | c2602a7ce0fc66318325df170a9ee275d7df5c2e (diff) | |
parent | b0380e13502adf7dd8be4c47d622c3522aae6c63 (diff) |
Merge tag 'perf_urgent_for_v5.19_rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull perf fix from Borislav Petkov:
- Reorganize the perf LBR init code so that a TSX quirk is applied
early enough in order for the LBR MSR access to not #GP
* tag 'perf_urgent_for_v5.19_rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
perf/x86/intel/lbr: Fix unchecked MSR access error on HSW
Diffstat (limited to 'tools/counter')
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