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authorShengjiu Wang <shengjiu.wang@nxp.com>2020-05-12 18:22:59 +0800
committerMark Brown <broonie@kernel.org>2020-05-19 14:18:51 +0100
commitf8953043e6e24f9425249464605a541d00950709 (patch)
treebab0e59aa7b73ccf1cc0c5a5d6c64d2cb18e6f52 /sound/soc/fsl/fsl_asrc.c
parent0e0e10fde0e9808d1991268f5dca69fb36c025f7 (diff)
ASoC: fsl_asrc: Set ASR76K and ASR56K based on processing clock
The processing clock is different for platforms, so it is better to set ASR76K and ASR56K based on processing clock, rather than hard coding the value for them. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Mihai Serban <mihai.serban@nxp.com> Link: https://lore.kernel.org/r/1589278979-31008-1-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/fsl/fsl_asrc.c')
-rw-r--r--sound/soc/fsl/fsl_asrc.c15
1 files changed, 10 insertions, 5 deletions
diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c
index 432936039de4..7e2d598ffb81 100644
--- a/sound/soc/fsl/fsl_asrc.c
+++ b/sound/soc/fsl/fsl_asrc.c
@@ -858,6 +858,8 @@ static const struct regmap_config fsl_asrc_regmap_config = {
*/
static int fsl_asrc_init(struct fsl_asrc *asrc)
{
+ unsigned long ipg_rate;
+
/* Halt ASRC internal FP when input FIFO needs data for pair A, B, C */
regmap_write(asrc->regmap, REG_ASRCTR, ASRCTR_ASRCEN);
@@ -875,11 +877,14 @@ static int fsl_asrc_init(struct fsl_asrc *asrc)
regmap_update_bits(asrc->regmap, REG_ASRTFR1,
ASRTFR1_TF_BASE_MASK, ASRTFR1_TF_BASE(0xfc));
- /* Set the processing clock for 76KHz to 133M */
- regmap_write(asrc->regmap, REG_ASR76K, 0x06D6);
-
- /* Set the processing clock for 56KHz to 133M */
- return regmap_write(asrc->regmap, REG_ASR56K, 0x0947);
+ /*
+ * Set the period of the 76KHz and 56KHz sampling clocks based on
+ * the ASRC processing clock.
+ * On iMX6, ipg_clk = 133MHz, REG_ASR76K = 0x06D6, REG_ASR56K = 0x0947
+ */
+ ipg_rate = clk_get_rate(asrc->ipg_clk);
+ regmap_write(asrc->regmap, REG_ASR76K, ipg_rate / 76000);
+ return regmap_write(asrc->regmap, REG_ASR56K, ipg_rate / 56000);
}
/**